1106b1041SKamel Bouhara // SPDX-License-Identifier: GPL-2.0-only 2106b1041SKamel Bouhara /** 3106b1041SKamel Bouhara * Copyright (C) 2020 Microchip 4106b1041SKamel Bouhara * 5106b1041SKamel Bouhara * Author: Kamel Bouhara <kamel.bouhara@bootlin.com> 6106b1041SKamel Bouhara */ 7106b1041SKamel Bouhara #include <linux/clk.h> 8106b1041SKamel Bouhara #include <linux/counter.h> 9106b1041SKamel Bouhara #include <linux/mfd/syscon.h> 10106b1041SKamel Bouhara #include <linux/module.h> 11106b1041SKamel Bouhara #include <linux/mutex.h> 12106b1041SKamel Bouhara #include <linux/of.h> 13106b1041SKamel Bouhara #include <linux/of_device.h> 14106b1041SKamel Bouhara #include <linux/platform_device.h> 15106b1041SKamel Bouhara #include <linux/regmap.h> 16106b1041SKamel Bouhara #include <soc/at91/atmel_tcb.h> 17106b1041SKamel Bouhara 18106b1041SKamel Bouhara #define ATMEL_TC_CMR_MASK (ATMEL_TC_LDRA_RISING | ATMEL_TC_LDRB_FALLING | \ 19106b1041SKamel Bouhara ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_LDBDIS | \ 20106b1041SKamel Bouhara ATMEL_TC_LDBSTOP) 21106b1041SKamel Bouhara 22106b1041SKamel Bouhara #define ATMEL_TC_QDEN BIT(8) 23106b1041SKamel Bouhara #define ATMEL_TC_POSEN BIT(9) 24106b1041SKamel Bouhara 25106b1041SKamel Bouhara struct mchp_tc_data { 26106b1041SKamel Bouhara const struct atmel_tcb_config *tc_cfg; 27106b1041SKamel Bouhara struct counter_device counter; 28106b1041SKamel Bouhara struct regmap *regmap; 29106b1041SKamel Bouhara int qdec_mode; 30106b1041SKamel Bouhara int num_channels; 31106b1041SKamel Bouhara int channel[2]; 32106b1041SKamel Bouhara bool trig_inverted; 33106b1041SKamel Bouhara }; 34106b1041SKamel Bouhara 35394a0150SWilliam Breathitt Gray static const enum counter_function mchp_tc_count_functions[] = { 36*aaec1a0fSWilliam Breathitt Gray COUNTER_FUNCTION_INCREASE, 37*aaec1a0fSWilliam Breathitt Gray COUNTER_FUNCTION_QUADRATURE_X4, 38106b1041SKamel Bouhara }; 39106b1041SKamel Bouhara 400056a405SWilliam Breathitt Gray static const enum counter_synapse_action mchp_tc_synapse_actions[] = { 41*aaec1a0fSWilliam Breathitt Gray COUNTER_SYNAPSE_ACTION_NONE, 42*aaec1a0fSWilliam Breathitt Gray COUNTER_SYNAPSE_ACTION_RISING_EDGE, 43*aaec1a0fSWilliam Breathitt Gray COUNTER_SYNAPSE_ACTION_FALLING_EDGE, 44*aaec1a0fSWilliam Breathitt Gray COUNTER_SYNAPSE_ACTION_BOTH_EDGES, 45106b1041SKamel Bouhara }; 46106b1041SKamel Bouhara 47106b1041SKamel Bouhara static struct counter_signal mchp_tc_count_signals[] = { 48106b1041SKamel Bouhara { 49106b1041SKamel Bouhara .id = 0, 50106b1041SKamel Bouhara .name = "Channel A", 51106b1041SKamel Bouhara }, 52106b1041SKamel Bouhara { 53106b1041SKamel Bouhara .id = 1, 54106b1041SKamel Bouhara .name = "Channel B", 55106b1041SKamel Bouhara } 56106b1041SKamel Bouhara }; 57106b1041SKamel Bouhara 58106b1041SKamel Bouhara static struct counter_synapse mchp_tc_count_synapses[] = { 59106b1041SKamel Bouhara { 60106b1041SKamel Bouhara .actions_list = mchp_tc_synapse_actions, 61106b1041SKamel Bouhara .num_actions = ARRAY_SIZE(mchp_tc_synapse_actions), 62106b1041SKamel Bouhara .signal = &mchp_tc_count_signals[0] 63106b1041SKamel Bouhara }, 64106b1041SKamel Bouhara { 65106b1041SKamel Bouhara .actions_list = mchp_tc_synapse_actions, 66106b1041SKamel Bouhara .num_actions = ARRAY_SIZE(mchp_tc_synapse_actions), 67106b1041SKamel Bouhara .signal = &mchp_tc_count_signals[1] 68106b1041SKamel Bouhara } 69106b1041SKamel Bouhara }; 70106b1041SKamel Bouhara 71*aaec1a0fSWilliam Breathitt Gray static int mchp_tc_count_function_read(struct counter_device *counter, 72106b1041SKamel Bouhara struct counter_count *count, 73*aaec1a0fSWilliam Breathitt Gray enum counter_function *function) 74106b1041SKamel Bouhara { 75106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter->priv; 76106b1041SKamel Bouhara 77106b1041SKamel Bouhara if (priv->qdec_mode) 78*aaec1a0fSWilliam Breathitt Gray *function = COUNTER_FUNCTION_QUADRATURE_X4; 79106b1041SKamel Bouhara else 80*aaec1a0fSWilliam Breathitt Gray *function = COUNTER_FUNCTION_INCREASE; 81106b1041SKamel Bouhara 82106b1041SKamel Bouhara return 0; 83106b1041SKamel Bouhara } 84106b1041SKamel Bouhara 85*aaec1a0fSWilliam Breathitt Gray static int mchp_tc_count_function_write(struct counter_device *counter, 86106b1041SKamel Bouhara struct counter_count *count, 87*aaec1a0fSWilliam Breathitt Gray enum counter_function function) 88106b1041SKamel Bouhara { 89106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter->priv; 90106b1041SKamel Bouhara u32 bmr, cmr; 91106b1041SKamel Bouhara 92106b1041SKamel Bouhara regmap_read(priv->regmap, ATMEL_TC_BMR, &bmr); 93106b1041SKamel Bouhara regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr); 94106b1041SKamel Bouhara 95106b1041SKamel Bouhara /* Set capture mode */ 96106b1041SKamel Bouhara cmr &= ~ATMEL_TC_WAVE; 97106b1041SKamel Bouhara 98106b1041SKamel Bouhara switch (function) { 99*aaec1a0fSWilliam Breathitt Gray case COUNTER_FUNCTION_INCREASE: 100106b1041SKamel Bouhara priv->qdec_mode = 0; 101106b1041SKamel Bouhara /* Set highest rate based on whether soc has gclk or not */ 102106b1041SKamel Bouhara bmr &= ~(ATMEL_TC_QDEN | ATMEL_TC_POSEN); 103106b1041SKamel Bouhara if (priv->tc_cfg->has_gclk) 104106b1041SKamel Bouhara cmr |= ATMEL_TC_TIMER_CLOCK2; 105106b1041SKamel Bouhara else 106106b1041SKamel Bouhara cmr |= ATMEL_TC_TIMER_CLOCK1; 107106b1041SKamel Bouhara /* Setup the period capture mode */ 108106b1041SKamel Bouhara cmr |= ATMEL_TC_CMR_MASK; 109106b1041SKamel Bouhara cmr &= ~(ATMEL_TC_ABETRG | ATMEL_TC_XC0); 110106b1041SKamel Bouhara break; 111*aaec1a0fSWilliam Breathitt Gray case COUNTER_FUNCTION_QUADRATURE_X4: 112106b1041SKamel Bouhara if (!priv->tc_cfg->has_qdec) 113106b1041SKamel Bouhara return -EINVAL; 114106b1041SKamel Bouhara /* In QDEC mode settings both channels 0 and 1 are required */ 115106b1041SKamel Bouhara if (priv->num_channels < 2 || priv->channel[0] != 0 || 116106b1041SKamel Bouhara priv->channel[1] != 1) { 117106b1041SKamel Bouhara pr_err("Invalid channels number or id for quadrature mode\n"); 118106b1041SKamel Bouhara return -EINVAL; 119106b1041SKamel Bouhara } 120106b1041SKamel Bouhara priv->qdec_mode = 1; 121106b1041SKamel Bouhara bmr |= ATMEL_TC_QDEN | ATMEL_TC_POSEN; 122106b1041SKamel Bouhara cmr |= ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_ABETRG | ATMEL_TC_XC0; 123106b1041SKamel Bouhara break; 124b11eed15SWilliam Breathitt Gray default: 125b11eed15SWilliam Breathitt Gray /* should never reach this path */ 126b11eed15SWilliam Breathitt Gray return -EINVAL; 127106b1041SKamel Bouhara } 128106b1041SKamel Bouhara 129106b1041SKamel Bouhara regmap_write(priv->regmap, ATMEL_TC_BMR, bmr); 130106b1041SKamel Bouhara regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), cmr); 131106b1041SKamel Bouhara 132106b1041SKamel Bouhara /* Enable clock and trigger counter */ 133106b1041SKamel Bouhara regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CCR), 134106b1041SKamel Bouhara ATMEL_TC_CLKEN | ATMEL_TC_SWTRG); 135106b1041SKamel Bouhara 136106b1041SKamel Bouhara if (priv->qdec_mode) { 137106b1041SKamel Bouhara regmap_write(priv->regmap, 138106b1041SKamel Bouhara ATMEL_TC_REG(priv->channel[1], CMR), cmr); 139106b1041SKamel Bouhara regmap_write(priv->regmap, 140106b1041SKamel Bouhara ATMEL_TC_REG(priv->channel[1], CCR), 141106b1041SKamel Bouhara ATMEL_TC_CLKEN | ATMEL_TC_SWTRG); 142106b1041SKamel Bouhara } 143106b1041SKamel Bouhara 144106b1041SKamel Bouhara return 0; 145106b1041SKamel Bouhara } 146106b1041SKamel Bouhara 147106b1041SKamel Bouhara static int mchp_tc_count_signal_read(struct counter_device *counter, 148106b1041SKamel Bouhara struct counter_signal *signal, 149493b938aSWilliam Breathitt Gray enum counter_signal_level *lvl) 150106b1041SKamel Bouhara { 151106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter->priv; 152106b1041SKamel Bouhara bool sigstatus; 153106b1041SKamel Bouhara u32 sr; 154106b1041SKamel Bouhara 155106b1041SKamel Bouhara regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr); 156106b1041SKamel Bouhara 157106b1041SKamel Bouhara if (priv->trig_inverted) 158106b1041SKamel Bouhara sigstatus = (sr & ATMEL_TC_MTIOB); 159106b1041SKamel Bouhara else 160106b1041SKamel Bouhara sigstatus = (sr & ATMEL_TC_MTIOA); 161106b1041SKamel Bouhara 162493b938aSWilliam Breathitt Gray *lvl = sigstatus ? COUNTER_SIGNAL_LEVEL_HIGH : COUNTER_SIGNAL_LEVEL_LOW; 163106b1041SKamel Bouhara 164106b1041SKamel Bouhara return 0; 165106b1041SKamel Bouhara } 166106b1041SKamel Bouhara 167*aaec1a0fSWilliam Breathitt Gray static int mchp_tc_count_action_read(struct counter_device *counter, 168106b1041SKamel Bouhara struct counter_count *count, 169106b1041SKamel Bouhara struct counter_synapse *synapse, 170*aaec1a0fSWilliam Breathitt Gray enum counter_synapse_action *action) 171106b1041SKamel Bouhara { 172106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter->priv; 173106b1041SKamel Bouhara u32 cmr; 174106b1041SKamel Bouhara 175106b1041SKamel Bouhara regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr); 176106b1041SKamel Bouhara 1773418bd7cSWilliam Breathitt Gray switch (cmr & ATMEL_TC_ETRGEDG) { 1783418bd7cSWilliam Breathitt Gray default: 179*aaec1a0fSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_NONE; 1803418bd7cSWilliam Breathitt Gray break; 1813418bd7cSWilliam Breathitt Gray case ATMEL_TC_ETRGEDG_RISING: 182*aaec1a0fSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_RISING_EDGE; 1833418bd7cSWilliam Breathitt Gray break; 1843418bd7cSWilliam Breathitt Gray case ATMEL_TC_ETRGEDG_FALLING: 185*aaec1a0fSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_FALLING_EDGE; 1863418bd7cSWilliam Breathitt Gray break; 1873418bd7cSWilliam Breathitt Gray case ATMEL_TC_ETRGEDG_BOTH: 188*aaec1a0fSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_BOTH_EDGES; 1893418bd7cSWilliam Breathitt Gray break; 1903418bd7cSWilliam Breathitt Gray } 191106b1041SKamel Bouhara 192106b1041SKamel Bouhara return 0; 193106b1041SKamel Bouhara } 194106b1041SKamel Bouhara 195*aaec1a0fSWilliam Breathitt Gray static int mchp_tc_count_action_write(struct counter_device *counter, 196106b1041SKamel Bouhara struct counter_count *count, 197106b1041SKamel Bouhara struct counter_synapse *synapse, 198*aaec1a0fSWilliam Breathitt Gray enum counter_synapse_action action) 199106b1041SKamel Bouhara { 200106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter->priv; 201106b1041SKamel Bouhara u32 edge = ATMEL_TC_ETRGEDG_NONE; 202106b1041SKamel Bouhara 203106b1041SKamel Bouhara /* QDEC mode is rising edge only */ 204106b1041SKamel Bouhara if (priv->qdec_mode) 205106b1041SKamel Bouhara return -EINVAL; 206106b1041SKamel Bouhara 207106b1041SKamel Bouhara switch (action) { 208*aaec1a0fSWilliam Breathitt Gray case COUNTER_SYNAPSE_ACTION_NONE: 209106b1041SKamel Bouhara edge = ATMEL_TC_ETRGEDG_NONE; 210106b1041SKamel Bouhara break; 211*aaec1a0fSWilliam Breathitt Gray case COUNTER_SYNAPSE_ACTION_RISING_EDGE: 212106b1041SKamel Bouhara edge = ATMEL_TC_ETRGEDG_RISING; 213106b1041SKamel Bouhara break; 214*aaec1a0fSWilliam Breathitt Gray case COUNTER_SYNAPSE_ACTION_FALLING_EDGE: 215106b1041SKamel Bouhara edge = ATMEL_TC_ETRGEDG_FALLING; 216106b1041SKamel Bouhara break; 217*aaec1a0fSWilliam Breathitt Gray case COUNTER_SYNAPSE_ACTION_BOTH_EDGES: 218106b1041SKamel Bouhara edge = ATMEL_TC_ETRGEDG_BOTH; 219106b1041SKamel Bouhara break; 220b11eed15SWilliam Breathitt Gray default: 221b11eed15SWilliam Breathitt Gray /* should never reach this path */ 222b11eed15SWilliam Breathitt Gray return -EINVAL; 223106b1041SKamel Bouhara } 224106b1041SKamel Bouhara 225106b1041SKamel Bouhara return regmap_write_bits(priv->regmap, 226106b1041SKamel Bouhara ATMEL_TC_REG(priv->channel[0], CMR), 227106b1041SKamel Bouhara ATMEL_TC_ETRGEDG, edge); 228106b1041SKamel Bouhara } 229106b1041SKamel Bouhara 230106b1041SKamel Bouhara static int mchp_tc_count_read(struct counter_device *counter, 231*aaec1a0fSWilliam Breathitt Gray struct counter_count *count, u64 *val) 232106b1041SKamel Bouhara { 233106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter->priv; 234106b1041SKamel Bouhara u32 cnt; 235106b1041SKamel Bouhara 236106b1041SKamel Bouhara regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CV), &cnt); 237106b1041SKamel Bouhara *val = cnt; 238106b1041SKamel Bouhara 239106b1041SKamel Bouhara return 0; 240106b1041SKamel Bouhara } 241106b1041SKamel Bouhara 242106b1041SKamel Bouhara static struct counter_count mchp_tc_counts[] = { 243106b1041SKamel Bouhara { 244106b1041SKamel Bouhara .id = 0, 245106b1041SKamel Bouhara .name = "Timer Counter", 246106b1041SKamel Bouhara .functions_list = mchp_tc_count_functions, 247106b1041SKamel Bouhara .num_functions = ARRAY_SIZE(mchp_tc_count_functions), 248106b1041SKamel Bouhara .synapses = mchp_tc_count_synapses, 249106b1041SKamel Bouhara .num_synapses = ARRAY_SIZE(mchp_tc_count_synapses), 250106b1041SKamel Bouhara }, 251106b1041SKamel Bouhara }; 252106b1041SKamel Bouhara 2530854fa22SRikard Falkeborn static const struct counter_ops mchp_tc_ops = { 254106b1041SKamel Bouhara .signal_read = mchp_tc_count_signal_read, 255106b1041SKamel Bouhara .count_read = mchp_tc_count_read, 256*aaec1a0fSWilliam Breathitt Gray .function_read = mchp_tc_count_function_read, 257*aaec1a0fSWilliam Breathitt Gray .function_write = mchp_tc_count_function_write, 258*aaec1a0fSWilliam Breathitt Gray .action_read = mchp_tc_count_action_read, 259*aaec1a0fSWilliam Breathitt Gray .action_write = mchp_tc_count_action_write 260106b1041SKamel Bouhara }; 261106b1041SKamel Bouhara 262106b1041SKamel Bouhara static const struct atmel_tcb_config tcb_rm9200_config = { 263106b1041SKamel Bouhara .counter_width = 16, 264106b1041SKamel Bouhara }; 265106b1041SKamel Bouhara 266106b1041SKamel Bouhara static const struct atmel_tcb_config tcb_sam9x5_config = { 267106b1041SKamel Bouhara .counter_width = 32, 268106b1041SKamel Bouhara }; 269106b1041SKamel Bouhara 270106b1041SKamel Bouhara static const struct atmel_tcb_config tcb_sama5d2_config = { 271106b1041SKamel Bouhara .counter_width = 32, 272106b1041SKamel Bouhara .has_gclk = true, 273106b1041SKamel Bouhara .has_qdec = true, 274106b1041SKamel Bouhara }; 275106b1041SKamel Bouhara 276106b1041SKamel Bouhara static const struct atmel_tcb_config tcb_sama5d3_config = { 277106b1041SKamel Bouhara .counter_width = 32, 278106b1041SKamel Bouhara .has_qdec = true, 279106b1041SKamel Bouhara }; 280106b1041SKamel Bouhara 281106b1041SKamel Bouhara static const struct of_device_id atmel_tc_of_match[] = { 282106b1041SKamel Bouhara { .compatible = "atmel,at91rm9200-tcb", .data = &tcb_rm9200_config, }, 283106b1041SKamel Bouhara { .compatible = "atmel,at91sam9x5-tcb", .data = &tcb_sam9x5_config, }, 284106b1041SKamel Bouhara { .compatible = "atmel,sama5d2-tcb", .data = &tcb_sama5d2_config, }, 285106b1041SKamel Bouhara { .compatible = "atmel,sama5d3-tcb", .data = &tcb_sama5d3_config, }, 286106b1041SKamel Bouhara { /* sentinel */ } 287106b1041SKamel Bouhara }; 288106b1041SKamel Bouhara 289106b1041SKamel Bouhara static void mchp_tc_clk_remove(void *ptr) 290106b1041SKamel Bouhara { 291106b1041SKamel Bouhara clk_disable_unprepare((struct clk *)ptr); 292106b1041SKamel Bouhara } 293106b1041SKamel Bouhara 294106b1041SKamel Bouhara static int mchp_tc_probe(struct platform_device *pdev) 295106b1041SKamel Bouhara { 296106b1041SKamel Bouhara struct device_node *np = pdev->dev.of_node; 297106b1041SKamel Bouhara const struct atmel_tcb_config *tcb_config; 298106b1041SKamel Bouhara const struct of_device_id *match; 299106b1041SKamel Bouhara struct mchp_tc_data *priv; 300106b1041SKamel Bouhara char clk_name[7]; 301106b1041SKamel Bouhara struct regmap *regmap; 302106b1041SKamel Bouhara struct clk *clk[3]; 303106b1041SKamel Bouhara int channel; 304106b1041SKamel Bouhara int ret, i; 305106b1041SKamel Bouhara 306106b1041SKamel Bouhara priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 307106b1041SKamel Bouhara if (!priv) 308106b1041SKamel Bouhara return -ENOMEM; 309106b1041SKamel Bouhara 310106b1041SKamel Bouhara platform_set_drvdata(pdev, priv); 311106b1041SKamel Bouhara 312106b1041SKamel Bouhara match = of_match_node(atmel_tc_of_match, np->parent); 313106b1041SKamel Bouhara tcb_config = match->data; 314106b1041SKamel Bouhara if (!tcb_config) { 315106b1041SKamel Bouhara dev_err(&pdev->dev, "No matching parent node found\n"); 316106b1041SKamel Bouhara return -ENODEV; 317106b1041SKamel Bouhara } 318106b1041SKamel Bouhara 319106b1041SKamel Bouhara regmap = syscon_node_to_regmap(np->parent); 320ab3300deSDan Carpenter if (IS_ERR(regmap)) 321ab3300deSDan Carpenter return PTR_ERR(regmap); 322106b1041SKamel Bouhara 323106b1041SKamel Bouhara /* max. channels number is 2 when in QDEC mode */ 324106b1041SKamel Bouhara priv->num_channels = of_property_count_u32_elems(np, "reg"); 325106b1041SKamel Bouhara if (priv->num_channels < 0) { 326106b1041SKamel Bouhara dev_err(&pdev->dev, "Invalid or missing channel\n"); 327106b1041SKamel Bouhara return -EINVAL; 328106b1041SKamel Bouhara } 329106b1041SKamel Bouhara 330106b1041SKamel Bouhara /* Register channels and initialize clocks */ 331106b1041SKamel Bouhara for (i = 0; i < priv->num_channels; i++) { 332106b1041SKamel Bouhara ret = of_property_read_u32_index(np, "reg", i, &channel); 333106b1041SKamel Bouhara if (ret < 0 || channel > 2) 334106b1041SKamel Bouhara return -ENODEV; 335106b1041SKamel Bouhara 336106b1041SKamel Bouhara priv->channel[i] = channel; 337106b1041SKamel Bouhara 338106b1041SKamel Bouhara snprintf(clk_name, sizeof(clk_name), "t%d_clk", channel); 339106b1041SKamel Bouhara 340106b1041SKamel Bouhara clk[i] = of_clk_get_by_name(np->parent, clk_name); 341106b1041SKamel Bouhara if (IS_ERR(clk[i])) { 342106b1041SKamel Bouhara /* Fallback to t0_clk */ 343106b1041SKamel Bouhara clk[i] = of_clk_get_by_name(np->parent, "t0_clk"); 344106b1041SKamel Bouhara if (IS_ERR(clk[i])) 345106b1041SKamel Bouhara return PTR_ERR(clk[i]); 346106b1041SKamel Bouhara } 347106b1041SKamel Bouhara 348106b1041SKamel Bouhara ret = clk_prepare_enable(clk[i]); 349106b1041SKamel Bouhara if (ret) 350106b1041SKamel Bouhara return ret; 351106b1041SKamel Bouhara 352106b1041SKamel Bouhara ret = devm_add_action_or_reset(&pdev->dev, 353106b1041SKamel Bouhara mchp_tc_clk_remove, 354106b1041SKamel Bouhara clk[i]); 355106b1041SKamel Bouhara if (ret) 356106b1041SKamel Bouhara return ret; 357106b1041SKamel Bouhara 358106b1041SKamel Bouhara dev_dbg(&pdev->dev, 359106b1041SKamel Bouhara "Initialized capture mode on channel %d\n", 360106b1041SKamel Bouhara channel); 361106b1041SKamel Bouhara } 362106b1041SKamel Bouhara 363106b1041SKamel Bouhara priv->tc_cfg = tcb_config; 364106b1041SKamel Bouhara priv->regmap = regmap; 365106b1041SKamel Bouhara priv->counter.name = dev_name(&pdev->dev); 366106b1041SKamel Bouhara priv->counter.parent = &pdev->dev; 367106b1041SKamel Bouhara priv->counter.ops = &mchp_tc_ops; 368106b1041SKamel Bouhara priv->counter.num_counts = ARRAY_SIZE(mchp_tc_counts); 369106b1041SKamel Bouhara priv->counter.counts = mchp_tc_counts; 370106b1041SKamel Bouhara priv->counter.num_signals = ARRAY_SIZE(mchp_tc_count_signals); 371106b1041SKamel Bouhara priv->counter.signals = mchp_tc_count_signals; 372106b1041SKamel Bouhara priv->counter.priv = priv; 373106b1041SKamel Bouhara 374106b1041SKamel Bouhara return devm_counter_register(&pdev->dev, &priv->counter); 375106b1041SKamel Bouhara } 376106b1041SKamel Bouhara 377106b1041SKamel Bouhara static const struct of_device_id mchp_tc_dt_ids[] = { 378106b1041SKamel Bouhara { .compatible = "microchip,tcb-capture", }, 379106b1041SKamel Bouhara { /* sentinel */ }, 380106b1041SKamel Bouhara }; 381106b1041SKamel Bouhara MODULE_DEVICE_TABLE(of, mchp_tc_dt_ids); 382106b1041SKamel Bouhara 383106b1041SKamel Bouhara static struct platform_driver mchp_tc_driver = { 384106b1041SKamel Bouhara .probe = mchp_tc_probe, 385106b1041SKamel Bouhara .driver = { 386106b1041SKamel Bouhara .name = "microchip-tcb-capture", 387106b1041SKamel Bouhara .of_match_table = mchp_tc_dt_ids, 388106b1041SKamel Bouhara }, 389106b1041SKamel Bouhara }; 390106b1041SKamel Bouhara module_platform_driver(mchp_tc_driver); 391106b1041SKamel Bouhara 392106b1041SKamel Bouhara MODULE_AUTHOR("Kamel Bouhara <kamel.bouhara@bootlin.com>"); 393106b1041SKamel Bouhara MODULE_DESCRIPTION("Microchip TCB Capture driver"); 394106b1041SKamel Bouhara MODULE_LICENSE("GPL v2"); 395