1106b1041SKamel Bouhara // SPDX-License-Identifier: GPL-2.0-only
2fe90fcabSJonathan Cameron /*
3106b1041SKamel Bouhara * Copyright (C) 2020 Microchip
4106b1041SKamel Bouhara *
5106b1041SKamel Bouhara * Author: Kamel Bouhara <kamel.bouhara@bootlin.com>
6106b1041SKamel Bouhara */
7106b1041SKamel Bouhara #include <linux/clk.h>
8106b1041SKamel Bouhara #include <linux/counter.h>
9106b1041SKamel Bouhara #include <linux/mfd/syscon.h>
10106b1041SKamel Bouhara #include <linux/module.h>
11106b1041SKamel Bouhara #include <linux/mutex.h>
12106b1041SKamel Bouhara #include <linux/of.h>
13106b1041SKamel Bouhara #include <linux/platform_device.h>
14106b1041SKamel Bouhara #include <linux/regmap.h>
15106b1041SKamel Bouhara #include <soc/at91/atmel_tcb.h>
16106b1041SKamel Bouhara
17106b1041SKamel Bouhara #define ATMEL_TC_CMR_MASK (ATMEL_TC_LDRA_RISING | ATMEL_TC_LDRB_FALLING | \
18106b1041SKamel Bouhara ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_LDBDIS | \
19106b1041SKamel Bouhara ATMEL_TC_LDBSTOP)
20106b1041SKamel Bouhara
21106b1041SKamel Bouhara #define ATMEL_TC_QDEN BIT(8)
22106b1041SKamel Bouhara #define ATMEL_TC_POSEN BIT(9)
23106b1041SKamel Bouhara
24106b1041SKamel Bouhara struct mchp_tc_data {
25106b1041SKamel Bouhara const struct atmel_tcb_config *tc_cfg;
26106b1041SKamel Bouhara struct regmap *regmap;
27106b1041SKamel Bouhara int qdec_mode;
28106b1041SKamel Bouhara int num_channels;
29106b1041SKamel Bouhara int channel[2];
30106b1041SKamel Bouhara };
31106b1041SKamel Bouhara
32106b1041SKamel Bouhara static const enum counter_function mchp_tc_count_functions[] = {
33394a0150SWilliam Breathitt Gray COUNTER_FUNCTION_INCREASE,
34aaec1a0fSWilliam Breathitt Gray COUNTER_FUNCTION_QUADRATURE_X4,
35aaec1a0fSWilliam Breathitt Gray };
36106b1041SKamel Bouhara
37106b1041SKamel Bouhara static const enum counter_synapse_action mchp_tc_synapse_actions[] = {
380056a405SWilliam Breathitt Gray COUNTER_SYNAPSE_ACTION_NONE,
39aaec1a0fSWilliam Breathitt Gray COUNTER_SYNAPSE_ACTION_RISING_EDGE,
40aaec1a0fSWilliam Breathitt Gray COUNTER_SYNAPSE_ACTION_FALLING_EDGE,
41aaec1a0fSWilliam Breathitt Gray COUNTER_SYNAPSE_ACTION_BOTH_EDGES,
42aaec1a0fSWilliam Breathitt Gray };
43106b1041SKamel Bouhara
44106b1041SKamel Bouhara static struct counter_signal mchp_tc_count_signals[] = {
45106b1041SKamel Bouhara {
46106b1041SKamel Bouhara .id = 0,
47106b1041SKamel Bouhara .name = "Channel A",
48106b1041SKamel Bouhara },
49106b1041SKamel Bouhara {
50106b1041SKamel Bouhara .id = 1,
51106b1041SKamel Bouhara .name = "Channel B",
52106b1041SKamel Bouhara }
53106b1041SKamel Bouhara };
54106b1041SKamel Bouhara
55106b1041SKamel Bouhara static struct counter_synapse mchp_tc_count_synapses[] = {
56106b1041SKamel Bouhara {
57106b1041SKamel Bouhara .actions_list = mchp_tc_synapse_actions,
58106b1041SKamel Bouhara .num_actions = ARRAY_SIZE(mchp_tc_synapse_actions),
59106b1041SKamel Bouhara .signal = &mchp_tc_count_signals[0]
60106b1041SKamel Bouhara },
61106b1041SKamel Bouhara {
62106b1041SKamel Bouhara .actions_list = mchp_tc_synapse_actions,
63106b1041SKamel Bouhara .num_actions = ARRAY_SIZE(mchp_tc_synapse_actions),
64106b1041SKamel Bouhara .signal = &mchp_tc_count_signals[1]
65106b1041SKamel Bouhara }
66106b1041SKamel Bouhara };
67106b1041SKamel Bouhara
mchp_tc_count_function_read(struct counter_device * counter,struct counter_count * count,enum counter_function * function)68106b1041SKamel Bouhara static int mchp_tc_count_function_read(struct counter_device *counter,
69aaec1a0fSWilliam Breathitt Gray struct counter_count *count,
70106b1041SKamel Bouhara enum counter_function *function)
71aaec1a0fSWilliam Breathitt Gray {
72106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter_priv(counter);
73a49ede82SUwe Kleine-König
74106b1041SKamel Bouhara if (priv->qdec_mode)
75106b1041SKamel Bouhara *function = COUNTER_FUNCTION_QUADRATURE_X4;
76aaec1a0fSWilliam Breathitt Gray else
77106b1041SKamel Bouhara *function = COUNTER_FUNCTION_INCREASE;
78aaec1a0fSWilliam Breathitt Gray
79106b1041SKamel Bouhara return 0;
80106b1041SKamel Bouhara }
81106b1041SKamel Bouhara
mchp_tc_count_function_write(struct counter_device * counter,struct counter_count * count,enum counter_function function)82106b1041SKamel Bouhara static int mchp_tc_count_function_write(struct counter_device *counter,
83aaec1a0fSWilliam Breathitt Gray struct counter_count *count,
84106b1041SKamel Bouhara enum counter_function function)
85aaec1a0fSWilliam Breathitt Gray {
86106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter_priv(counter);
87a49ede82SUwe Kleine-König u32 bmr, cmr;
88106b1041SKamel Bouhara
89106b1041SKamel Bouhara regmap_read(priv->regmap, ATMEL_TC_BMR, &bmr);
90106b1041SKamel Bouhara regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);
91106b1041SKamel Bouhara
92106b1041SKamel Bouhara /* Set capture mode */
93106b1041SKamel Bouhara cmr &= ~ATMEL_TC_WAVE;
94106b1041SKamel Bouhara
95106b1041SKamel Bouhara switch (function) {
96106b1041SKamel Bouhara case COUNTER_FUNCTION_INCREASE:
97aaec1a0fSWilliam Breathitt Gray priv->qdec_mode = 0;
98106b1041SKamel Bouhara /* Set highest rate based on whether soc has gclk or not */
99106b1041SKamel Bouhara bmr &= ~(ATMEL_TC_QDEN | ATMEL_TC_POSEN);
100106b1041SKamel Bouhara if (!priv->tc_cfg->has_gclk)
101*df8fdd01SDharma Balasubiramani cmr |= ATMEL_TC_TIMER_CLOCK2;
102106b1041SKamel Bouhara else
103106b1041SKamel Bouhara cmr |= ATMEL_TC_TIMER_CLOCK1;
104106b1041SKamel Bouhara /* Setup the period capture mode */
105106b1041SKamel Bouhara cmr |= ATMEL_TC_CMR_MASK;
106106b1041SKamel Bouhara cmr &= ~(ATMEL_TC_ABETRG | ATMEL_TC_XC0);
107106b1041SKamel Bouhara break;
108106b1041SKamel Bouhara case COUNTER_FUNCTION_QUADRATURE_X4:
109aaec1a0fSWilliam Breathitt Gray if (!priv->tc_cfg->has_qdec)
110106b1041SKamel Bouhara return -EINVAL;
111106b1041SKamel Bouhara /* In QDEC mode settings both channels 0 and 1 are required */
112106b1041SKamel Bouhara if (priv->num_channels < 2 || priv->channel[0] != 0 ||
113106b1041SKamel Bouhara priv->channel[1] != 1) {
114106b1041SKamel Bouhara pr_err("Invalid channels number or id for quadrature mode\n");
115106b1041SKamel Bouhara return -EINVAL;
116106b1041SKamel Bouhara }
117106b1041SKamel Bouhara priv->qdec_mode = 1;
118106b1041SKamel Bouhara bmr |= ATMEL_TC_QDEN | ATMEL_TC_POSEN;
119106b1041SKamel Bouhara cmr |= ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_ABETRG | ATMEL_TC_XC0;
120106b1041SKamel Bouhara break;
121106b1041SKamel Bouhara default:
122b11eed15SWilliam Breathitt Gray /* should never reach this path */
123b11eed15SWilliam Breathitt Gray return -EINVAL;
124b11eed15SWilliam Breathitt Gray }
125106b1041SKamel Bouhara
126106b1041SKamel Bouhara regmap_write(priv->regmap, ATMEL_TC_BMR, bmr);
127106b1041SKamel Bouhara regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), cmr);
128106b1041SKamel Bouhara
129106b1041SKamel Bouhara /* Enable clock and trigger counter */
130106b1041SKamel Bouhara regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], CCR),
131106b1041SKamel Bouhara ATMEL_TC_CLKEN | ATMEL_TC_SWTRG);
132106b1041SKamel Bouhara
133106b1041SKamel Bouhara if (priv->qdec_mode) {
134106b1041SKamel Bouhara regmap_write(priv->regmap,
135106b1041SKamel Bouhara ATMEL_TC_REG(priv->channel[1], CMR), cmr);
136106b1041SKamel Bouhara regmap_write(priv->regmap,
137106b1041SKamel Bouhara ATMEL_TC_REG(priv->channel[1], CCR),
138106b1041SKamel Bouhara ATMEL_TC_CLKEN | ATMEL_TC_SWTRG);
139106b1041SKamel Bouhara }
140106b1041SKamel Bouhara
141106b1041SKamel Bouhara return 0;
142106b1041SKamel Bouhara }
143106b1041SKamel Bouhara
mchp_tc_count_signal_read(struct counter_device * counter,struct counter_signal * signal,enum counter_signal_level * lvl)144106b1041SKamel Bouhara static int mchp_tc_count_signal_read(struct counter_device *counter,
145106b1041SKamel Bouhara struct counter_signal *signal,
146106b1041SKamel Bouhara enum counter_signal_level *lvl)
147493b938aSWilliam Breathitt Gray {
148106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter_priv(counter);
149a49ede82SUwe Kleine-König bool sigstatus;
150106b1041SKamel Bouhara u32 sr;
151106b1041SKamel Bouhara
152106b1041SKamel Bouhara regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr);
153106b1041SKamel Bouhara
154106b1041SKamel Bouhara if (signal->id == 1)
155d917a62aSWilliam Breathitt Gray sigstatus = (sr & ATMEL_TC_MTIOB);
156106b1041SKamel Bouhara else
157106b1041SKamel Bouhara sigstatus = (sr & ATMEL_TC_MTIOA);
158106b1041SKamel Bouhara
159106b1041SKamel Bouhara *lvl = sigstatus ? COUNTER_SIGNAL_LEVEL_HIGH : COUNTER_SIGNAL_LEVEL_LOW;
160493b938aSWilliam Breathitt Gray
161106b1041SKamel Bouhara return 0;
162106b1041SKamel Bouhara }
163106b1041SKamel Bouhara
mchp_tc_count_action_read(struct counter_device * counter,struct counter_count * count,struct counter_synapse * synapse,enum counter_synapse_action * action)164106b1041SKamel Bouhara static int mchp_tc_count_action_read(struct counter_device *counter,
165aaec1a0fSWilliam Breathitt Gray struct counter_count *count,
166106b1041SKamel Bouhara struct counter_synapse *synapse,
167106b1041SKamel Bouhara enum counter_synapse_action *action)
168aaec1a0fSWilliam Breathitt Gray {
169106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter_priv(counter);
170a49ede82SUwe Kleine-König u32 cmr;
171106b1041SKamel Bouhara
172106b1041SKamel Bouhara if (priv->qdec_mode) {
173d917a62aSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_BOTH_EDGES;
174d917a62aSWilliam Breathitt Gray return 0;
175d917a62aSWilliam Breathitt Gray }
176d917a62aSWilliam Breathitt Gray
177d917a62aSWilliam Breathitt Gray /* Only TIOA signal is evaluated in non-QDEC mode */
178d917a62aSWilliam Breathitt Gray if (synapse->signal->id != 0) {
179d917a62aSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_NONE;
180d917a62aSWilliam Breathitt Gray return 0;
181d917a62aSWilliam Breathitt Gray }
182d917a62aSWilliam Breathitt Gray
183d917a62aSWilliam Breathitt Gray regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);
184106b1041SKamel Bouhara
185106b1041SKamel Bouhara switch (cmr & ATMEL_TC_ETRGEDG) {
1863418bd7cSWilliam Breathitt Gray default:
1873418bd7cSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_NONE;
188aaec1a0fSWilliam Breathitt Gray break;
1893418bd7cSWilliam Breathitt Gray case ATMEL_TC_ETRGEDG_RISING:
1903418bd7cSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_RISING_EDGE;
191aaec1a0fSWilliam Breathitt Gray break;
1923418bd7cSWilliam Breathitt Gray case ATMEL_TC_ETRGEDG_FALLING:
1933418bd7cSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_FALLING_EDGE;
194aaec1a0fSWilliam Breathitt Gray break;
1953418bd7cSWilliam Breathitt Gray case ATMEL_TC_ETRGEDG_BOTH:
1963418bd7cSWilliam Breathitt Gray *action = COUNTER_SYNAPSE_ACTION_BOTH_EDGES;
197aaec1a0fSWilliam Breathitt Gray break;
1983418bd7cSWilliam Breathitt Gray }
1993418bd7cSWilliam Breathitt Gray
200106b1041SKamel Bouhara return 0;
201106b1041SKamel Bouhara }
202106b1041SKamel Bouhara
mchp_tc_count_action_write(struct counter_device * counter,struct counter_count * count,struct counter_synapse * synapse,enum counter_synapse_action action)203106b1041SKamel Bouhara static int mchp_tc_count_action_write(struct counter_device *counter,
204aaec1a0fSWilliam Breathitt Gray struct counter_count *count,
205106b1041SKamel Bouhara struct counter_synapse *synapse,
206106b1041SKamel Bouhara enum counter_synapse_action action)
207aaec1a0fSWilliam Breathitt Gray {
208106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter_priv(counter);
209a49ede82SUwe Kleine-König u32 edge = ATMEL_TC_ETRGEDG_NONE;
210106b1041SKamel Bouhara
211106b1041SKamel Bouhara /* QDEC mode is rising edge only; only TIOA handled in non-QDEC mode */
212d917a62aSWilliam Breathitt Gray if (priv->qdec_mode || synapse->signal->id != 0)
213d917a62aSWilliam Breathitt Gray return -EINVAL;
214106b1041SKamel Bouhara
215106b1041SKamel Bouhara switch (action) {
216106b1041SKamel Bouhara case COUNTER_SYNAPSE_ACTION_NONE:
217aaec1a0fSWilliam Breathitt Gray edge = ATMEL_TC_ETRGEDG_NONE;
218106b1041SKamel Bouhara break;
219106b1041SKamel Bouhara case COUNTER_SYNAPSE_ACTION_RISING_EDGE:
220aaec1a0fSWilliam Breathitt Gray edge = ATMEL_TC_ETRGEDG_RISING;
221106b1041SKamel Bouhara break;
222106b1041SKamel Bouhara case COUNTER_SYNAPSE_ACTION_FALLING_EDGE:
223aaec1a0fSWilliam Breathitt Gray edge = ATMEL_TC_ETRGEDG_FALLING;
224106b1041SKamel Bouhara break;
225106b1041SKamel Bouhara case COUNTER_SYNAPSE_ACTION_BOTH_EDGES:
226aaec1a0fSWilliam Breathitt Gray edge = ATMEL_TC_ETRGEDG_BOTH;
227106b1041SKamel Bouhara break;
228106b1041SKamel Bouhara default:
229b11eed15SWilliam Breathitt Gray /* should never reach this path */
230b11eed15SWilliam Breathitt Gray return -EINVAL;
231b11eed15SWilliam Breathitt Gray }
232106b1041SKamel Bouhara
233106b1041SKamel Bouhara return regmap_write_bits(priv->regmap,
234106b1041SKamel Bouhara ATMEL_TC_REG(priv->channel[0], CMR),
235106b1041SKamel Bouhara ATMEL_TC_ETRGEDG, edge);
236106b1041SKamel Bouhara }
237106b1041SKamel Bouhara
mchp_tc_count_read(struct counter_device * counter,struct counter_count * count,u64 * val)238106b1041SKamel Bouhara static int mchp_tc_count_read(struct counter_device *counter,
239106b1041SKamel Bouhara struct counter_count *count, u64 *val)
240aaec1a0fSWilliam Breathitt Gray {
241106b1041SKamel Bouhara struct mchp_tc_data *const priv = counter_priv(counter);
242a49ede82SUwe Kleine-König u32 cnt;
243106b1041SKamel Bouhara
244106b1041SKamel Bouhara regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CV), &cnt);
245106b1041SKamel Bouhara *val = cnt;
246106b1041SKamel Bouhara
247106b1041SKamel Bouhara return 0;
248106b1041SKamel Bouhara }
249106b1041SKamel Bouhara
250106b1041SKamel Bouhara static struct counter_count mchp_tc_counts[] = {
251106b1041SKamel Bouhara {
252106b1041SKamel Bouhara .id = 0,
253106b1041SKamel Bouhara .name = "Timer Counter",
254106b1041SKamel Bouhara .functions_list = mchp_tc_count_functions,
255106b1041SKamel Bouhara .num_functions = ARRAY_SIZE(mchp_tc_count_functions),
256106b1041SKamel Bouhara .synapses = mchp_tc_count_synapses,
257106b1041SKamel Bouhara .num_synapses = ARRAY_SIZE(mchp_tc_count_synapses),
258106b1041SKamel Bouhara },
259106b1041SKamel Bouhara };
260106b1041SKamel Bouhara
261106b1041SKamel Bouhara static const struct counter_ops mchp_tc_ops = {
2620854fa22SRikard Falkeborn .signal_read = mchp_tc_count_signal_read,
263106b1041SKamel Bouhara .count_read = mchp_tc_count_read,
264106b1041SKamel Bouhara .function_read = mchp_tc_count_function_read,
265aaec1a0fSWilliam Breathitt Gray .function_write = mchp_tc_count_function_write,
266aaec1a0fSWilliam Breathitt Gray .action_read = mchp_tc_count_action_read,
267aaec1a0fSWilliam Breathitt Gray .action_write = mchp_tc_count_action_write
268aaec1a0fSWilliam Breathitt Gray };
269106b1041SKamel Bouhara
270106b1041SKamel Bouhara static const struct atmel_tcb_config tcb_rm9200_config = {
271106b1041SKamel Bouhara .counter_width = 16,
272106b1041SKamel Bouhara };
273106b1041SKamel Bouhara
274106b1041SKamel Bouhara static const struct atmel_tcb_config tcb_sam9x5_config = {
275106b1041SKamel Bouhara .counter_width = 32,
276106b1041SKamel Bouhara };
277106b1041SKamel Bouhara
278106b1041SKamel Bouhara static const struct atmel_tcb_config tcb_sama5d2_config = {
279106b1041SKamel Bouhara .counter_width = 32,
280106b1041SKamel Bouhara .has_gclk = true,
281106b1041SKamel Bouhara .has_qdec = true,
282106b1041SKamel Bouhara };
283106b1041SKamel Bouhara
284106b1041SKamel Bouhara static const struct atmel_tcb_config tcb_sama5d3_config = {
285106b1041SKamel Bouhara .counter_width = 32,
286106b1041SKamel Bouhara .has_qdec = true,
287106b1041SKamel Bouhara };
288106b1041SKamel Bouhara
289106b1041SKamel Bouhara static const struct of_device_id atmel_tc_of_match[] = {
290106b1041SKamel Bouhara { .compatible = "atmel,at91rm9200-tcb", .data = &tcb_rm9200_config, },
291106b1041SKamel Bouhara { .compatible = "atmel,at91sam9x5-tcb", .data = &tcb_sam9x5_config, },
292106b1041SKamel Bouhara { .compatible = "atmel,sama5d2-tcb", .data = &tcb_sama5d2_config, },
293106b1041SKamel Bouhara { .compatible = "atmel,sama5d3-tcb", .data = &tcb_sama5d3_config, },
294106b1041SKamel Bouhara { /* sentinel */ }
295106b1041SKamel Bouhara };
296106b1041SKamel Bouhara
mchp_tc_clk_remove(void * ptr)297106b1041SKamel Bouhara static void mchp_tc_clk_remove(void *ptr)
298106b1041SKamel Bouhara {
299106b1041SKamel Bouhara clk_disable_unprepare((struct clk *)ptr);
300106b1041SKamel Bouhara }
301106b1041SKamel Bouhara
mchp_tc_probe(struct platform_device * pdev)302106b1041SKamel Bouhara static int mchp_tc_probe(struct platform_device *pdev)
303106b1041SKamel Bouhara {
304106b1041SKamel Bouhara struct device_node *np = pdev->dev.of_node;
305106b1041SKamel Bouhara const struct atmel_tcb_config *tcb_config;
306106b1041SKamel Bouhara const struct of_device_id *match;
307106b1041SKamel Bouhara struct counter_device *counter;
3085998ea62SUwe Kleine-König struct mchp_tc_data *priv;
309106b1041SKamel Bouhara char clk_name[7];
310106b1041SKamel Bouhara struct regmap *regmap;
311106b1041SKamel Bouhara struct clk *clk[3];
312106b1041SKamel Bouhara int channel;
313106b1041SKamel Bouhara int ret, i;
314106b1041SKamel Bouhara
315106b1041SKamel Bouhara counter = devm_counter_alloc(&pdev->dev, sizeof(*priv));
3165998ea62SUwe Kleine-König if (!counter)
3175998ea62SUwe Kleine-König return -ENOMEM;
318106b1041SKamel Bouhara priv = counter_priv(counter);
3195998ea62SUwe Kleine-König
320106b1041SKamel Bouhara match = of_match_node(atmel_tc_of_match, np->parent);
321106b1041SKamel Bouhara tcb_config = match->data;
322106b1041SKamel Bouhara if (!tcb_config) {
323106b1041SKamel Bouhara dev_err(&pdev->dev, "No matching parent node found\n");
324106b1041SKamel Bouhara return -ENODEV;
325106b1041SKamel Bouhara }
326106b1041SKamel Bouhara
327106b1041SKamel Bouhara regmap = syscon_node_to_regmap(np->parent);
328106b1041SKamel Bouhara if (IS_ERR(regmap))
329ab3300deSDan Carpenter return PTR_ERR(regmap);
330ab3300deSDan Carpenter
331106b1041SKamel Bouhara /* max. channels number is 2 when in QDEC mode */
332106b1041SKamel Bouhara priv->num_channels = of_property_count_u32_elems(np, "reg");
333106b1041SKamel Bouhara if (priv->num_channels < 0) {
334106b1041SKamel Bouhara dev_err(&pdev->dev, "Invalid or missing channel\n");
335106b1041SKamel Bouhara return -EINVAL;
336106b1041SKamel Bouhara }
337106b1041SKamel Bouhara
338106b1041SKamel Bouhara /* Register channels and initialize clocks */
339106b1041SKamel Bouhara for (i = 0; i < priv->num_channels; i++) {
340106b1041SKamel Bouhara ret = of_property_read_u32_index(np, "reg", i, &channel);
341106b1041SKamel Bouhara if (ret < 0 || channel > 2)
342106b1041SKamel Bouhara return -ENODEV;
343106b1041SKamel Bouhara
344106b1041SKamel Bouhara priv->channel[i] = channel;
345106b1041SKamel Bouhara
346106b1041SKamel Bouhara snprintf(clk_name, sizeof(clk_name), "t%d_clk", channel);
347106b1041SKamel Bouhara
348106b1041SKamel Bouhara clk[i] = of_clk_get_by_name(np->parent, clk_name);
349106b1041SKamel Bouhara if (IS_ERR(clk[i])) {
350106b1041SKamel Bouhara /* Fallback to t0_clk */
351106b1041SKamel Bouhara clk[i] = of_clk_get_by_name(np->parent, "t0_clk");
352106b1041SKamel Bouhara if (IS_ERR(clk[i]))
353106b1041SKamel Bouhara return PTR_ERR(clk[i]);
354106b1041SKamel Bouhara }
355106b1041SKamel Bouhara
356106b1041SKamel Bouhara ret = clk_prepare_enable(clk[i]);
357106b1041SKamel Bouhara if (ret)
358106b1041SKamel Bouhara return ret;
359106b1041SKamel Bouhara
360106b1041SKamel Bouhara ret = devm_add_action_or_reset(&pdev->dev,
361106b1041SKamel Bouhara mchp_tc_clk_remove,
362106b1041SKamel Bouhara clk[i]);
363106b1041SKamel Bouhara if (ret)
364106b1041SKamel Bouhara return ret;
365106b1041SKamel Bouhara
366106b1041SKamel Bouhara dev_dbg(&pdev->dev,
367106b1041SKamel Bouhara "Initialized capture mode on channel %d\n",
368106b1041SKamel Bouhara channel);
369106b1041SKamel Bouhara }
370106b1041SKamel Bouhara
371106b1041SKamel Bouhara priv->tc_cfg = tcb_config;
372106b1041SKamel Bouhara priv->regmap = regmap;
373106b1041SKamel Bouhara counter->name = dev_name(&pdev->dev);
3745998ea62SUwe Kleine-König counter->parent = &pdev->dev;
3755998ea62SUwe Kleine-König counter->ops = &mchp_tc_ops;
3765998ea62SUwe Kleine-König counter->num_counts = ARRAY_SIZE(mchp_tc_counts);
3775998ea62SUwe Kleine-König counter->counts = mchp_tc_counts;
3785998ea62SUwe Kleine-König counter->num_signals = ARRAY_SIZE(mchp_tc_count_signals);
3795998ea62SUwe Kleine-König counter->signals = mchp_tc_count_signals;
3805998ea62SUwe Kleine-König
381106b1041SKamel Bouhara ret = devm_counter_add(&pdev->dev, counter);
3825998ea62SUwe Kleine-König if (ret < 0)
3835998ea62SUwe Kleine-König return dev_err_probe(&pdev->dev, ret, "Failed to add counter\n");
3845998ea62SUwe Kleine-König
3855998ea62SUwe Kleine-König return 0;
3865998ea62SUwe Kleine-König }
387106b1041SKamel Bouhara
388106b1041SKamel Bouhara static const struct of_device_id mchp_tc_dt_ids[] = {
389106b1041SKamel Bouhara { .compatible = "microchip,tcb-capture", },
390106b1041SKamel Bouhara { /* sentinel */ },
391106b1041SKamel Bouhara };
392106b1041SKamel Bouhara MODULE_DEVICE_TABLE(of, mchp_tc_dt_ids);
393106b1041SKamel Bouhara
394106b1041SKamel Bouhara static struct platform_driver mchp_tc_driver = {
395106b1041SKamel Bouhara .probe = mchp_tc_probe,
396106b1041SKamel Bouhara .driver = {
397106b1041SKamel Bouhara .name = "microchip-tcb-capture",
398106b1041SKamel Bouhara .of_match_table = mchp_tc_dt_ids,
399106b1041SKamel Bouhara },
400106b1041SKamel Bouhara };
401106b1041SKamel Bouhara module_platform_driver(mchp_tc_driver);
402106b1041SKamel Bouhara
403106b1041SKamel Bouhara MODULE_AUTHOR("Kamel Bouhara <kamel.bouhara@bootlin.com>");
404106b1041SKamel Bouhara MODULE_DESCRIPTION("Microchip TCB Capture driver");
405106b1041SKamel Bouhara MODULE_LICENSE("GPL v2");
406106b1041SKamel Bouhara MODULE_IMPORT_NS(COUNTER);
4073216e551SWilliam Breathitt Gray