1 // SPDX-License-Identifier: GPL-2.0+
2 /* vim: set ts=8 sw=8 noet tw=80 nowrap: */
3 /*
4  *  comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c
5  *  List of valid routes for specific NI boards.
6  *
7  *  COMEDI - Linux Control and Measurement Device Interface
8  *  Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu>
9  *
10  *  This program is free software; you can redistribute it and/or modify
11  *  it under the terms of the GNU General Public License as published by
12  *  the Free Software Foundation; either version 2 of the License, or
13  *  (at your option) any later version.
14  *
15  *  This program is distributed in the hope that it will be useful,
16  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  *  GNU General Public License for more details.
19  */
20 
21 /*
22  * The contents of this file are generated using the tools in
23  * comedi/drivers/ni_routing/tools
24  *
25  * Please use those tools to help maintain the contents of this file.
26  */
27 
28 #include "../ni_device_routes.h"
29 #include "all.h"
30 
31 struct ni_device_routes ni_pxi_6733_device_routes = {
32 	.device = "pxi-6733",
33 	.routes = (struct ni_route_set[]){
34 		{
35 			.dest = NI_PFI(3),
36 			.src = (int[]){
37 				NI_CtrSource(1),
38 				0, /* Termination */
39 			}
40 		},
41 		{
42 			.dest = NI_PFI(4),
43 			.src = (int[]){
44 				NI_CtrGate(1),
45 				0, /* Termination */
46 			}
47 		},
48 		{
49 			.dest = NI_PFI(5),
50 			.src = (int[]){
51 				NI_AO_SampleClock,
52 				0, /* Termination */
53 			}
54 		},
55 		{
56 			.dest = NI_PFI(6),
57 			.src = (int[]){
58 				NI_AO_StartTrigger,
59 				0, /* Termination */
60 			}
61 		},
62 		{
63 			.dest = NI_PFI(8),
64 			.src = (int[]){
65 				NI_CtrSource(0),
66 				0, /* Termination */
67 			}
68 		},
69 		{
70 			.dest = NI_PFI(9),
71 			.src = (int[]){
72 				NI_CtrGate(0),
73 				0, /* Termination */
74 			}
75 		},
76 		{
77 			.dest = TRIGGER_LINE(0),
78 			.src = (int[]){
79 				NI_CtrSource(0),
80 				NI_CtrGate(0),
81 				NI_CtrInternalOutput(0),
82 				NI_CtrOut(0),
83 				NI_AO_SampleClock,
84 				NI_AO_StartTrigger,
85 				0, /* Termination */
86 			}
87 		},
88 		{
89 			.dest = TRIGGER_LINE(1),
90 			.src = (int[]){
91 				NI_CtrSource(0),
92 				NI_CtrGate(0),
93 				NI_CtrInternalOutput(0),
94 				NI_CtrOut(0),
95 				NI_AO_SampleClock,
96 				NI_AO_StartTrigger,
97 				0, /* Termination */
98 			}
99 		},
100 		{
101 			.dest = TRIGGER_LINE(2),
102 			.src = (int[]){
103 				NI_CtrSource(0),
104 				NI_CtrGate(0),
105 				NI_CtrInternalOutput(0),
106 				NI_CtrOut(0),
107 				NI_AO_SampleClock,
108 				NI_AO_StartTrigger,
109 				0, /* Termination */
110 			}
111 		},
112 		{
113 			.dest = TRIGGER_LINE(3),
114 			.src = (int[]){
115 				NI_CtrSource(0),
116 				NI_CtrGate(0),
117 				NI_CtrInternalOutput(0),
118 				NI_CtrOut(0),
119 				NI_AO_SampleClock,
120 				NI_AO_StartTrigger,
121 				0, /* Termination */
122 			}
123 		},
124 		{
125 			.dest = TRIGGER_LINE(4),
126 			.src = (int[]){
127 				NI_CtrSource(0),
128 				NI_CtrGate(0),
129 				NI_CtrInternalOutput(0),
130 				NI_CtrOut(0),
131 				NI_AO_SampleClock,
132 				NI_AO_StartTrigger,
133 				0, /* Termination */
134 			}
135 		},
136 		{
137 			.dest = TRIGGER_LINE(5),
138 			.src = (int[]){
139 				NI_CtrSource(0),
140 				NI_CtrGate(0),
141 				NI_CtrInternalOutput(0),
142 				NI_CtrOut(0),
143 				NI_AO_SampleClock,
144 				NI_AO_StartTrigger,
145 				0, /* Termination */
146 			}
147 		},
148 		{
149 			.dest = TRIGGER_LINE(7),
150 			.src = (int[]){
151 				NI_20MHzTimebase,
152 				0, /* Termination */
153 			}
154 		},
155 		{
156 			.dest = NI_CtrSource(0),
157 			.src = (int[]){
158 				NI_PFI(0),
159 				NI_PFI(1),
160 				NI_PFI(2),
161 				NI_PFI(3),
162 				NI_PFI(4),
163 				NI_PFI(5),
164 				NI_PFI(6),
165 				NI_PFI(7),
166 				NI_PFI(8),
167 				NI_PFI(9),
168 				TRIGGER_LINE(0),
169 				TRIGGER_LINE(1),
170 				TRIGGER_LINE(2),
171 				TRIGGER_LINE(3),
172 				TRIGGER_LINE(4),
173 				TRIGGER_LINE(5),
174 				TRIGGER_LINE(7),
175 				PXI_Star,
176 				NI_MasterTimebase,
177 				NI_20MHzTimebase,
178 				NI_100kHzTimebase,
179 				0, /* Termination */
180 			}
181 		},
182 		{
183 			.dest = NI_CtrSource(1),
184 			.src = (int[]){
185 				NI_PFI(0),
186 				NI_PFI(1),
187 				NI_PFI(2),
188 				NI_PFI(3),
189 				NI_PFI(4),
190 				NI_PFI(5),
191 				NI_PFI(6),
192 				NI_PFI(7),
193 				NI_PFI(8),
194 				NI_PFI(9),
195 				TRIGGER_LINE(0),
196 				TRIGGER_LINE(1),
197 				TRIGGER_LINE(2),
198 				TRIGGER_LINE(3),
199 				TRIGGER_LINE(4),
200 				TRIGGER_LINE(5),
201 				TRIGGER_LINE(7),
202 				PXI_Star,
203 				NI_MasterTimebase,
204 				NI_20MHzTimebase,
205 				NI_100kHzTimebase,
206 				0, /* Termination */
207 			}
208 		},
209 		{
210 			.dest = NI_CtrGate(0),
211 			.src = (int[]){
212 				NI_PFI(0),
213 				NI_PFI(1),
214 				NI_PFI(2),
215 				NI_PFI(3),
216 				NI_PFI(4),
217 				NI_PFI(5),
218 				NI_PFI(6),
219 				NI_PFI(7),
220 				NI_PFI(8),
221 				NI_PFI(9),
222 				TRIGGER_LINE(0),
223 				TRIGGER_LINE(1),
224 				TRIGGER_LINE(2),
225 				TRIGGER_LINE(3),
226 				TRIGGER_LINE(4),
227 				TRIGGER_LINE(5),
228 				NI_CtrInternalOutput(1),
229 				PXI_Star,
230 				0, /* Termination */
231 			}
232 		},
233 		{
234 			.dest = NI_CtrGate(1),
235 			.src = (int[]){
236 				NI_PFI(0),
237 				NI_PFI(1),
238 				NI_PFI(2),
239 				NI_PFI(3),
240 				NI_PFI(4),
241 				NI_PFI(5),
242 				NI_PFI(6),
243 				NI_PFI(7),
244 				NI_PFI(8),
245 				NI_PFI(9),
246 				TRIGGER_LINE(0),
247 				TRIGGER_LINE(1),
248 				TRIGGER_LINE(2),
249 				TRIGGER_LINE(3),
250 				TRIGGER_LINE(4),
251 				TRIGGER_LINE(5),
252 				NI_CtrInternalOutput(0),
253 				PXI_Star,
254 				0, /* Termination */
255 			}
256 		},
257 		{
258 			.dest = NI_CtrOut(0),
259 			.src = (int[]){
260 				TRIGGER_LINE(0),
261 				TRIGGER_LINE(1),
262 				TRIGGER_LINE(2),
263 				TRIGGER_LINE(3),
264 				TRIGGER_LINE(4),
265 				TRIGGER_LINE(5),
266 				NI_CtrInternalOutput(0),
267 				PXI_Star,
268 				0, /* Termination */
269 			}
270 		},
271 		{
272 			.dest = NI_CtrOut(1),
273 			.src = (int[]){
274 				NI_CtrInternalOutput(1),
275 				0, /* Termination */
276 			}
277 		},
278 		{
279 			.dest = PXI_Star,
280 			.src = (int[]){
281 				NI_CtrSource(0),
282 				NI_CtrGate(0),
283 				NI_CtrInternalOutput(0),
284 				NI_CtrOut(0),
285 				NI_AO_SampleClock,
286 				NI_AO_StartTrigger,
287 				0, /* Termination */
288 			}
289 		},
290 		{
291 			.dest = NI_AO_SampleClock,
292 			.src = (int[]){
293 				NI_PFI(0),
294 				NI_PFI(1),
295 				NI_PFI(2),
296 				NI_PFI(3),
297 				NI_PFI(4),
298 				NI_PFI(5),
299 				NI_PFI(6),
300 				NI_PFI(7),
301 				NI_PFI(8),
302 				NI_PFI(9),
303 				TRIGGER_LINE(0),
304 				TRIGGER_LINE(1),
305 				TRIGGER_LINE(2),
306 				TRIGGER_LINE(3),
307 				TRIGGER_LINE(4),
308 				TRIGGER_LINE(5),
309 				NI_CtrInternalOutput(1),
310 				PXI_Star,
311 				NI_AO_SampleClockTimebase,
312 				0, /* Termination */
313 			}
314 		},
315 		{
316 			.dest = NI_AO_SampleClockTimebase,
317 			.src = (int[]){
318 				NI_PFI(0),
319 				NI_PFI(1),
320 				NI_PFI(2),
321 				NI_PFI(3),
322 				NI_PFI(4),
323 				NI_PFI(5),
324 				NI_PFI(6),
325 				NI_PFI(7),
326 				NI_PFI(8),
327 				NI_PFI(9),
328 				TRIGGER_LINE(0),
329 				TRIGGER_LINE(1),
330 				TRIGGER_LINE(2),
331 				TRIGGER_LINE(3),
332 				TRIGGER_LINE(4),
333 				TRIGGER_LINE(5),
334 				TRIGGER_LINE(7),
335 				PXI_Star,
336 				NI_MasterTimebase,
337 				NI_20MHzTimebase,
338 				NI_100kHzTimebase,
339 				0, /* Termination */
340 			}
341 		},
342 		{
343 			.dest = NI_AO_StartTrigger,
344 			.src = (int[]){
345 				NI_PFI(0),
346 				NI_PFI(1),
347 				NI_PFI(2),
348 				NI_PFI(3),
349 				NI_PFI(4),
350 				NI_PFI(5),
351 				NI_PFI(6),
352 				NI_PFI(7),
353 				NI_PFI(8),
354 				NI_PFI(9),
355 				TRIGGER_LINE(0),
356 				TRIGGER_LINE(1),
357 				TRIGGER_LINE(2),
358 				TRIGGER_LINE(3),
359 				TRIGGER_LINE(4),
360 				TRIGGER_LINE(5),
361 				PXI_Star,
362 				0, /* Termination */
363 			}
364 		},
365 		{
366 			.dest = NI_AO_PauseTrigger,
367 			.src = (int[]){
368 				NI_PFI(0),
369 				NI_PFI(1),
370 				NI_PFI(2),
371 				NI_PFI(3),
372 				NI_PFI(4),
373 				NI_PFI(5),
374 				NI_PFI(6),
375 				NI_PFI(7),
376 				NI_PFI(8),
377 				NI_PFI(9),
378 				TRIGGER_LINE(0),
379 				TRIGGER_LINE(1),
380 				TRIGGER_LINE(2),
381 				TRIGGER_LINE(3),
382 				TRIGGER_LINE(4),
383 				TRIGGER_LINE(5),
384 				PXI_Star,
385 				0, /* Termination */
386 			}
387 		},
388 		{
389 			.dest = NI_DI_SampleClock,
390 			.src = (int[]){
391 				TRIGGER_LINE(0),
392 				TRIGGER_LINE(1),
393 				TRIGGER_LINE(2),
394 				TRIGGER_LINE(3),
395 				TRIGGER_LINE(4),
396 				TRIGGER_LINE(5),
397 				PXI_Star,
398 				NI_AO_SampleClock,
399 				0, /* Termination */
400 			}
401 		},
402 		{
403 			.dest = NI_DO_SampleClock,
404 			.src = (int[]){
405 				TRIGGER_LINE(0),
406 				TRIGGER_LINE(1),
407 				TRIGGER_LINE(2),
408 				TRIGGER_LINE(3),
409 				TRIGGER_LINE(4),
410 				TRIGGER_LINE(5),
411 				PXI_Star,
412 				NI_AO_SampleClock,
413 				0, /* Termination */
414 			}
415 		},
416 		{
417 			.dest = NI_MasterTimebase,
418 			.src = (int[]){
419 				TRIGGER_LINE(7),
420 				NI_20MHzTimebase,
421 				0, /* Termination */
422 			}
423 		},
424 		{ /* Termination of list */
425 			.dest = 0,
426 		},
427 	},
428 };
429