1 /*
2  * Clock event driver for the CS5535/CS5536
3  *
4  * Copyright (C) 2006, Advanced Micro Devices, Inc.
5  * Copyright (C) 2007  Andres Salomon <dilinger@debian.org>
6  * Copyright (C) 2009  Andres Salomon <dilinger@collabora.co.uk>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of version 2 of the GNU General Public License
10  * as published by the Free Software Foundation.
11  *
12  * The MFGPTs are documented in AMD Geode CS5536 Companion Device Data Book.
13  */
14 
15 #include <linux/kernel.h>
16 #include <linux/irq.h>
17 #include <linux/interrupt.h>
18 #include <linux/module.h>
19 #include <linux/cs5535.h>
20 #include <linux/clockchips.h>
21 
22 #define DRV_NAME "cs5535-clockevt"
23 
24 static int timer_irq;
25 module_param_hw_named(irq, timer_irq, int, irq, 0644);
26 MODULE_PARM_DESC(irq, "Which IRQ to use for the clock source MFGPT ticks.");
27 
28 /*
29  * We are using the 32.768kHz input clock - it's the only one that has the
30  * ranges we find desirable.  The following table lists the suitable
31  * divisors and the associated Hz, minimum interval and the maximum interval:
32  *
33  *  Divisor   Hz      Min Delta (s)  Max Delta (s)
34  *   1        32768   .00048828125      2.000
35  *   2        16384   .0009765625       4.000
36  *   4         8192   .001953125        8.000
37  *   8         4096   .00390625        16.000
38  *   16        2048   .0078125         32.000
39  *   32        1024   .015625          64.000
40  *   64         512   .03125          128.000
41  *  128         256   .0625           256.000
42  *  256         128   .125            512.000
43  */
44 
45 static struct cs5535_mfgpt_timer *cs5535_event_clock;
46 
47 /* Selected from the table above */
48 
49 #define MFGPT_DIVISOR 16
50 #define MFGPT_SCALE  4     /* divisor = 2^(scale) */
51 #define MFGPT_HZ  (32768 / MFGPT_DIVISOR)
52 #define MFGPT_PERIODIC (MFGPT_HZ / HZ)
53 
54 /*
55  * The MFGPT timers on the CS5536 provide us with suitable timers to use
56  * as clock event sources - not as good as a HPET or APIC, but certainly
57  * better than the PIT.  This isn't a general purpose MFGPT driver, but
58  * a simplified one designed specifically to act as a clock event source.
59  * For full details about the MFGPT, please consult the CS5536 data sheet.
60  */
61 
62 static void disable_timer(struct cs5535_mfgpt_timer *timer)
63 {
64 	/* avoid races by clearing CMP1 and CMP2 unconditionally */
65 	cs5535_mfgpt_write(timer, MFGPT_REG_SETUP,
66 			(uint16_t) ~MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP1 |
67 				MFGPT_SETUP_CMP2);
68 }
69 
70 static void start_timer(struct cs5535_mfgpt_timer *timer, uint16_t delta)
71 {
72 	cs5535_mfgpt_write(timer, MFGPT_REG_CMP2, delta);
73 	cs5535_mfgpt_write(timer, MFGPT_REG_COUNTER, 0);
74 
75 	cs5535_mfgpt_write(timer, MFGPT_REG_SETUP,
76 			MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
77 }
78 
79 static int mfgpt_shutdown(struct clock_event_device *evt)
80 {
81 	disable_timer(cs5535_event_clock);
82 	return 0;
83 }
84 
85 static int mfgpt_set_periodic(struct clock_event_device *evt)
86 {
87 	disable_timer(cs5535_event_clock);
88 	start_timer(cs5535_event_clock, MFGPT_PERIODIC);
89 	return 0;
90 }
91 
92 static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
93 {
94 	start_timer(cs5535_event_clock, delta);
95 	return 0;
96 }
97 
98 static struct clock_event_device cs5535_clockevent = {
99 	.name = DRV_NAME,
100 	.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
101 	.set_state_shutdown = mfgpt_shutdown,
102 	.set_state_periodic = mfgpt_set_periodic,
103 	.set_state_oneshot = mfgpt_shutdown,
104 	.tick_resume = mfgpt_shutdown,
105 	.set_next_event = mfgpt_next_event,
106 	.rating = 250,
107 };
108 
109 static irqreturn_t mfgpt_tick(int irq, void *dev_id)
110 {
111 	uint16_t val = cs5535_mfgpt_read(cs5535_event_clock, MFGPT_REG_SETUP);
112 
113 	/* See if the interrupt was for us */
114 	if (!(val & (MFGPT_SETUP_SETUP | MFGPT_SETUP_CMP2 | MFGPT_SETUP_CMP1)))
115 		return IRQ_NONE;
116 
117 	/* Turn off the clock (and clear the event) */
118 	disable_timer(cs5535_event_clock);
119 
120 	if (clockevent_state_detached(&cs5535_clockevent) ||
121 	    clockevent_state_shutdown(&cs5535_clockevent))
122 		return IRQ_HANDLED;
123 
124 	/* Clear the counter */
125 	cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_COUNTER, 0);
126 
127 	/* Restart the clock in periodic mode */
128 
129 	if (clockevent_state_periodic(&cs5535_clockevent))
130 		cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP,
131 				MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
132 
133 	cs5535_clockevent.event_handler(&cs5535_clockevent);
134 	return IRQ_HANDLED;
135 }
136 
137 static struct irqaction mfgptirq  = {
138 	.handler = mfgpt_tick,
139 	.flags = IRQF_NOBALANCING | IRQF_TIMER | IRQF_SHARED,
140 	.name = DRV_NAME,
141 };
142 
143 static int __init cs5535_mfgpt_init(void)
144 {
145 	struct cs5535_mfgpt_timer *timer;
146 	int ret;
147 	uint16_t val;
148 
149 	timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
150 	if (!timer) {
151 		printk(KERN_ERR DRV_NAME ": Could not allocate MFGPT timer\n");
152 		return -ENODEV;
153 	}
154 	cs5535_event_clock = timer;
155 
156 	/* Set up the IRQ on the MFGPT side */
157 	if (cs5535_mfgpt_setup_irq(timer, MFGPT_CMP2, &timer_irq)) {
158 		printk(KERN_ERR DRV_NAME ": Could not set up IRQ %d\n",
159 				timer_irq);
160 		goto err_timer;
161 	}
162 
163 	/* And register it with the kernel */
164 	ret = setup_irq(timer_irq, &mfgptirq);
165 	if (ret) {
166 		printk(KERN_ERR DRV_NAME ": Unable to set up the interrupt.\n");
167 		goto err_irq;
168 	}
169 
170 	/* Set the clock scale and enable the event mode for CMP2 */
171 	val = MFGPT_SCALE | (3 << 8);
172 
173 	cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, val);
174 
175 	/* Set up the clock event */
176 	printk(KERN_INFO DRV_NAME
177 		": Registering MFGPT timer as a clock event, using IRQ %d\n",
178 		timer_irq);
179 	clockevents_config_and_register(&cs5535_clockevent, MFGPT_HZ,
180 					0xF, 0xFFFE);
181 
182 	return 0;
183 
184 err_irq:
185 	cs5535_mfgpt_release_irq(cs5535_event_clock, MFGPT_CMP2, &timer_irq);
186 err_timer:
187 	cs5535_mfgpt_free_timer(cs5535_event_clock);
188 	printk(KERN_ERR DRV_NAME ": Unable to set up the MFGPT clock source\n");
189 	return -EIO;
190 }
191 
192 module_init(cs5535_mfgpt_init);
193 
194 MODULE_AUTHOR("Andres Salomon <dilinger@queued.net>");
195 MODULE_DESCRIPTION("CS5535/CS5536 MFGPT clock event driver");
196 MODULE_LICENSE("GPL");
197