1 // SPDX-License-Identifier: GPL-2.0 2 3 /* 4 * Clocksource driver for the synthetic counter and timers 5 * provided by the Hyper-V hypervisor to guest VMs, as described 6 * in the Hyper-V Top Level Functional Spec (TLFS). This driver 7 * is instruction set architecture independent. 8 * 9 * Copyright (C) 2019, Microsoft, Inc. 10 * 11 * Author: Michael Kelley <mikelley@microsoft.com> 12 */ 13 14 #include <linux/percpu.h> 15 #include <linux/cpumask.h> 16 #include <linux/clockchips.h> 17 #include <linux/clocksource.h> 18 #include <linux/sched_clock.h> 19 #include <linux/mm.h> 20 #include <linux/cpuhotplug.h> 21 #include <linux/interrupt.h> 22 #include <linux/irq.h> 23 #include <linux/acpi.h> 24 #include <linux/hyperv.h> 25 #include <clocksource/hyperv_timer.h> 26 #include <asm/hyperv-tlfs.h> 27 #include <asm/mshyperv.h> 28 29 static struct clock_event_device __percpu *hv_clock_event; 30 /* Note: offset can hold negative values after hibernation. */ 31 static u64 hv_sched_clock_offset __read_mostly; 32 33 /* 34 * If false, we're using the old mechanism for stimer0 interrupts 35 * where it sends a VMbus message when it expires. The old 36 * mechanism is used when running on older versions of Hyper-V 37 * that don't support Direct Mode. While Hyper-V provides 38 * four stimer's per CPU, Linux uses only stimer0. 39 * 40 * Because Direct Mode does not require processing a VMbus 41 * message, stimer interrupts can be enabled earlier in the 42 * process of booting a CPU, and consistent with when timer 43 * interrupts are enabled for other clocksource drivers. 44 * However, for legacy versions of Hyper-V when Direct Mode 45 * is not enabled, setting up stimer interrupts must be 46 * delayed until VMbus is initialized and can process the 47 * interrupt message. 48 */ 49 static bool direct_mode_enabled; 50 51 static int stimer0_irq = -1; 52 static int stimer0_message_sint; 53 static __maybe_unused DEFINE_PER_CPU(long, stimer0_evt); 54 55 /* 56 * Common code for stimer0 interrupts coming via Direct Mode or 57 * as a VMbus message. 58 */ 59 void hv_stimer0_isr(void) 60 { 61 struct clock_event_device *ce; 62 63 ce = this_cpu_ptr(hv_clock_event); 64 ce->event_handler(ce); 65 } 66 EXPORT_SYMBOL_GPL(hv_stimer0_isr); 67 68 /* 69 * stimer0 interrupt handler for architectures that support 70 * per-cpu interrupts, which also implies Direct Mode. 71 */ 72 static irqreturn_t __maybe_unused hv_stimer0_percpu_isr(int irq, void *dev_id) 73 { 74 hv_stimer0_isr(); 75 return IRQ_HANDLED; 76 } 77 78 static int hv_ce_set_next_event(unsigned long delta, 79 struct clock_event_device *evt) 80 { 81 u64 current_tick; 82 83 current_tick = hv_read_reference_counter(); 84 current_tick += delta; 85 hv_set_register(HV_REGISTER_STIMER0_COUNT, current_tick); 86 return 0; 87 } 88 89 static int hv_ce_shutdown(struct clock_event_device *evt) 90 { 91 hv_set_register(HV_REGISTER_STIMER0_COUNT, 0); 92 hv_set_register(HV_REGISTER_STIMER0_CONFIG, 0); 93 if (direct_mode_enabled && stimer0_irq >= 0) 94 disable_percpu_irq(stimer0_irq); 95 96 return 0; 97 } 98 99 static int hv_ce_set_oneshot(struct clock_event_device *evt) 100 { 101 union hv_stimer_config timer_cfg; 102 103 timer_cfg.as_uint64 = 0; 104 timer_cfg.enable = 1; 105 timer_cfg.auto_enable = 1; 106 if (direct_mode_enabled) { 107 /* 108 * When it expires, the timer will directly interrupt 109 * on the specified hardware vector/IRQ. 110 */ 111 timer_cfg.direct_mode = 1; 112 timer_cfg.apic_vector = HYPERV_STIMER0_VECTOR; 113 if (stimer0_irq >= 0) 114 enable_percpu_irq(stimer0_irq, IRQ_TYPE_NONE); 115 } else { 116 /* 117 * When it expires, the timer will generate a VMbus message, 118 * to be handled by the normal VMbus interrupt handler. 119 */ 120 timer_cfg.direct_mode = 0; 121 timer_cfg.sintx = stimer0_message_sint; 122 } 123 hv_set_register(HV_REGISTER_STIMER0_CONFIG, timer_cfg.as_uint64); 124 return 0; 125 } 126 127 /* 128 * hv_stimer_init - Per-cpu initialization of the clockevent 129 */ 130 static int hv_stimer_init(unsigned int cpu) 131 { 132 struct clock_event_device *ce; 133 134 if (!hv_clock_event) 135 return 0; 136 137 ce = per_cpu_ptr(hv_clock_event, cpu); 138 ce->name = "Hyper-V clockevent"; 139 ce->features = CLOCK_EVT_FEAT_ONESHOT; 140 ce->cpumask = cpumask_of(cpu); 141 ce->rating = 1000; 142 ce->set_state_shutdown = hv_ce_shutdown; 143 ce->set_state_oneshot = hv_ce_set_oneshot; 144 ce->set_next_event = hv_ce_set_next_event; 145 146 clockevents_config_and_register(ce, 147 HV_CLOCK_HZ, 148 HV_MIN_DELTA_TICKS, 149 HV_MAX_MAX_DELTA_TICKS); 150 return 0; 151 } 152 153 /* 154 * hv_stimer_cleanup - Per-cpu cleanup of the clockevent 155 */ 156 int hv_stimer_cleanup(unsigned int cpu) 157 { 158 struct clock_event_device *ce; 159 160 if (!hv_clock_event) 161 return 0; 162 163 /* 164 * In the legacy case where Direct Mode is not enabled 165 * (which can only be on x86/64), stimer cleanup happens 166 * relatively early in the CPU offlining process. We 167 * must unbind the stimer-based clockevent device so 168 * that the LAPIC timer can take over until clockevents 169 * are no longer needed in the offlining process. Note 170 * that clockevents_unbind_device() eventually calls 171 * hv_ce_shutdown(). 172 * 173 * The unbind should not be done when Direct Mode is 174 * enabled because we may be on an architecture where 175 * there are no other clockevent devices to fallback to. 176 */ 177 ce = per_cpu_ptr(hv_clock_event, cpu); 178 if (direct_mode_enabled) 179 hv_ce_shutdown(ce); 180 else 181 clockevents_unbind_device(ce, cpu); 182 183 return 0; 184 } 185 EXPORT_SYMBOL_GPL(hv_stimer_cleanup); 186 187 /* 188 * These placeholders are overridden by arch specific code on 189 * architectures that need special setup of the stimer0 IRQ because 190 * they don't support per-cpu IRQs (such as x86/x64). 191 */ 192 void __weak hv_setup_stimer0_handler(void (*handler)(void)) 193 { 194 }; 195 196 void __weak hv_remove_stimer0_handler(void) 197 { 198 }; 199 200 #ifdef CONFIG_ACPI 201 /* Called only on architectures with per-cpu IRQs (i.e., not x86/x64) */ 202 static int hv_setup_stimer0_irq(void) 203 { 204 int ret; 205 206 ret = acpi_register_gsi(NULL, HYPERV_STIMER0_VECTOR, 207 ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_HIGH); 208 if (ret < 0) { 209 pr_err("Can't register Hyper-V stimer0 GSI. Error %d", ret); 210 return ret; 211 } 212 stimer0_irq = ret; 213 214 ret = request_percpu_irq(stimer0_irq, hv_stimer0_percpu_isr, 215 "Hyper-V stimer0", &stimer0_evt); 216 if (ret) { 217 pr_err("Can't request Hyper-V stimer0 IRQ %d. Error %d", 218 stimer0_irq, ret); 219 acpi_unregister_gsi(stimer0_irq); 220 stimer0_irq = -1; 221 } 222 return ret; 223 } 224 225 static void hv_remove_stimer0_irq(void) 226 { 227 if (stimer0_irq == -1) { 228 hv_remove_stimer0_handler(); 229 } else { 230 free_percpu_irq(stimer0_irq, &stimer0_evt); 231 acpi_unregister_gsi(stimer0_irq); 232 stimer0_irq = -1; 233 } 234 } 235 #else 236 static int hv_setup_stimer0_irq(void) 237 { 238 return 0; 239 } 240 241 static void hv_remove_stimer0_irq(void) 242 { 243 } 244 #endif 245 246 /* hv_stimer_alloc - Global initialization of the clockevent and stimer0 */ 247 int hv_stimer_alloc(bool have_percpu_irqs) 248 { 249 int ret; 250 251 /* 252 * Synthetic timers are always available except on old versions of 253 * Hyper-V on x86. In that case, return as error as Linux will use a 254 * clockevent based on emulated LAPIC timer hardware. 255 */ 256 if (!(ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE)) 257 return -EINVAL; 258 259 hv_clock_event = alloc_percpu(struct clock_event_device); 260 if (!hv_clock_event) 261 return -ENOMEM; 262 263 direct_mode_enabled = ms_hyperv.misc_features & 264 HV_STIMER_DIRECT_MODE_AVAILABLE; 265 266 /* 267 * If Direct Mode isn't enabled, the remainder of the initialization 268 * is done later by hv_stimer_legacy_init() 269 */ 270 if (!direct_mode_enabled) 271 return 0; 272 273 if (have_percpu_irqs) { 274 ret = hv_setup_stimer0_irq(); 275 if (ret) 276 goto free_clock_event; 277 } else { 278 hv_setup_stimer0_handler(hv_stimer0_isr); 279 } 280 281 /* 282 * Since we are in Direct Mode, stimer initialization 283 * can be done now with a CPUHP value in the same range 284 * as other clockevent devices. 285 */ 286 ret = cpuhp_setup_state(CPUHP_AP_HYPERV_TIMER_STARTING, 287 "clockevents/hyperv/stimer:starting", 288 hv_stimer_init, hv_stimer_cleanup); 289 if (ret < 0) { 290 hv_remove_stimer0_irq(); 291 goto free_clock_event; 292 } 293 return ret; 294 295 free_clock_event: 296 free_percpu(hv_clock_event); 297 hv_clock_event = NULL; 298 return ret; 299 } 300 EXPORT_SYMBOL_GPL(hv_stimer_alloc); 301 302 /* 303 * hv_stimer_legacy_init -- Called from the VMbus driver to handle 304 * the case when Direct Mode is not enabled, and the stimer 305 * must be initialized late in the CPU onlining process. 306 * 307 */ 308 void hv_stimer_legacy_init(unsigned int cpu, int sint) 309 { 310 if (direct_mode_enabled) 311 return; 312 313 /* 314 * This function gets called by each vCPU, so setting the 315 * global stimer_message_sint value each time is conceptually 316 * not ideal, but the value passed in is always the same and 317 * it avoids introducing yet another interface into this 318 * clocksource driver just to set the sint in the legacy case. 319 */ 320 stimer0_message_sint = sint; 321 (void)hv_stimer_init(cpu); 322 } 323 EXPORT_SYMBOL_GPL(hv_stimer_legacy_init); 324 325 /* 326 * hv_stimer_legacy_cleanup -- Called from the VMbus driver to 327 * handle the case when Direct Mode is not enabled, and the 328 * stimer must be cleaned up early in the CPU offlining 329 * process. 330 */ 331 void hv_stimer_legacy_cleanup(unsigned int cpu) 332 { 333 if (direct_mode_enabled) 334 return; 335 (void)hv_stimer_cleanup(cpu); 336 } 337 EXPORT_SYMBOL_GPL(hv_stimer_legacy_cleanup); 338 339 /* 340 * Do a global cleanup of clockevents for the cases of kexec and 341 * vmbus exit 342 */ 343 void hv_stimer_global_cleanup(void) 344 { 345 int cpu; 346 347 /* 348 * hv_stime_legacy_cleanup() will stop the stimer if Direct 349 * Mode is not enabled, and fallback to the LAPIC timer. 350 */ 351 for_each_present_cpu(cpu) { 352 hv_stimer_legacy_cleanup(cpu); 353 } 354 355 if (!hv_clock_event) 356 return; 357 358 if (direct_mode_enabled) { 359 cpuhp_remove_state(CPUHP_AP_HYPERV_TIMER_STARTING); 360 hv_remove_stimer0_irq(); 361 stimer0_irq = -1; 362 } 363 free_percpu(hv_clock_event); 364 hv_clock_event = NULL; 365 366 } 367 EXPORT_SYMBOL_GPL(hv_stimer_global_cleanup); 368 369 static __always_inline u64 read_hv_clock_msr(void) 370 { 371 /* 372 * Read the partition counter to get the current tick count. This count 373 * is set to 0 when the partition is created and is incremented in 100 374 * nanosecond units. 375 * 376 * Use hv_raw_get_register() because this function is used from 377 * noinstr. Notable; while HV_REGISTER_TIME_REF_COUNT is a synthetic 378 * register it doesn't need the GHCB path. 379 */ 380 return hv_raw_get_register(HV_REGISTER_TIME_REF_COUNT); 381 } 382 383 /* 384 * Code and definitions for the Hyper-V clocksources. Two 385 * clocksources are defined: one that reads the Hyper-V defined MSR, and 386 * the other that uses the TSC reference page feature as defined in the 387 * TLFS. The MSR version is for compatibility with old versions of 388 * Hyper-V and 32-bit x86. The TSC reference page version is preferred. 389 */ 390 391 static union { 392 struct ms_hyperv_tsc_page page; 393 u8 reserved[PAGE_SIZE]; 394 } tsc_pg __bss_decrypted __aligned(PAGE_SIZE); 395 396 static struct ms_hyperv_tsc_page *tsc_page = &tsc_pg.page; 397 static unsigned long tsc_pfn; 398 399 unsigned long hv_get_tsc_pfn(void) 400 { 401 return tsc_pfn; 402 } 403 EXPORT_SYMBOL_GPL(hv_get_tsc_pfn); 404 405 struct ms_hyperv_tsc_page *hv_get_tsc_page(void) 406 { 407 return tsc_page; 408 } 409 EXPORT_SYMBOL_GPL(hv_get_tsc_page); 410 411 static __always_inline u64 read_hv_clock_tsc(void) 412 { 413 u64 cur_tsc, time; 414 415 /* 416 * The Hyper-V Top-Level Function Spec (TLFS), section Timers, 417 * subsection Refererence Counter, guarantees that the TSC and MSR 418 * times are in sync and monotonic. Therefore we can fall back 419 * to the MSR in case the TSC page indicates unavailability. 420 */ 421 if (!hv_read_tsc_page_tsc(tsc_page, &cur_tsc, &time)) 422 time = read_hv_clock_msr(); 423 424 return time; 425 } 426 427 static u64 notrace read_hv_clock_tsc_cs(struct clocksource *arg) 428 { 429 return read_hv_clock_tsc(); 430 } 431 432 static u64 noinstr read_hv_sched_clock_tsc(void) 433 { 434 return (read_hv_clock_tsc() - hv_sched_clock_offset) * 435 (NSEC_PER_SEC / HV_CLOCK_HZ); 436 } 437 438 static void suspend_hv_clock_tsc(struct clocksource *arg) 439 { 440 union hv_reference_tsc_msr tsc_msr; 441 442 /* Disable the TSC page */ 443 tsc_msr.as_uint64 = hv_get_register(HV_REGISTER_REFERENCE_TSC); 444 tsc_msr.enable = 0; 445 hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); 446 } 447 448 449 static void resume_hv_clock_tsc(struct clocksource *arg) 450 { 451 union hv_reference_tsc_msr tsc_msr; 452 453 /* Re-enable the TSC page */ 454 tsc_msr.as_uint64 = hv_get_register(HV_REGISTER_REFERENCE_TSC); 455 tsc_msr.enable = 1; 456 tsc_msr.pfn = tsc_pfn; 457 hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); 458 } 459 460 /* 461 * Called during resume from hibernation, from overridden 462 * x86_platform.restore_sched_clock_state routine. This is to adjust offsets 463 * used to calculate time for hv tsc page based sched_clock, to account for 464 * time spent before hibernation. 465 */ 466 void hv_adj_sched_clock_offset(u64 offset) 467 { 468 hv_sched_clock_offset -= offset; 469 } 470 471 #ifdef HAVE_VDSO_CLOCKMODE_HVCLOCK 472 static int hv_cs_enable(struct clocksource *cs) 473 { 474 vclocks_set_used(VDSO_CLOCKMODE_HVCLOCK); 475 return 0; 476 } 477 #endif 478 479 static struct clocksource hyperv_cs_tsc = { 480 .name = "hyperv_clocksource_tsc_page", 481 .rating = 500, 482 .read = read_hv_clock_tsc_cs, 483 .mask = CLOCKSOURCE_MASK(64), 484 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 485 .suspend= suspend_hv_clock_tsc, 486 .resume = resume_hv_clock_tsc, 487 #ifdef HAVE_VDSO_CLOCKMODE_HVCLOCK 488 .enable = hv_cs_enable, 489 .vdso_clock_mode = VDSO_CLOCKMODE_HVCLOCK, 490 #else 491 .vdso_clock_mode = VDSO_CLOCKMODE_NONE, 492 #endif 493 }; 494 495 static u64 notrace read_hv_clock_msr_cs(struct clocksource *arg) 496 { 497 return read_hv_clock_msr(); 498 } 499 500 static struct clocksource hyperv_cs_msr = { 501 .name = "hyperv_clocksource_msr", 502 .rating = 495, 503 .read = read_hv_clock_msr_cs, 504 .mask = CLOCKSOURCE_MASK(64), 505 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 506 }; 507 508 /* 509 * Reference to pv_ops must be inline so objtool 510 * detection of noinstr violations can work correctly. 511 */ 512 #ifdef CONFIG_GENERIC_SCHED_CLOCK 513 static __always_inline void hv_setup_sched_clock(void *sched_clock) 514 { 515 /* 516 * We're on an architecture with generic sched clock (not x86/x64). 517 * The Hyper-V sched clock read function returns nanoseconds, not 518 * the normal 100ns units of the Hyper-V synthetic clock. 519 */ 520 sched_clock_register(sched_clock, 64, NSEC_PER_SEC); 521 } 522 #elif defined CONFIG_PARAVIRT 523 static __always_inline void hv_setup_sched_clock(void *sched_clock) 524 { 525 /* We're on x86/x64 *and* using PV ops */ 526 paravirt_set_sched_clock(sched_clock); 527 } 528 #else /* !CONFIG_GENERIC_SCHED_CLOCK && !CONFIG_PARAVIRT */ 529 static __always_inline void hv_setup_sched_clock(void *sched_clock) {} 530 #endif /* CONFIG_GENERIC_SCHED_CLOCK */ 531 532 static void __init hv_init_tsc_clocksource(void) 533 { 534 union hv_reference_tsc_msr tsc_msr; 535 536 /* 537 * If Hyper-V offers TSC_INVARIANT, then the virtualized TSC correctly 538 * handles frequency and offset changes due to live migration, 539 * pause/resume, and other VM management operations. So lower the 540 * Hyper-V Reference TSC rating, causing the generic TSC to be used. 541 * TSC_INVARIANT is not offered on ARM64, so the Hyper-V Reference 542 * TSC will be preferred over the virtualized ARM64 arch counter. 543 */ 544 if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) { 545 hyperv_cs_tsc.rating = 250; 546 hyperv_cs_msr.rating = 245; 547 } 548 549 if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) 550 return; 551 552 hv_read_reference_counter = read_hv_clock_tsc; 553 554 /* 555 * TSC page mapping works differently in root compared to guest. 556 * - In guest partition the guest PFN has to be passed to the 557 * hypervisor. 558 * - In root partition it's other way around: it has to map the PFN 559 * provided by the hypervisor. 560 * But it can't be mapped right here as it's too early and MMU isn't 561 * ready yet. So, we only set the enable bit here and will remap the 562 * page later in hv_remap_tsc_clocksource(). 563 * 564 * It worth mentioning, that TSC clocksource read function 565 * (read_hv_clock_tsc) has a MSR-based fallback mechanism, used when 566 * TSC page is zeroed (which is the case until the PFN is remapped) and 567 * thus TSC clocksource will work even without the real TSC page 568 * mapped. 569 */ 570 tsc_msr.as_uint64 = hv_get_register(HV_REGISTER_REFERENCE_TSC); 571 if (hv_root_partition) 572 tsc_pfn = tsc_msr.pfn; 573 else 574 tsc_pfn = HVPFN_DOWN(virt_to_phys(tsc_page)); 575 tsc_msr.enable = 1; 576 tsc_msr.pfn = tsc_pfn; 577 hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); 578 579 clocksource_register_hz(&hyperv_cs_tsc, NSEC_PER_SEC/100); 580 581 /* 582 * If TSC is invariant, then let it stay as the sched clock since it 583 * will be faster than reading the TSC page. But if not invariant, use 584 * the TSC page so that live migrations across hosts with different 585 * frequencies is handled correctly. 586 */ 587 if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT)) { 588 hv_sched_clock_offset = hv_read_reference_counter(); 589 hv_setup_sched_clock(read_hv_sched_clock_tsc); 590 } 591 } 592 593 void __init hv_init_clocksource(void) 594 { 595 /* 596 * Try to set up the TSC page clocksource, then the MSR clocksource. 597 * At least one of these will always be available except on very old 598 * versions of Hyper-V on x86. In that case we won't have a Hyper-V 599 * clocksource, but Linux will still run with a clocksource based 600 * on the emulated PIT or LAPIC timer. 601 * 602 * Never use the MSR clocksource as sched clock. It's too slow. 603 * Better to use the native sched clock as the fallback. 604 */ 605 hv_init_tsc_clocksource(); 606 607 if (ms_hyperv.features & HV_MSR_TIME_REF_COUNT_AVAILABLE) 608 clocksource_register_hz(&hyperv_cs_msr, NSEC_PER_SEC/100); 609 } 610 611 void __init hv_remap_tsc_clocksource(void) 612 { 613 if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) 614 return; 615 616 if (!hv_root_partition) { 617 WARN(1, "%s: attempt to remap TSC page in guest partition\n", 618 __func__); 619 return; 620 } 621 622 tsc_page = memremap(tsc_pfn << HV_HYP_PAGE_SHIFT, sizeof(tsc_pg), 623 MEMREMAP_WB); 624 if (!tsc_page) 625 pr_err("Failed to remap Hyper-V TSC page.\n"); 626 } 627