1 /* 2 * Copyright (C) ST-Ericsson SA 2011 3 * 4 * License Terms: GNU General Public License v2 5 * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson 6 * Author: Sundar Iyer for ST-Ericsson 7 * sched_clock implementation is based on: 8 * plat-nomadik/timer.c Linus Walleij <linus.walleij@stericsson.com> 9 * 10 * DBx500-PRCMU Timer 11 * The PRCMU has 5 timers which are available in a always-on 12 * power domain. We use the Timer 4 for our always-on clock 13 * source on DB8500 and Timer 3 on DB5500. 14 */ 15 #include <linux/clockchips.h> 16 #include <linux/clksrc-dbx500-prcmu.h> 17 18 #include <asm/sched_clock.h> 19 20 #include <mach/setup.h> 21 #include <mach/hardware.h> 22 23 #define RATE_32K 32768 24 25 #define TIMER_MODE_CONTINOUS 0x1 26 #define TIMER_DOWNCOUNT_VAL 0xffffffff 27 28 #define PRCMU_TIMER_REF 0 29 #define PRCMU_TIMER_DOWNCOUNT 0x4 30 #define PRCMU_TIMER_MODE 0x8 31 32 #define SCHED_CLOCK_MIN_WRAP 131072 /* 2^32 / 32768 */ 33 34 static void __iomem *clksrc_dbx500_timer_base; 35 36 static cycle_t clksrc_dbx500_prcmu_read(struct clocksource *cs) 37 { 38 u32 count, count2; 39 40 do { 41 count = readl(clksrc_dbx500_timer_base + 42 PRCMU_TIMER_DOWNCOUNT); 43 count2 = readl(clksrc_dbx500_timer_base + 44 PRCMU_TIMER_DOWNCOUNT); 45 } while (count2 != count); 46 47 /* Negate because the timer is a decrementing counter */ 48 return ~count; 49 } 50 51 static struct clocksource clocksource_dbx500_prcmu = { 52 .name = "dbx500-prcmu-timer", 53 .rating = 300, 54 .read = clksrc_dbx500_prcmu_read, 55 .mask = CLOCKSOURCE_MASK(32), 56 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 57 }; 58 59 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK 60 61 static u32 notrace dbx500_prcmu_sched_clock_read(void) 62 { 63 if (unlikely(!clksrc_dbx500_timer_base)) 64 return 0; 65 66 return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); 67 } 68 69 #endif 70 71 void __init clksrc_dbx500_prcmu_init(void __iomem *base) 72 { 73 clksrc_dbx500_timer_base = base; 74 75 /* 76 * The A9 sub system expects the timer to be configured as 77 * a continous looping timer. 78 * The PRCMU should configure it but if it for some reason 79 * don't we do it here. 80 */ 81 if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) != 82 TIMER_MODE_CONTINOUS) { 83 writel(TIMER_MODE_CONTINOUS, 84 clksrc_dbx500_timer_base + PRCMU_TIMER_MODE); 85 writel(TIMER_DOWNCOUNT_VAL, 86 clksrc_dbx500_timer_base + PRCMU_TIMER_REF); 87 } 88 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK 89 setup_sched_clock(dbx500_prcmu_sched_clock_read, 90 32, RATE_32K); 91 #endif 92 clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K); 93 } 94