1 /* 2 * Copyright (C) ST-Ericsson SA 2011 3 * 4 * License Terms: GNU General Public License v2 5 * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson 6 * Author: Sundar Iyer for ST-Ericsson 7 * sched_clock implementation is based on: 8 * plat-nomadik/timer.c Linus Walleij <linus.walleij@stericsson.com> 9 * 10 * DBx500-PRCMU Timer 11 * The PRCMU has 5 timers which are available in a always-on 12 * power domain. We use the Timer 4 for our always-on clock 13 * source on DB8500. 14 */ 15 #include <linux/clockchips.h> 16 #include <linux/clksrc-dbx500-prcmu.h> 17 #include <linux/sched_clock.h> 18 19 #define RATE_32K 32768 20 21 #define TIMER_MODE_CONTINOUS 0x1 22 #define TIMER_DOWNCOUNT_VAL 0xffffffff 23 24 #define PRCMU_TIMER_REF 0 25 #define PRCMU_TIMER_DOWNCOUNT 0x4 26 #define PRCMU_TIMER_MODE 0x8 27 28 #define SCHED_CLOCK_MIN_WRAP 131072 /* 2^32 / 32768 */ 29 30 static void __iomem *clksrc_dbx500_timer_base; 31 32 static cycle_t notrace clksrc_dbx500_prcmu_read(struct clocksource *cs) 33 { 34 void __iomem *base = clksrc_dbx500_timer_base; 35 u32 count, count2; 36 37 do { 38 count = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT); 39 count2 = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT); 40 } while (count2 != count); 41 42 /* Negate because the timer is a decrementing counter */ 43 return ~count; 44 } 45 46 static struct clocksource clocksource_dbx500_prcmu = { 47 .name = "dbx500-prcmu-timer", 48 .rating = 300, 49 .read = clksrc_dbx500_prcmu_read, 50 .mask = CLOCKSOURCE_MASK(32), 51 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 52 }; 53 54 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK 55 56 static u64 notrace dbx500_prcmu_sched_clock_read(void) 57 { 58 if (unlikely(!clksrc_dbx500_timer_base)) 59 return 0; 60 61 return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); 62 } 63 64 #endif 65 66 void __init clksrc_dbx500_prcmu_init(void __iomem *base) 67 { 68 clksrc_dbx500_timer_base = base; 69 70 /* 71 * The A9 sub system expects the timer to be configured as 72 * a continous looping timer. 73 * The PRCMU should configure it but if it for some reason 74 * don't we do it here. 75 */ 76 if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) != 77 TIMER_MODE_CONTINOUS) { 78 writel(TIMER_MODE_CONTINOUS, 79 clksrc_dbx500_timer_base + PRCMU_TIMER_MODE); 80 writel(TIMER_DOWNCOUNT_VAL, 81 clksrc_dbx500_timer_base + PRCMU_TIMER_REF); 82 } 83 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK 84 sched_clock_register(dbx500_prcmu_sched_clock_read, 32, RATE_32K); 85 #endif 86 clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K); 87 } 88