1 /* 2 * linux/drivers/clocksource/acpi_pm.c 3 * 4 * This file contains the ACPI PM based clocksource. 5 * 6 * This code was largely moved from the i386 timer_pm.c file 7 * which was (C) Dominik Brodowski <linux@brodo.de> 2003 8 * and contained the following comments: 9 * 10 * Driver to use the Power Management Timer (PMTMR) available in some 11 * southbridges as primary timing source for the Linux kernel. 12 * 13 * Based on parts of linux/drivers/acpi/hardware/hwtimer.c, timer_pit.c, 14 * timer_hpet.c, and on Arjan van de Ven's implementation for 2.4. 15 * 16 * This file is licensed under the GPL v2. 17 */ 18 19 #include <linux/acpi_pmtmr.h> 20 #include <linux/clocksource.h> 21 #include <linux/timex.h> 22 #include <linux/errno.h> 23 #include <linux/init.h> 24 #include <linux/pci.h> 25 #include <linux/delay.h> 26 #include <asm/io.h> 27 28 /* 29 * The I/O port the PMTMR resides at. 30 * The location is detected during setup_arch(), 31 * in arch/i386/kernel/acpi/boot.c 32 */ 33 u32 pmtmr_ioport __read_mostly; 34 35 static inline u32 read_pmtmr(void) 36 { 37 /* mask the output to 24 bits */ 38 return inl(pmtmr_ioport) & ACPI_PM_MASK; 39 } 40 41 u32 acpi_pm_read_verified(void) 42 { 43 u32 v1 = 0, v2 = 0, v3 = 0; 44 45 /* 46 * It has been reported that because of various broken 47 * chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM clock 48 * source is not latched, you must read it multiple 49 * times to ensure a safe value is read: 50 */ 51 do { 52 v1 = read_pmtmr(); 53 v2 = read_pmtmr(); 54 v3 = read_pmtmr(); 55 } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) 56 || (v3 > v1 && v3 < v2))); 57 58 return v2; 59 } 60 61 static cycle_t acpi_pm_read(struct clocksource *cs) 62 { 63 return (cycle_t)read_pmtmr(); 64 } 65 66 static struct clocksource clocksource_acpi_pm = { 67 .name = "acpi_pm", 68 .rating = 200, 69 .read = acpi_pm_read, 70 .mask = (cycle_t)ACPI_PM_MASK, 71 .mult = 0, /*to be calculated*/ 72 .shift = 22, 73 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 74 75 }; 76 77 78 #ifdef CONFIG_PCI 79 static int __devinitdata acpi_pm_good; 80 static int __init acpi_pm_good_setup(char *__str) 81 { 82 acpi_pm_good = 1; 83 return 1; 84 } 85 __setup("acpi_pm_good", acpi_pm_good_setup); 86 87 static cycle_t acpi_pm_read_slow(struct clocksource *cs) 88 { 89 return (cycle_t)acpi_pm_read_verified(); 90 } 91 92 static inline void acpi_pm_need_workaround(void) 93 { 94 clocksource_acpi_pm.read = acpi_pm_read_slow; 95 clocksource_acpi_pm.rating = 120; 96 } 97 98 /* 99 * PIIX4 Errata: 100 * 101 * The power management timer may return improper results when read. 102 * Although the timer value settles properly after incrementing, 103 * while incrementing there is a 3 ns window every 69.8 ns where the 104 * timer value is indeterminate (a 4.2% chance that the data will be 105 * incorrect when read). As a result, the ACPI free running count up 106 * timer specification is violated due to erroneous reads. 107 */ 108 static void __devinit acpi_pm_check_blacklist(struct pci_dev *dev) 109 { 110 if (acpi_pm_good) 111 return; 112 113 /* the bug has been fixed in PIIX4M */ 114 if (dev->revision < 3) { 115 printk(KERN_WARNING "* Found PM-Timer Bug on the chipset." 116 " Due to workarounds for a bug,\n" 117 "* this clock source is slow. Consider trying" 118 " other clock sources\n"); 119 120 acpi_pm_need_workaround(); 121 } 122 } 123 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, 124 acpi_pm_check_blacklist); 125 126 static void __devinit acpi_pm_check_graylist(struct pci_dev *dev) 127 { 128 if (acpi_pm_good) 129 return; 130 131 printk(KERN_WARNING "* The chipset may have PM-Timer Bug. Due to" 132 " workarounds for a bug,\n" 133 "* this clock source is slow. If you are sure your timer" 134 " does not have\n" 135 "* this bug, please use \"acpi_pm_good\" to disable the" 136 " workaround\n"); 137 138 acpi_pm_need_workaround(); 139 } 140 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, 141 acpi_pm_check_graylist); 142 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE, 143 acpi_pm_check_graylist); 144 #endif 145 146 #ifndef CONFIG_X86_64 147 #include <asm/mach_timer.h> 148 #define PMTMR_EXPECTED_RATE \ 149 ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (CLOCK_TICK_RATE>>10)) 150 /* 151 * Some boards have the PMTMR running way too fast. We check 152 * the PMTMR rate against PIT channel 2 to catch these cases. 153 */ 154 static int verify_pmtmr_rate(void) 155 { 156 cycle_t value1, value2; 157 unsigned long count, delta; 158 159 mach_prepare_counter(); 160 value1 = clocksource_acpi_pm.read(&clocksource_acpi_pm); 161 mach_countup(&count); 162 value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm); 163 delta = (value2 - value1) & ACPI_PM_MASK; 164 165 /* Check that the PMTMR delta is within 5% of what we expect */ 166 if (delta < (PMTMR_EXPECTED_RATE * 19) / 20 || 167 delta > (PMTMR_EXPECTED_RATE * 21) / 20) { 168 printk(KERN_INFO "PM-Timer running at invalid rate: %lu%% " 169 "of normal - aborting.\n", 170 100UL * delta / PMTMR_EXPECTED_RATE); 171 return -1; 172 } 173 174 return 0; 175 } 176 #else 177 #define verify_pmtmr_rate() (0) 178 #endif 179 180 /* Number of monotonicity checks to perform during initialization */ 181 #define ACPI_PM_MONOTONICITY_CHECKS 10 182 /* Number of reads we try to get two different values */ 183 #define ACPI_PM_READ_CHECKS 10000 184 185 static int __init init_acpi_pm_clocksource(void) 186 { 187 cycle_t value1, value2; 188 unsigned int i, j = 0; 189 190 if (!pmtmr_ioport) 191 return -ENODEV; 192 193 clocksource_acpi_pm.mult = clocksource_hz2mult(PMTMR_TICKS_PER_SEC, 194 clocksource_acpi_pm.shift); 195 196 /* "verify" this timing source: */ 197 for (j = 0; j < ACPI_PM_MONOTONICITY_CHECKS; j++) { 198 udelay(100 * j); 199 value1 = clocksource_acpi_pm.read(&clocksource_acpi_pm); 200 for (i = 0; i < ACPI_PM_READ_CHECKS; i++) { 201 value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm); 202 if (value2 == value1) 203 continue; 204 if (value2 > value1) 205 break; 206 if ((value2 < value1) && ((value2) < 0xFFF)) 207 break; 208 printk(KERN_INFO "PM-Timer had inconsistent results:" 209 " 0x%#llx, 0x%#llx - aborting.\n", 210 value1, value2); 211 return -EINVAL; 212 } 213 if (i == ACPI_PM_READ_CHECKS) { 214 printk(KERN_INFO "PM-Timer failed consistency check " 215 " (0x%#llx) - aborting.\n", value1); 216 return -ENODEV; 217 } 218 } 219 220 if (verify_pmtmr_rate() != 0) 221 return -ENODEV; 222 223 return clocksource_register(&clocksource_acpi_pm); 224 } 225 226 /* We use fs_initcall because we want the PCI fixups to have run 227 * but we still need to load before device_initcall 228 */ 229 fs_initcall(init_acpi_pm_clocksource); 230 231 /* 232 * Allow an override of the IOPort. Stupid BIOSes do not tell us about 233 * the PMTimer, but we might know where it is. 234 */ 235 static int __init parse_pmtmr(char *arg) 236 { 237 unsigned long base; 238 239 if (strict_strtoul(arg, 16, &base)) 240 return -EINVAL; 241 #ifdef CONFIG_X86_64 242 if (base > UINT_MAX) 243 return -ERANGE; 244 #endif 245 printk(KERN_INFO "PMTMR IOPort override: 0x%04x -> 0x%04lx\n", 246 pmtmr_ioport, base); 247 pmtmr_ioport = base; 248 249 return 1; 250 } 251 __setup("pmtmr=", parse_pmtmr); 252