xref: /openbmc/linux/drivers/clocksource/acpi_pm.c (revision 9ac8d3fb)
1 /*
2  * linux/drivers/clocksource/acpi_pm.c
3  *
4  * This file contains the ACPI PM based clocksource.
5  *
6  * This code was largely moved from the i386 timer_pm.c file
7  * which was (C) Dominik Brodowski <linux@brodo.de> 2003
8  * and contained the following comments:
9  *
10  * Driver to use the Power Management Timer (PMTMR) available in some
11  * southbridges as primary timing source for the Linux kernel.
12  *
13  * Based on parts of linux/drivers/acpi/hardware/hwtimer.c, timer_pit.c,
14  * timer_hpet.c, and on Arjan van de Ven's implementation for 2.4.
15  *
16  * This file is licensed under the GPL v2.
17  */
18 
19 #include <linux/acpi_pmtmr.h>
20 #include <linux/clocksource.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/pci.h>
24 #include <linux/delay.h>
25 #include <asm/io.h>
26 
27 /*
28  * The I/O port the PMTMR resides at.
29  * The location is detected during setup_arch(),
30  * in arch/i386/kernel/acpi/boot.c
31  */
32 u32 pmtmr_ioport __read_mostly;
33 
34 static inline u32 read_pmtmr(void)
35 {
36 	/* mask the output to 24 bits */
37 	return inl(pmtmr_ioport) & ACPI_PM_MASK;
38 }
39 
40 u32 acpi_pm_read_verified(void)
41 {
42 	u32 v1 = 0, v2 = 0, v3 = 0;
43 
44 	/*
45 	 * It has been reported that because of various broken
46 	 * chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM clock
47 	 * source is not latched, you must read it multiple
48 	 * times to ensure a safe value is read:
49 	 */
50 	do {
51 		v1 = read_pmtmr();
52 		v2 = read_pmtmr();
53 		v3 = read_pmtmr();
54 	} while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1)
55 			  || (v3 > v1 && v3 < v2)));
56 
57 	return v2;
58 }
59 
60 static cycle_t acpi_pm_read_slow(void)
61 {
62 	return (cycle_t)acpi_pm_read_verified();
63 }
64 
65 static cycle_t acpi_pm_read(void)
66 {
67 	return (cycle_t)read_pmtmr();
68 }
69 
70 static struct clocksource clocksource_acpi_pm = {
71 	.name		= "acpi_pm",
72 	.rating		= 200,
73 	.read		= acpi_pm_read,
74 	.mask		= (cycle_t)ACPI_PM_MASK,
75 	.mult		= 0, /*to be calculated*/
76 	.shift		= 22,
77 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
78 
79 };
80 
81 
82 #ifdef CONFIG_PCI
83 static int __devinitdata acpi_pm_good;
84 static int __init acpi_pm_good_setup(char *__str)
85 {
86 	acpi_pm_good = 1;
87 	return 1;
88 }
89 __setup("acpi_pm_good", acpi_pm_good_setup);
90 
91 static inline void acpi_pm_need_workaround(void)
92 {
93 	clocksource_acpi_pm.read = acpi_pm_read_slow;
94 	clocksource_acpi_pm.rating = 120;
95 }
96 
97 /*
98  * PIIX4 Errata:
99  *
100  * The power management timer may return improper results when read.
101  * Although the timer value settles properly after incrementing,
102  * while incrementing there is a 3 ns window every 69.8 ns where the
103  * timer value is indeterminate (a 4.2% chance that the data will be
104  * incorrect when read). As a result, the ACPI free running count up
105  * timer specification is violated due to erroneous reads.
106  */
107 static void __devinit acpi_pm_check_blacklist(struct pci_dev *dev)
108 {
109 	if (acpi_pm_good)
110 		return;
111 
112 	/* the bug has been fixed in PIIX4M */
113 	if (dev->revision < 3) {
114 		printk(KERN_WARNING "* Found PM-Timer Bug on the chipset."
115 		       " Due to workarounds for a bug,\n"
116 		       "* this clock source is slow. Consider trying"
117 		       " other clock sources\n");
118 
119 		acpi_pm_need_workaround();
120 	}
121 }
122 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3,
123 			acpi_pm_check_blacklist);
124 
125 static void __devinit acpi_pm_check_graylist(struct pci_dev *dev)
126 {
127 	if (acpi_pm_good)
128 		return;
129 
130 	printk(KERN_WARNING "* The chipset may have PM-Timer Bug. Due to"
131 	       " workarounds for a bug,\n"
132 	       "* this clock source is slow. If you are sure your timer"
133 	       " does not have\n"
134 	       "* this bug, please use \"acpi_pm_good\" to disable the"
135 	       " workaround\n");
136 
137 	acpi_pm_need_workaround();
138 }
139 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0,
140 			acpi_pm_check_graylist);
141 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE,
142 			acpi_pm_check_graylist);
143 #endif
144 
145 #ifndef CONFIG_X86_64
146 #include "mach_timer.h"
147 #define PMTMR_EXPECTED_RATE \
148   ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (CLOCK_TICK_RATE>>10))
149 /*
150  * Some boards have the PMTMR running way too fast. We check
151  * the PMTMR rate against PIT channel 2 to catch these cases.
152  */
153 static int verify_pmtmr_rate(void)
154 {
155 	cycle_t value1, value2;
156 	unsigned long count, delta;
157 
158 	mach_prepare_counter();
159 	value1 = clocksource_acpi_pm.read();
160 	mach_countup(&count);
161 	value2 = clocksource_acpi_pm.read();
162 	delta = (value2 - value1) & ACPI_PM_MASK;
163 
164 	/* Check that the PMTMR delta is within 5% of what we expect */
165 	if (delta < (PMTMR_EXPECTED_RATE * 19) / 20 ||
166 	    delta > (PMTMR_EXPECTED_RATE * 21) / 20) {
167 		printk(KERN_INFO "PM-Timer running at invalid rate: %lu%% "
168 			"of normal - aborting.\n",
169 			100UL * delta / PMTMR_EXPECTED_RATE);
170 		return -1;
171 	}
172 
173 	return 0;
174 }
175 #else
176 #define verify_pmtmr_rate() (0)
177 #endif
178 
179 /* Number of monotonicity checks to perform during initialization */
180 #define ACPI_PM_MONOTONICITY_CHECKS 10
181 /* Number of reads we try to get two different values */
182 #define ACPI_PM_READ_CHECKS 10000
183 
184 static int __init init_acpi_pm_clocksource(void)
185 {
186 	cycle_t value1, value2;
187 	unsigned int i, j = 0;
188 
189 	if (!pmtmr_ioport)
190 		return -ENODEV;
191 
192 	clocksource_acpi_pm.mult = clocksource_hz2mult(PMTMR_TICKS_PER_SEC,
193 						clocksource_acpi_pm.shift);
194 
195 	/* "verify" this timing source: */
196 	for (j = 0; j < ACPI_PM_MONOTONICITY_CHECKS; j++) {
197 		udelay(100 * j);
198 		value1 = clocksource_acpi_pm.read();
199 		for (i = 0; i < ACPI_PM_READ_CHECKS; i++) {
200 			value2 = clocksource_acpi_pm.read();
201 			if (value2 == value1)
202 				continue;
203 			if (value2 > value1)
204 				break;
205 			if ((value2 < value1) && ((value2) < 0xFFF))
206 				break;
207 			printk(KERN_INFO "PM-Timer had inconsistent results:"
208 			       " 0x%#llx, 0x%#llx - aborting.\n",
209 			       value1, value2);
210 			return -EINVAL;
211 		}
212 		if (i == ACPI_PM_READ_CHECKS) {
213 			printk(KERN_INFO "PM-Timer failed consistency check "
214 			       " (0x%#llx) - aborting.\n", value1);
215 			return -ENODEV;
216 		}
217 	}
218 
219 	if (verify_pmtmr_rate() != 0)
220 		return -ENODEV;
221 
222 	return clocksource_register(&clocksource_acpi_pm);
223 }
224 
225 /* We use fs_initcall because we want the PCI fixups to have run
226  * but we still need to load before device_initcall
227  */
228 fs_initcall(init_acpi_pm_clocksource);
229 
230 /*
231  * Allow an override of the IOPort. Stupid BIOSes do not tell us about
232  * the PMTimer, but we might know where it is.
233  */
234 static int __init parse_pmtmr(char *arg)
235 {
236 	unsigned long base;
237 
238 	if (strict_strtoul(arg, 16, &base))
239 		return -EINVAL;
240 #ifdef CONFIG_X86_64
241 	if (base > UINT_MAX)
242 		return -ERANGE;
243 #endif
244 	printk(KERN_INFO "PMTMR IOPort override: 0x%04x -> 0x%04lx\n",
245 	       pmtmr_ioport, base);
246 	pmtmr_ioport = base;
247 
248 	return 1;
249 }
250 __setup("pmtmr=", parse_pmtmr);
251