1ae278a93SStephen Warrenconfig CLKSRC_OF 2ae278a93SStephen Warren bool 3ae278a93SStephen Warren 489c0b8e2SRussell Kingconfig CLKSRC_I8253 589c0b8e2SRussell King bool 6442c8176SRussell King 7e6220bdcSThomas Gleixnerconfig CLKEVT_I8253 8e6220bdcSThomas Gleixner bool 9e6220bdcSThomas Gleixner 1015f304b6SRalf Baechleconfig I8253_LOCK 1115f304b6SRalf Baechle bool 1215f304b6SRalf Baechle 1315f304b6SRalf Baechleconfig CLKBLD_I8253 14e6220bdcSThomas Gleixner def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK 1515f304b6SRalf Baechle 16442c8176SRussell Kingconfig CLKSRC_MMIO 17442c8176SRussell King bool 1806c3df49SJamie Iles 1906c3df49SJamie Ilesconfig DW_APB_TIMER 2006c3df49SJamie Iles bool 21489bcceaSMattias Wallin 22cfda5901SDinh Nguyenconfig DW_APB_TIMER_OF 23cfda5901SDinh Nguyen bool 241b4eca0fSHeiko Stuebner select DW_APB_TIMER 2510021488SHeiko Stuebner select CLKSRC_OF 26cfda5901SDinh Nguyen 276fe9cbd1SGregory CLEMENTconfig ARMADA_370_XP_TIMER 286fe9cbd1SGregory CLEMENT bool 296fe9cbd1SGregory CLEMENT 300c1dcfd5SSebastian Hesselbarthconfig ORION_TIMER 310c1dcfd5SSebastian Hesselbarth select CLKSRC_OF 320c1dcfd5SSebastian Hesselbarth select CLKSRC_MMIO 330c1dcfd5SSebastian Hesselbarth bool 340c1dcfd5SSebastian Hesselbarth 35119fd635SMaxime Ripardconfig SUN4I_TIMER 36b2ac5d75SMaxime Ripard bool 37b2ac5d75SMaxime Ripard 38ff7ec345STony Priskconfig VT8500_TIMER 39ff7ec345STony Prisk bool 40ff7ec345STony Prisk 414f0f234fSMichal Simekconfig CADENCE_TTC_TIMER 424f0f234fSMichal Simek bool 434f0f234fSMichal Simek 44694e33a7SLinus Walleijconfig CLKSRC_NOMADIK_MTU 45694e33a7SLinus Walleij bool 46694e33a7SLinus Walleij depends on (ARCH_NOMADIK || ARCH_U8500) 47694e33a7SLinus Walleij select CLKSRC_MMIO 48694e33a7SLinus Walleij help 49694e33a7SLinus Walleij Support for Multi Timer Unit. MTU provides access 50694e33a7SLinus Walleij to multiple interrupt generating programmable 51694e33a7SLinus Walleij 32-bit free running decrementing counters. 52694e33a7SLinus Walleij 53694e33a7SLinus Walleijconfig CLKSRC_NOMADIK_MTU_SCHED_CLOCK 54694e33a7SLinus Walleij bool 55694e33a7SLinus Walleij depends on CLKSRC_NOMADIK_MTU 56694e33a7SLinus Walleij help 57694e33a7SLinus Walleij Use the Multi Timer Unit as the sched_clock. 58694e33a7SLinus Walleij 59489bcceaSMattias Wallinconfig CLKSRC_DBX500_PRCMU 60489bcceaSMattias Wallin bool "Clocksource PRCMU Timer" 6129746f48SLinus Walleij depends on UX500_SOC_DB8500 62489bcceaSMattias Wallin default y 63489bcceaSMattias Wallin help 64489bcceaSMattias Wallin Use the always on PRCMU Timer as clocksource 65489bcceaSMattias Wallin 66489bcceaSMattias Wallinconfig CLKSRC_DBX500_PRCMU_SCHED_CLOCK 67489bcceaSMattias Wallin bool "Clocksource PRCMU Timer sched_clock" 68694e33a7SLinus Walleij depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK) 69489bcceaSMattias Wallin default y 70489bcceaSMattias Wallin help 71489bcceaSMattias Wallin Use the always on PRCMU Timer as sched_clock 72985c0679SMarc Zyngier 738a4da6e3SMark Rutlandconfig ARM_ARCH_TIMER 748a4da6e3SMark Rutland bool 750583fe47SRob Herring select CLKSRC_OF if OF 76a2c5d4edSJames Hogan 77037f6377SWill Deaconconfig ARM_ARCH_TIMER_EVTSTREAM 78037f6377SWill Deacon bool "Support for ARM architected timer event stream generation" 79037f6377SWill Deacon default y if ARM_ARCH_TIMER 80037f6377SWill Deacon help 81037f6377SWill Deacon This option enables support for event stream generation based on 82037f6377SWill Deacon the ARM architected timer. It is used for waking up CPUs executing 83037f6377SWill Deacon the wfe instruction at a frequency represented as a power-of-2 84037f6377SWill Deacon divisor of the clock rate. 85037f6377SWill Deacon The main use of the event stream is wfe-based timeouts of userspace 86037f6377SWill Deacon locking implementations. It might also be useful for imposing timeout 87037f6377SWill Deacon on wfe to safeguard against any programming errors in case an expected 88037f6377SWill Deacon event is not generated. 89037f6377SWill Deacon This must be disabled for hardware validation purposes to detect any 90037f6377SWill Deacon hardware anomalies of missing events. 91037f6377SWill Deacon 92c1b40e44SStuart Menefyconfig ARM_GLOBAL_TIMER 93c1b40e44SStuart Menefy bool 94c1b40e44SStuart Menefy select CLKSRC_OF if OF 95c1b40e44SStuart Menefy help 96c1b40e44SStuart Menefy This options enables support for the ARM global timer unit 97c1b40e44SStuart Menefy 98c1b40e44SStuart Menefyconfig CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK 99c1b40e44SStuart Menefy bool 100c1b40e44SStuart Menefy depends on ARM_GLOBAL_TIMER 101c1b40e44SStuart Menefy default y 102c1b40e44SStuart Menefy help 103c1b40e44SStuart Menefy Use ARM global timer clock source as sched_clock 104c1b40e44SStuart Menefy 105a2c5d4edSJames Hoganconfig CLKSRC_METAG_GENERIC 106a2c5d4edSJames Hogan def_bool y if METAG 107a2c5d4edSJames Hogan help 108a2c5d4edSJames Hogan This option enables support for the Meta per-thread timers. 1096938d75aSThomas Abraham 1106938d75aSThomas Abrahamconfig CLKSRC_EXYNOS_MCT 1116938d75aSThomas Abraham def_bool y if ARCH_EXYNOS 1126938d75aSThomas Abraham help 1136938d75aSThomas Abraham Support for Multi Core Timer controller on Exynos SoCs. 114241a9871SArnd Bergmann 115f1189989STomasz Figaconfig CLKSRC_SAMSUNG_PWM 11677d84434STomasz Figa bool 117f1189989STomasz Figa help 118f1189989STomasz Figa This is a new clocksource driver for the PWM timer found in 119f1189989STomasz Figa Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver 120f1189989STomasz Figa for all devicetree enabled platforms. This driver will be 121f1189989STomasz Figa needed only on systems that do not have the Exynos MCT available. 122c1967249SJingchang Lu 123c1967249SJingchang Luconfig VF_PIT_TIMER 124c1967249SJingchang Lu bool 125c1967249SJingchang Lu help 126c1967249SJingchang Lu Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. 127