1a2fe7baaSMichael Tretter# SPDX-License-Identifier: GPL-2.0 2a2fe7baaSMichael Tretter 3a2fe7baaSMichael Tretterconfig XILINX_VCU 4a2fe7baaSMichael Tretter tristate "Xilinx VCU logicoreIP Init" 5a2fe7baaSMichael Tretter depends on HAS_IOMEM && COMMON_CLK 6a2fe7baaSMichael Tretter select REGMAP_MMIO 7a2fe7baaSMichael Tretter help 8a2fe7baaSMichael Tretter Provides the driver to enable and disable the isolation between the 9a2fe7baaSMichael Tretter processing system and programmable logic part by using the logicoreIP 10a2fe7baaSMichael Tretter register set. This driver also configures the frequency based on the 11a2fe7baaSMichael Tretter clock information from the logicoreIP register set. 12a2fe7baaSMichael Tretter 13a2fe7baaSMichael Tretter If you say yes here you get support for the logicoreIP. 14a2fe7baaSMichael Tretter 15a2fe7baaSMichael Tretter If unsure, say N. 16a2fe7baaSMichael Tretter 17a2fe7baaSMichael Tretter To compile this driver as a module, choose M here: the 18a2fe7baaSMichael Tretter module will be called xlnx_vcu. 19a2fe7baaSMichael Tretter 20*c822490fSShubhrajyoti Dattaconfig COMMON_CLK_XLNX_CLKWZRD 21*c822490fSShubhrajyoti Datta tristate "Xilinx Clocking Wizard" 22*c822490fSShubhrajyoti Datta depends on COMMON_CLK && OF 23*c822490fSShubhrajyoti Datta help 24*c822490fSShubhrajyoti Datta Support for the Xilinx Clocking Wizard IP core clock generator. 25*c822490fSShubhrajyoti Datta Adds support for clocking wizard and compatible. 26*c822490fSShubhrajyoti Datta This driver supports the Xilinx clocking wizard programmable clock 27*c822490fSShubhrajyoti Datta synthesizer. The number of output is configurable in the design. 28*c822490fSShubhrajyoti Datta 29*c822490fSShubhrajyoti Datta If unsure, say N. 30*c822490fSShubhrajyoti Datta 31