1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2021 TOSHIBA CORPORATION 4 * Copyright (c) 2021 Toshiba Electronic Devices & Storage Corporation 5 * 6 * Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> 7 */ 8 9 #ifndef _VISCONTI_PLL_H_ 10 #define _VISCONTI_PLL_H_ 11 12 #include <linux/clk-provider.h> 13 #include <linux/regmap.h> 14 #include <linux/spinlock.h> 15 16 struct visconti_pll_provider { 17 void __iomem *reg_base; 18 struct device_node *node; 19 20 /* Must be last */ 21 struct clk_hw_onecell_data clk_data; 22 }; 23 24 #define VISCONTI_PLL_RATE(_rate, _dacen, _dsmen, \ 25 _refdiv, _intin, _fracin, _postdiv1, _postdiv2) \ 26 { \ 27 .rate = _rate, \ 28 .dacen = _dacen, \ 29 .dsmen = _dsmen, \ 30 .refdiv = _refdiv, \ 31 .intin = _intin, \ 32 .fracin = _fracin, \ 33 .postdiv1 = _postdiv1, \ 34 .postdiv2 = _postdiv2 \ 35 } 36 37 struct visconti_pll_rate_table { 38 unsigned long rate; 39 unsigned int dacen; 40 unsigned int dsmen; 41 unsigned int refdiv; 42 unsigned long intin; 43 unsigned long fracin; 44 unsigned int postdiv1; 45 unsigned int postdiv2; 46 }; 47 48 struct visconti_pll_info { 49 unsigned int id; 50 const char *name; 51 const char *parent; 52 unsigned long base_reg; 53 const struct visconti_pll_rate_table *rate_table; 54 }; 55 56 struct visconti_pll_provider * __init visconti_init_pll(struct device_node *np, 57 void __iomem *base, 58 unsigned long nr_plls); 59 void visconti_register_plls(struct visconti_pll_provider *ctx, 60 const struct visconti_pll_info *list, 61 unsigned int nr_plls, spinlock_t *lock); 62 63 #endif /* _VISCONTI_PLL_H_ */ 64