1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2021 TOSHIBA CORPORATION 4 * Copyright (c) 2021 Toshiba Electronic Devices & Storage Corporation 5 * 6 * Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> 7 */ 8 9 #ifndef _VISCONTI_PLL_H_ 10 #define _VISCONTI_PLL_H_ 11 12 #include <linux/clk-provider.h> 13 #include <linux/regmap.h> 14 #include <linux/spinlock.h> 15 16 struct visconti_pll_provider { 17 void __iomem *reg_base; 18 struct regmap *regmap; 19 struct clk_hw_onecell_data clk_data; 20 struct device_node *node; 21 }; 22 23 #define VISCONTI_PLL_RATE(_rate, _dacen, _dsmen, \ 24 _refdiv, _intin, _fracin, _postdiv1, _postdiv2) \ 25 { \ 26 .rate = _rate, \ 27 .dacen = _dacen, \ 28 .dsmen = _dsmen, \ 29 .refdiv = _refdiv, \ 30 .intin = _intin, \ 31 .fracin = _fracin, \ 32 .postdiv1 = _postdiv1, \ 33 .postdiv2 = _postdiv2 \ 34 } 35 36 struct visconti_pll_rate_table { 37 unsigned long rate; 38 unsigned int dacen; 39 unsigned int dsmen; 40 unsigned int refdiv; 41 unsigned long intin; 42 unsigned long fracin; 43 unsigned int postdiv1; 44 unsigned int postdiv2; 45 }; 46 47 struct visconti_pll_info { 48 unsigned int id; 49 const char *name; 50 const char *parent; 51 unsigned long base_reg; 52 const struct visconti_pll_rate_table *rate_table; 53 }; 54 55 struct visconti_pll_provider * __init visconti_init_pll(struct device_node *np, 56 void __iomem *base, 57 unsigned long nr_plls); 58 void visconti_register_plls(struct visconti_pll_provider *ctx, 59 const struct visconti_pll_info *list, 60 unsigned int nr_plls, spinlock_t *lock); 61 62 #endif /* _VISCONTI_PLL_H_ */ 63