1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/arch/arm/common/icst307.c 4 * 5 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved. 6 * 7 * Support functions for calculating clocks/divisors for the ICST307 8 * clock generators. See http://www.idt.com/ for more information 9 * on these devices. 10 * 11 * This is an almost identical implementation to the ICST525 clock generator. 12 * The s2div and idx2s files are different 13 */ 14 #include <linux/module.h> 15 #include <linux/kernel.h> 16 #include <asm/div64.h> 17 #include "icst.h" 18 19 /* 20 * Divisors for each OD setting. 21 */ 22 const unsigned char icst307_s2div[8] = { 10, 2, 8, 4, 5, 7, 3, 6 }; 23 const unsigned char icst525_s2div[8] = { 10, 2, 8, 4, 5, 7, 9, 6 }; 24 EXPORT_SYMBOL(icst307_s2div); 25 EXPORT_SYMBOL(icst525_s2div); 26 27 unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco) 28 { 29 u64 dividend = p->ref * 2 * (u64)(vco.v + 8); 30 u32 divisor = (vco.r + 2) * p->s2div[vco.s]; 31 32 do_div(dividend, divisor); 33 return (unsigned long)dividend; 34 } 35 36 EXPORT_SYMBOL(icst_hz); 37 38 /* 39 * Ascending divisor S values. 40 */ 41 const unsigned char icst307_idx2s[8] = { 1, 6, 3, 4, 7, 5, 2, 0 }; 42 const unsigned char icst525_idx2s[8] = { 1, 3, 4, 7, 5, 2, 6, 0 }; 43 EXPORT_SYMBOL(icst307_idx2s); 44 EXPORT_SYMBOL(icst525_idx2s); 45 46 struct icst_vco 47 icst_hz_to_vco(const struct icst_params *p, unsigned long freq) 48 { 49 struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max }; 50 unsigned long f; 51 unsigned int i = 0, rd, best = (unsigned int)-1; 52 53 /* 54 * First, find the PLL output divisor such 55 * that the PLL output is within spec. 56 */ 57 do { 58 f = freq * p->s2div[p->idx2s[i]]; 59 60 if (f > p->vco_min && f <= p->vco_max) 61 break; 62 i++; 63 } while (i < 8); 64 65 if (i >= 8) 66 return vco; 67 68 vco.s = p->idx2s[i]; 69 70 /* 71 * Now find the closest divisor combination 72 * which gives a PLL output of 'f'. 73 */ 74 for (rd = p->rd_min; rd <= p->rd_max; rd++) { 75 unsigned long fref_div, f_pll; 76 unsigned int vd; 77 int f_diff; 78 79 fref_div = (2 * p->ref) / rd; 80 81 vd = (f + fref_div / 2) / fref_div; 82 if (vd < p->vd_min || vd > p->vd_max) 83 continue; 84 85 f_pll = fref_div * vd; 86 f_diff = f_pll - f; 87 if (f_diff < 0) 88 f_diff = -f_diff; 89 90 if ((unsigned)f_diff < best) { 91 vco.v = vd - 8; 92 vco.r = rd - 2; 93 if (f_diff == 0) 94 break; 95 best = f_diff; 96 } 97 } 98 99 return vco; 100 } 101 102 EXPORT_SYMBOL(icst_hz_to_vco); 103