xref: /openbmc/linux/drivers/clk/ux500/reset-prcc.h (revision 2cf1c348)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef __RESET_PRCC_H
4 #define __RESET_PRCC_H
5 
6 #include <linux/reset-controller.h>
7 #include <linux/io.h>
8 
9 /**
10  * struct u8500_prcc_reset - U8500 PRCC reset controller state
11  * @rcdev: reset controller device
12  * @phy_base: the physical base address for each PRCC block
13  * @base: the remapped PRCC bases
14  */
15 struct u8500_prcc_reset {
16 	struct reset_controller_dev rcdev;
17 	u32 phy_base[CLKRST_MAX];
18 	void __iomem *base[CLKRST_MAX];
19 };
20 
21 void u8500_prcc_reset_init(struct device_node *np, struct u8500_prcc_reset *ur);
22 
23 #endif
24