1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Clocks for ux500 platforms 4 * 5 * Copyright (C) 2012 ST-Ericsson SA 6 * Author: Ulf Hansson <ulf.hansson@linaro.org> 7 */ 8 9 #ifndef __UX500_CLK_H 10 #define __UX500_CLK_H 11 12 #include <linux/device.h> 13 #include <linux/types.h> 14 15 struct clk; 16 17 struct clk *clk_reg_prcc_pclk(const char *name, 18 const char *parent_name, 19 resource_size_t phy_base, 20 u32 cg_sel, 21 unsigned long flags); 22 23 struct clk *clk_reg_prcc_kclk(const char *name, 24 const char *parent_name, 25 resource_size_t phy_base, 26 u32 cg_sel, 27 unsigned long flags); 28 29 struct clk *clk_reg_prcmu_scalable(const char *name, 30 const char *parent_name, 31 u8 cg_sel, 32 unsigned long rate, 33 unsigned long flags); 34 35 struct clk *clk_reg_prcmu_gate(const char *name, 36 const char *parent_name, 37 u8 cg_sel, 38 unsigned long flags); 39 40 struct clk *clk_reg_prcmu_scalable_rate(const char *name, 41 const char *parent_name, 42 u8 cg_sel, 43 unsigned long rate, 44 unsigned long flags); 45 46 struct clk *clk_reg_prcmu_rate(const char *name, 47 const char *parent_name, 48 u8 cg_sel, 49 unsigned long flags); 50 51 struct clk *clk_reg_prcmu_opp_gate(const char *name, 52 const char *parent_name, 53 u8 cg_sel, 54 unsigned long flags); 55 56 struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name, 57 const char *parent_name, 58 u8 cg_sel, 59 unsigned long rate, 60 unsigned long flags); 61 62 struct clk *clk_reg_sysctrl_gate(struct device *dev, 63 const char *name, 64 const char *parent_name, 65 u16 reg_sel, 66 u8 reg_mask, 67 u8 reg_bits, 68 unsigned long enable_delay_us, 69 unsigned long flags); 70 71 struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev, 72 const char *name, 73 const char *parent_name, 74 u16 reg_sel, 75 u8 reg_mask, 76 u8 reg_bits, 77 unsigned long rate, 78 unsigned long enable_delay_us, 79 unsigned long flags); 80 81 struct clk *clk_reg_sysctrl_set_parent(struct device *dev, 82 const char *name, 83 const char **parent_names, 84 u8 num_parents, 85 u16 *reg_sel, 86 u8 *reg_mask, 87 u8 *reg_bits, 88 unsigned long flags); 89 90 #endif /* __UX500_CLK_H */ 91