1 /*
2  * Copyright (C) 2016 Socionext Inc.
3  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #include <linux/clk-provider.h>
17 #include <linux/init.h>
18 #include <linux/mfd/syscon.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/platform_device.h>
22 
23 #include "clk-uniphier.h"
24 
25 static struct clk_hw *uniphier_clk_register(struct device *dev,
26 					    struct regmap *regmap,
27 					const struct uniphier_clk_data *data)
28 {
29 	switch (data->type) {
30 	case UNIPHIER_CLK_TYPE_CPUGEAR:
31 		return uniphier_clk_register_cpugear(dev, regmap, data->name,
32 						     &data->data.cpugear);
33 	case UNIPHIER_CLK_TYPE_FIXED_FACTOR:
34 		return uniphier_clk_register_fixed_factor(dev, data->name,
35 							  &data->data.factor);
36 	case UNIPHIER_CLK_TYPE_FIXED_RATE:
37 		return uniphier_clk_register_fixed_rate(dev, data->name,
38 							&data->data.rate);
39 	case UNIPHIER_CLK_TYPE_GATE:
40 		return uniphier_clk_register_gate(dev, regmap, data->name,
41 						  &data->data.gate);
42 	case UNIPHIER_CLK_TYPE_MUX:
43 		return uniphier_clk_register_mux(dev, regmap, data->name,
44 						 &data->data.mux);
45 	default:
46 		dev_err(dev, "unsupported clock type\n");
47 		return ERR_PTR(-EINVAL);
48 	}
49 }
50 
51 static int uniphier_clk_probe(struct platform_device *pdev)
52 {
53 	struct device *dev = &pdev->dev;
54 	struct clk_hw_onecell_data *hw_data;
55 	const struct uniphier_clk_data *p, *data;
56 	struct regmap *regmap;
57 	struct device_node *parent;
58 	int clk_num = 0;
59 
60 	data = of_device_get_match_data(dev);
61 	if (WARN_ON(!data))
62 		return -EINVAL;
63 
64 	parent = of_get_parent(dev->of_node); /* parent should be syscon node */
65 	regmap = syscon_node_to_regmap(parent);
66 	of_node_put(parent);
67 	if (IS_ERR(regmap)) {
68 		dev_err(dev, "failed to get regmap (error %ld)\n",
69 			PTR_ERR(regmap));
70 		return PTR_ERR(regmap);
71 	}
72 
73 	for (p = data; p->name; p++)
74 		clk_num = max(clk_num, p->idx + 1);
75 
76 	hw_data = devm_kzalloc(dev,
77 			sizeof(*hw_data) + clk_num * sizeof(struct clk_hw *),
78 			GFP_KERNEL);
79 	if (!hw_data)
80 		return -ENOMEM;
81 
82 	hw_data->num = clk_num;
83 
84 	/* avoid returning NULL for unused idx */
85 	while (--clk_num >= 0)
86 		hw_data->hws[clk_num] = ERR_PTR(-EINVAL);
87 
88 	for (p = data; p->name; p++) {
89 		struct clk_hw *hw;
90 
91 		dev_dbg(dev, "register %s (index=%d)\n", p->name, p->idx);
92 		hw = uniphier_clk_register(dev, regmap, p);
93 		if (WARN(IS_ERR(hw), "failed to register %s", p->name))
94 			continue;
95 
96 		if (p->idx >= 0)
97 			hw_data->hws[p->idx] = hw;
98 	}
99 
100 	return of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
101 				      hw_data);
102 }
103 
104 static int uniphier_clk_remove(struct platform_device *pdev)
105 {
106 	of_clk_del_provider(pdev->dev.of_node);
107 
108 	return 0;
109 }
110 
111 static const struct of_device_id uniphier_clk_match[] = {
112 	/* System clock */
113 	{
114 		.compatible = "socionext,uniphier-ld4-clock",
115 		.data = uniphier_ld4_sys_clk_data,
116 	},
117 	{
118 		.compatible = "socionext,uniphier-pro4-clock",
119 		.data = uniphier_pro4_sys_clk_data,
120 	},
121 	{
122 		.compatible = "socionext,uniphier-sld8-clock",
123 		.data = uniphier_sld8_sys_clk_data,
124 	},
125 	{
126 		.compatible = "socionext,uniphier-pro5-clock",
127 		.data = uniphier_pro5_sys_clk_data,
128 	},
129 	{
130 		.compatible = "socionext,uniphier-pxs2-clock",
131 		.data = uniphier_pxs2_sys_clk_data,
132 	},
133 	{
134 		.compatible = "socionext,uniphier-ld11-clock",
135 		.data = uniphier_ld11_sys_clk_data,
136 	},
137 	{
138 		.compatible = "socionext,uniphier-ld20-clock",
139 		.data = uniphier_ld20_sys_clk_data,
140 	},
141 	{
142 		.compatible = "socionext,uniphier-pxs3-clock",
143 		.data = uniphier_pxs3_sys_clk_data,
144 	},
145 	/* Media I/O clock, SD clock */
146 	{
147 		.compatible = "socionext,uniphier-ld4-mio-clock",
148 		.data = uniphier_ld4_mio_clk_data,
149 	},
150 	{
151 		.compatible = "socionext,uniphier-pro4-mio-clock",
152 		.data = uniphier_ld4_mio_clk_data,
153 	},
154 	{
155 		.compatible = "socionext,uniphier-sld8-mio-clock",
156 		.data = uniphier_ld4_mio_clk_data,
157 	},
158 	{
159 		.compatible = "socionext,uniphier-pro5-sd-clock",
160 		.data = uniphier_pro5_sd_clk_data,
161 	},
162 	{
163 		.compatible = "socionext,uniphier-pxs2-sd-clock",
164 		.data = uniphier_pro5_sd_clk_data,
165 	},
166 	{
167 		.compatible = "socionext,uniphier-ld11-mio-clock",
168 		.data = uniphier_ld4_mio_clk_data,
169 	},
170 	{
171 		.compatible = "socionext,uniphier-ld20-sd-clock",
172 		.data = uniphier_pro5_sd_clk_data,
173 	},
174 	{
175 		.compatible = "socionext,uniphier-pxs3-sd-clock",
176 		.data = uniphier_pro5_sd_clk_data,
177 	},
178 	/* Peripheral clock */
179 	{
180 		.compatible = "socionext,uniphier-ld4-peri-clock",
181 		.data = uniphier_ld4_peri_clk_data,
182 	},
183 	{
184 		.compatible = "socionext,uniphier-pro4-peri-clock",
185 		.data = uniphier_pro4_peri_clk_data,
186 	},
187 	{
188 		.compatible = "socionext,uniphier-sld8-peri-clock",
189 		.data = uniphier_ld4_peri_clk_data,
190 	},
191 	{
192 		.compatible = "socionext,uniphier-pro5-peri-clock",
193 		.data = uniphier_pro4_peri_clk_data,
194 	},
195 	{
196 		.compatible = "socionext,uniphier-pxs2-peri-clock",
197 		.data = uniphier_pro4_peri_clk_data,
198 	},
199 	{
200 		.compatible = "socionext,uniphier-ld11-peri-clock",
201 		.data = uniphier_pro4_peri_clk_data,
202 	},
203 	{
204 		.compatible = "socionext,uniphier-ld20-peri-clock",
205 		.data = uniphier_pro4_peri_clk_data,
206 	},
207 	{
208 		.compatible = "socionext,uniphier-pxs3-peri-clock",
209 		.data = uniphier_pro4_peri_clk_data,
210 	},
211 	{ /* sentinel */ }
212 };
213 
214 static struct platform_driver uniphier_clk_driver = {
215 	.probe = uniphier_clk_probe,
216 	.remove = uniphier_clk_remove,
217 	.driver = {
218 		.name = "uniphier-clk",
219 		.of_match_table = uniphier_clk_match,
220 	},
221 };
222 builtin_platform_driver(uniphier_clk_driver);
223