1 /* 2 * OMAP interface clock support 3 * 4 * Copyright (C) 2013 Texas Instruments, Inc. 5 * 6 * Tero Kristo <t-kristo@ti.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 13 * kind, whether express or implied; without even the implied warranty 14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/clk-provider.h> 19 #include <linux/slab.h> 20 #include <linux/of.h> 21 #include <linux/of_address.h> 22 #include <linux/clk/ti.h> 23 #include "clock.h" 24 25 #undef pr_fmt 26 #define pr_fmt(fmt) "%s: " fmt, __func__ 27 28 static const struct clk_ops ti_interface_clk_ops = { 29 .init = &omap2_init_clk_clkdm, 30 .enable = &omap2_dflt_clk_enable, 31 .disable = &omap2_dflt_clk_disable, 32 .is_enabled = &omap2_dflt_clk_is_enabled, 33 }; 34 35 static struct clk *_register_interface(struct device *dev, const char *name, 36 const char *parent_name, 37 struct clk_omap_reg *reg, u8 bit_idx, 38 const struct clk_hw_omap_ops *ops) 39 { 40 struct clk_init_data init = { NULL }; 41 struct clk_hw_omap *clk_hw; 42 struct clk *clk; 43 44 clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL); 45 if (!clk_hw) 46 return ERR_PTR(-ENOMEM); 47 48 clk_hw->hw.init = &init; 49 clk_hw->ops = ops; 50 memcpy(&clk_hw->enable_reg, reg, sizeof(*reg)); 51 clk_hw->enable_bit = bit_idx; 52 53 init.name = name; 54 init.ops = &ti_interface_clk_ops; 55 init.flags = 0; 56 57 init.num_parents = 1; 58 init.parent_names = &parent_name; 59 60 clk = ti_clk_register(NULL, &clk_hw->hw, name); 61 62 if (IS_ERR(clk)) 63 kfree(clk_hw); 64 else 65 omap2_init_clk_hw_omap_clocks(&clk_hw->hw); 66 67 return clk; 68 } 69 70 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS) 71 struct clk *ti_clk_register_interface(struct ti_clk *setup) 72 { 73 const struct clk_hw_omap_ops *ops = &clkhwops_iclk_wait; 74 struct clk_omap_reg reg; 75 struct ti_clk_gate *gate; 76 77 gate = setup->data; 78 reg.index = gate->module; 79 reg.offset = gate->reg; 80 reg.ptr = NULL; 81 82 if (gate->flags & CLKF_NO_WAIT) 83 ops = &clkhwops_iclk; 84 85 if (gate->flags & CLKF_HSOTGUSB) 86 ops = &clkhwops_omap3430es2_iclk_hsotgusb_wait; 87 88 if (gate->flags & CLKF_DSS) 89 ops = &clkhwops_omap3430es2_iclk_dss_usbhost_wait; 90 91 if (gate->flags & CLKF_SSI) 92 ops = &clkhwops_omap3430es2_iclk_ssi_wait; 93 94 if (gate->flags & CLKF_AM35XX) 95 ops = &clkhwops_am35xx_ipss_wait; 96 97 return _register_interface(NULL, setup->name, gate->parent, 98 ®, gate->bit_shift, ops); 99 } 100 #endif 101 102 static void __init _of_ti_interface_clk_setup(struct device_node *node, 103 const struct clk_hw_omap_ops *ops) 104 { 105 struct clk *clk; 106 const char *parent_name; 107 struct clk_omap_reg reg; 108 u8 enable_bit = 0; 109 u32 val; 110 111 if (ti_clk_get_reg_addr(node, 0, ®)) 112 return; 113 114 if (!of_property_read_u32(node, "ti,bit-shift", &val)) 115 enable_bit = val; 116 117 parent_name = of_clk_get_parent_name(node, 0); 118 if (!parent_name) { 119 pr_err("%s must have a parent\n", node->name); 120 return; 121 } 122 123 clk = _register_interface(NULL, node->name, parent_name, ®, 124 enable_bit, ops); 125 126 if (!IS_ERR(clk)) 127 of_clk_add_provider(node, of_clk_src_simple_get, clk); 128 } 129 130 static void __init of_ti_interface_clk_setup(struct device_node *node) 131 { 132 _of_ti_interface_clk_setup(node, &clkhwops_iclk_wait); 133 } 134 CLK_OF_DECLARE(ti_interface_clk, "ti,omap3-interface-clock", 135 of_ti_interface_clk_setup); 136 137 static void __init of_ti_no_wait_interface_clk_setup(struct device_node *node) 138 { 139 _of_ti_interface_clk_setup(node, &clkhwops_iclk); 140 } 141 CLK_OF_DECLARE(ti_no_wait_interface_clk, "ti,omap3-no-wait-interface-clock", 142 of_ti_no_wait_interface_clk_setup); 143 144 #ifdef CONFIG_ARCH_OMAP3 145 static void __init of_ti_hsotgusb_interface_clk_setup(struct device_node *node) 146 { 147 _of_ti_interface_clk_setup(node, 148 &clkhwops_omap3430es2_iclk_hsotgusb_wait); 149 } 150 CLK_OF_DECLARE(ti_hsotgusb_interface_clk, "ti,omap3-hsotgusb-interface-clock", 151 of_ti_hsotgusb_interface_clk_setup); 152 153 static void __init of_ti_dss_interface_clk_setup(struct device_node *node) 154 { 155 _of_ti_interface_clk_setup(node, 156 &clkhwops_omap3430es2_iclk_dss_usbhost_wait); 157 } 158 CLK_OF_DECLARE(ti_dss_interface_clk, "ti,omap3-dss-interface-clock", 159 of_ti_dss_interface_clk_setup); 160 161 static void __init of_ti_ssi_interface_clk_setup(struct device_node *node) 162 { 163 _of_ti_interface_clk_setup(node, &clkhwops_omap3430es2_iclk_ssi_wait); 164 } 165 CLK_OF_DECLARE(ti_ssi_interface_clk, "ti,omap3-ssi-interface-clock", 166 of_ti_ssi_interface_clk_setup); 167 168 static void __init of_ti_am35xx_interface_clk_setup(struct device_node *node) 169 { 170 _of_ti_interface_clk_setup(node, &clkhwops_am35xx_ipss_wait); 171 } 172 CLK_OF_DECLARE(ti_am35xx_interface_clk, "ti,am35xx-interface-clock", 173 of_ti_am35xx_interface_clk_setup); 174 #endif 175 176 #ifdef CONFIG_SOC_OMAP2430 177 static void __init of_ti_omap2430_interface_clk_setup(struct device_node *node) 178 { 179 _of_ti_interface_clk_setup(node, &clkhwops_omap2430_i2chs_wait); 180 } 181 CLK_OF_DECLARE(ti_omap2430_interface_clk, "ti,omap2430-interface-clock", 182 of_ti_omap2430_interface_clk_setup); 183 #endif 184