1 /* 2 * AM43XX Clock init 3 * 4 * Copyright (C) 2013 Texas Instruments, Inc 5 * Tero Kristo (t-kristo@ti.com) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation version 2. 10 * 11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 12 * kind, whether express or implied; without even the implied warranty 13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #include <linux/kernel.h> 18 #include <linux/list.h> 19 #include <linux/clk.h> 20 #include <linux/clk-provider.h> 21 #include <linux/clk/ti.h> 22 #include <dt-bindings/clock/am4.h> 23 24 #include "clock.h" 25 26 int __init am43xx_dt_clk_init(void) 27 { 28 struct clk *clk1, *clk2; 29 30 ti_dt_clocks_register(am43xx_compat_clks); 31 32 omap2_clk_disable_autoidle_all(); 33 34 ti_clk_add_aliases(); 35 36 /* 37 * cpsw_cpts_rft_clk has got the choice of 3 clocksources 38 * dpll_core_m4_ck, dpll_core_m5_ck and dpll_disp_m2_ck. 39 * By default dpll_core_m4_ck is selected, witn this as clock 40 * source the CPTS doesnot work properly. It gives clockcheck errors 41 * while running PTP. 42 * clockcheck: clock jumped backward or running slower than expected! 43 * By selecting dpll_core_m5_ck as the clocksource fixes this issue. 44 * In AM335x dpll_core_m5_ck is the default clocksource. 45 */ 46 clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk"); 47 clk2 = clk_get_sys(NULL, "dpll_core_m5_ck"); 48 clk_set_parent(clk1, clk2); 49 50 return 0; 51 } 52