1 /* 2 * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com> 3 * 4 * Based on clk-simple-gates.c, which is: 5 * Copyright 2015 Maxime Ripard 6 * 7 * Maxime Ripard <maxime.ripard@free-electrons.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 */ 19 20 #include <linux/clk-provider.h> 21 #include <linux/io.h> 22 #include <linux/of.h> 23 #include <linux/of_address.h> 24 #include <linux/slab.h> 25 #include <linux/spinlock.h> 26 27 static DEFINE_SPINLOCK(gates_lock); 28 29 static void __init sun8i_h3_bus_gates_init(struct device_node *node) 30 { 31 static const char * const names[] = { "ahb1", "ahb2", "apb1", "apb2" }; 32 enum { AHB1, AHB2, APB1, APB2, PARENT_MAX } clk_parent; 33 const char *parents[PARENT_MAX]; 34 struct clk_onecell_data *clk_data; 35 const char *clk_name; 36 struct property *prop; 37 struct resource res; 38 void __iomem *clk_reg; 39 void __iomem *reg; 40 const __be32 *p; 41 int number, i; 42 u8 clk_bit; 43 int index; 44 45 reg = of_io_request_and_map(node, 0, of_node_full_name(node)); 46 if (IS_ERR(reg)) 47 return; 48 49 for (i = 0; i < ARRAY_SIZE(names); i++) { 50 int idx = of_property_match_string(node, "clock-names", 51 names[i]); 52 if (idx < 0) 53 return; 54 55 parents[i] = of_clk_get_parent_name(node, idx); 56 } 57 58 clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); 59 if (!clk_data) 60 goto err_unmap; 61 62 number = of_property_count_u32_elems(node, "clock-indices"); 63 of_property_read_u32_index(node, "clock-indices", number - 1, &number); 64 65 clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL); 66 if (!clk_data->clks) 67 goto err_free_data; 68 69 i = 0; 70 of_property_for_each_u32(node, "clock-indices", prop, p, index) { 71 of_property_read_string_index(node, "clock-output-names", 72 i, &clk_name); 73 74 if (index == 17 || (index >= 29 && index <= 31)) 75 clk_parent = AHB2; 76 else if (index <= 63 || index >= 128) 77 clk_parent = AHB1; 78 else if (index >= 64 && index <= 95) 79 clk_parent = APB1; 80 else if (index >= 96 && index <= 127) 81 clk_parent = APB2; 82 else { 83 WARN_ON(true); 84 continue; 85 } 86 87 clk_reg = reg + 4 * (index / 32); 88 clk_bit = index % 32; 89 90 clk_data->clks[index] = clk_register_gate(NULL, clk_name, 91 parents[clk_parent], 92 0, clk_reg, clk_bit, 93 0, &gates_lock); 94 i++; 95 96 if (IS_ERR(clk_data->clks[index])) { 97 WARN_ON(true); 98 continue; 99 } 100 } 101 102 clk_data->clk_num = number + 1; 103 of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); 104 105 return; 106 107 err_free_data: 108 kfree(clk_data); 109 err_unmap: 110 iounmap(reg); 111 of_address_to_resource(node, 0, &res); 112 release_mem_region(res.start, resource_size(&res)); 113 } 114 115 CLK_OF_DECLARE(sun8i_h3_bus_gates, "allwinner,sun8i-h3-bus-gates-clk", 116 sun8i_h3_bus_gates_init); 117 CLK_OF_DECLARE(sun8i_a83t_bus_gates, "allwinner,sun8i-a83t-bus-gates-clk", 118 sun8i_h3_bus_gates_init); 119