1 /*
2  * Copyright (C) 2014 Free Electrons
3  *
4  * License Terms: GNU General Public License v2
5  * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
6  *
7  * Allwinner A31 APB0 clock driver
8  *
9  */
10 
11 #include <linux/clk-provider.h>
12 #include <linux/init.h>
13 #include <linux/of.h>
14 #include <linux/platform_device.h>
15 
16 /*
17  * The APB0 clk has a configurable divisor.
18  *
19  * We must use a clk_div_table and not a regular power of 2
20  * divisor here, because the first 2 values divide the clock
21  * by 2.
22  */
23 static const struct clk_div_table sun6i_a31_apb0_divs[] = {
24 	{ .val = 0, .div = 2, },
25 	{ .val = 1, .div = 2, },
26 	{ .val = 2, .div = 4, },
27 	{ .val = 3, .div = 8, },
28 	{ /* sentinel */ },
29 };
30 
31 static int sun6i_a31_apb0_clk_probe(struct platform_device *pdev)
32 {
33 	struct device_node *np = pdev->dev.of_node;
34 	const char *clk_name = np->name;
35 	const char *clk_parent;
36 	struct resource *r;
37 	void __iomem *reg;
38 	struct clk *clk;
39 
40 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
41 	reg = devm_ioremap_resource(&pdev->dev, r);
42 	if (IS_ERR(reg))
43 		return PTR_ERR(reg);
44 
45 	clk_parent = of_clk_get_parent_name(np, 0);
46 	if (!clk_parent)
47 		return -EINVAL;
48 
49 	of_property_read_string(np, "clock-output-names", &clk_name);
50 
51 	clk = clk_register_divider_table(&pdev->dev, clk_name, clk_parent,
52 					 0, reg, 0, 2, 0, sun6i_a31_apb0_divs,
53 					 NULL);
54 	if (IS_ERR(clk))
55 		return PTR_ERR(clk);
56 
57 	return of_clk_add_provider(np, of_clk_src_simple_get, clk);
58 }
59 
60 static const struct of_device_id sun6i_a31_apb0_clk_dt_ids[] = {
61 	{ .compatible = "allwinner,sun6i-a31-apb0-clk" },
62 	{ /* sentinel */ }
63 };
64 
65 static struct platform_driver sun6i_a31_apb0_clk_driver = {
66 	.driver = {
67 		.name = "sun6i-a31-apb0-clk",
68 		.of_match_table = sun6i_a31_apb0_clk_dt_ids,
69 	},
70 	.probe = sun6i_a31_apb0_clk_probe,
71 };
72 builtin_platform_driver(sun6i_a31_apb0_clk_driver);
73