1 /*
2  * Copyright 2015 Maxime Ripard
3  *
4  * Maxime Ripard <maxime.ripard@free-electrons.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16 
17 #include <linux/clk-provider.h>
18 #include <linux/io.h>
19 #include <linux/of.h>
20 #include <linux/of_address.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
23 
24 #define SUN4I_A10_PLL3_GATE_BIT	31
25 #define SUN4I_A10_PLL3_DIV_WIDTH	7
26 #define SUN4I_A10_PLL3_DIV_SHIFT	0
27 
28 static DEFINE_SPINLOCK(sun4i_a10_pll3_lock);
29 
30 static void __init sun4i_a10_pll3_setup(struct device_node *node)
31 {
32 	const char *clk_name = node->name, *parent;
33 	struct clk_multiplier *mult;
34 	struct clk_gate *gate;
35 	struct resource res;
36 	void __iomem *reg;
37 	struct clk *clk;
38 	int ret;
39 
40 	of_property_read_string(node, "clock-output-names", &clk_name);
41 	parent = of_clk_get_parent_name(node, 0);
42 
43 	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
44 	if (IS_ERR(reg)) {
45 		pr_err("%s: Could not map the clock registers\n", clk_name);
46 		return;
47 	}
48 
49 	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
50 	if (!gate)
51 		goto err_unmap;
52 
53 	gate->reg = reg;
54 	gate->bit_idx = SUN4I_A10_PLL3_GATE_BIT;
55 	gate->lock = &sun4i_a10_pll3_lock;
56 
57 	mult = kzalloc(sizeof(*mult), GFP_KERNEL);
58 	if (!mult)
59 		goto err_free_gate;
60 
61 	mult->reg = reg;
62 	mult->shift = SUN4I_A10_PLL3_DIV_SHIFT;
63 	mult->width = SUN4I_A10_PLL3_DIV_WIDTH;
64 	mult->lock = &sun4i_a10_pll3_lock;
65 
66 	clk = clk_register_composite(NULL, clk_name,
67 				     &parent, 1,
68 				     NULL, NULL,
69 				     &mult->hw, &clk_multiplier_ops,
70 				     &gate->hw, &clk_gate_ops,
71 				     0);
72 	if (IS_ERR(clk)) {
73 		pr_err("%s: Couldn't register the clock\n", clk_name);
74 		goto err_free_mult;
75 	}
76 
77 	ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
78 	if (ret) {
79 		pr_err("%s: Couldn't register DT provider\n",
80 		       clk_name);
81 		goto err_clk_unregister;
82 	}
83 
84 	return;
85 
86 err_clk_unregister:
87 	clk_unregister_composite(clk);
88 err_free_mult:
89 	kfree(mult);
90 err_free_gate:
91 	kfree(gate);
92 err_unmap:
93 	iounmap(reg);
94 	of_address_to_resource(node, 0, &res);
95 	release_mem_region(res.start, resource_size(&res));
96 }
97 
98 CLK_OF_DECLARE(sun4i_a10_pll3, "allwinner,sun4i-a10-pll3-clk",
99 	       sun4i_a10_pll3_setup);
100