1 /* 2 * Copyright (C) 2016 Maxime Ripard 3 * Maxime Ripard <maxime.ripard@free-electrons.com> 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation; either version 2 of 8 * the License, or (at your option) any later version. 9 */ 10 11 #include <linux/clk-provider.h> 12 #include <linux/rational.h> 13 14 #include "ccu_frac.h" 15 #include "ccu_gate.h" 16 #include "ccu_nm.h" 17 18 static void ccu_nm_disable(struct clk_hw *hw) 19 { 20 struct ccu_nm *nm = hw_to_ccu_nm(hw); 21 22 return ccu_gate_helper_disable(&nm->common, nm->enable); 23 } 24 25 static int ccu_nm_enable(struct clk_hw *hw) 26 { 27 struct ccu_nm *nm = hw_to_ccu_nm(hw); 28 29 return ccu_gate_helper_enable(&nm->common, nm->enable); 30 } 31 32 static int ccu_nm_is_enabled(struct clk_hw *hw) 33 { 34 struct ccu_nm *nm = hw_to_ccu_nm(hw); 35 36 return ccu_gate_helper_is_enabled(&nm->common, nm->enable); 37 } 38 39 static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw, 40 unsigned long parent_rate) 41 { 42 struct ccu_nm *nm = hw_to_ccu_nm(hw); 43 unsigned long n, m; 44 u32 reg; 45 46 if (ccu_frac_helper_is_enabled(&nm->common, &nm->frac)) 47 return ccu_frac_helper_read_rate(&nm->common, &nm->frac); 48 49 reg = readl(nm->common.base + nm->common.reg); 50 51 n = reg >> nm->n.shift; 52 n &= (1 << nm->n.width) - 1; 53 54 m = reg >> nm->m.shift; 55 m &= (1 << nm->m.width) - 1; 56 57 return parent_rate * (n + 1) / (m + 1); 58 } 59 60 static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate, 61 unsigned long *parent_rate) 62 { 63 struct ccu_nm *nm = hw_to_ccu_nm(hw); 64 unsigned long n, m; 65 66 rational_best_approximation(rate, *parent_rate, 67 1 << nm->n.width, 1 << nm->m.width, 68 &n, &m); 69 70 return *parent_rate * n / m; 71 } 72 73 static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate, 74 unsigned long parent_rate) 75 { 76 struct ccu_nm *nm = hw_to_ccu_nm(hw); 77 unsigned long flags; 78 unsigned long n, m; 79 u32 reg; 80 81 if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) 82 return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate); 83 else 84 ccu_frac_helper_disable(&nm->common, &nm->frac); 85 86 rational_best_approximation(rate, parent_rate, 87 1 << nm->n.width, 1 << nm->m.width, 88 &n, &m); 89 90 spin_lock_irqsave(nm->common.lock, flags); 91 92 reg = readl(nm->common.base + nm->common.reg); 93 reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift); 94 reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); 95 96 writel(reg | ((m - 1) << nm->m.shift) | ((n - 1) << nm->n.shift), 97 nm->common.base + nm->common.reg); 98 99 spin_unlock_irqrestore(nm->common.lock, flags); 100 101 ccu_helper_wait_for_lock(&nm->common, nm->lock); 102 103 return 0; 104 } 105 106 const struct clk_ops ccu_nm_ops = { 107 .disable = ccu_nm_disable, 108 .enable = ccu_nm_enable, 109 .is_enabled = ccu_nm_is_enabled, 110 111 .recalc_rate = ccu_nm_recalc_rate, 112 .round_rate = ccu_nm_round_rate, 113 .set_rate = ccu_nm_set_rate, 114 }; 115