1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 Maxime Ripard 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/clk-provider.h> 9 #include <linux/delay.h> 10 #include <linux/io.h> 11 12 #include "ccu_gate.h" 13 #include "ccu_mux.h" 14 15 static u16 ccu_mux_get_prediv(struct ccu_common *common, 16 struct ccu_mux_internal *cm, 17 int parent_index) 18 { 19 u16 prediv = 1; 20 u32 reg; 21 22 if (!((common->features & CCU_FEATURE_FIXED_PREDIV) || 23 (common->features & CCU_FEATURE_VARIABLE_PREDIV) || 24 (common->features & CCU_FEATURE_ALL_PREDIV))) 25 return 1; 26 27 if (common->features & CCU_FEATURE_ALL_PREDIV) 28 return common->prediv; 29 30 reg = readl(common->base + common->reg); 31 if (parent_index < 0) { 32 parent_index = reg >> cm->shift; 33 parent_index &= (1 << cm->width) - 1; 34 } 35 36 if (common->features & CCU_FEATURE_FIXED_PREDIV) { 37 int i; 38 39 for (i = 0; i < cm->n_predivs; i++) 40 if (parent_index == cm->fixed_predivs[i].index) 41 prediv = cm->fixed_predivs[i].div; 42 } 43 44 if (common->features & CCU_FEATURE_VARIABLE_PREDIV) { 45 int i; 46 47 for (i = 0; i < cm->n_var_predivs; i++) 48 if (parent_index == cm->var_predivs[i].index) { 49 u8 div; 50 51 div = reg >> cm->var_predivs[i].shift; 52 div &= (1 << cm->var_predivs[i].width) - 1; 53 prediv = div + 1; 54 } 55 } 56 57 return prediv; 58 } 59 60 unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common, 61 struct ccu_mux_internal *cm, 62 int parent_index, 63 unsigned long parent_rate) 64 { 65 return parent_rate / ccu_mux_get_prediv(common, cm, parent_index); 66 } 67 EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_apply_prediv, SUNXI_CCU); 68 69 static unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common, 70 struct ccu_mux_internal *cm, 71 int parent_index, 72 unsigned long parent_rate) 73 { 74 return parent_rate * ccu_mux_get_prediv(common, cm, parent_index); 75 } 76 77 int ccu_mux_helper_determine_rate(struct ccu_common *common, 78 struct ccu_mux_internal *cm, 79 struct clk_rate_request *req, 80 unsigned long (*round)(struct ccu_mux_internal *, 81 struct clk_hw *, 82 unsigned long *, 83 unsigned long, 84 void *), 85 void *data) 86 { 87 unsigned long best_parent_rate = 0, best_rate = 0; 88 struct clk_hw *best_parent, *hw = &common->hw; 89 unsigned int i; 90 91 if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) { 92 unsigned long adj_parent_rate; 93 94 best_parent = clk_hw_get_parent(hw); 95 best_parent_rate = clk_hw_get_rate(best_parent); 96 adj_parent_rate = ccu_mux_helper_apply_prediv(common, cm, -1, 97 best_parent_rate); 98 99 best_rate = round(cm, best_parent, &adj_parent_rate, 100 req->rate, data); 101 102 /* 103 * adj_parent_rate might have been modified by our clock. 104 * Unapply the pre-divider if there's one, and give 105 * the actual frequency the parent needs to run at. 106 */ 107 best_parent_rate = ccu_mux_helper_unapply_prediv(common, cm, -1, 108 adj_parent_rate); 109 110 goto out; 111 } 112 113 for (i = 0; i < clk_hw_get_num_parents(hw); i++) { 114 unsigned long tmp_rate, parent_rate; 115 struct clk_hw *parent; 116 117 parent = clk_hw_get_parent_by_index(hw, i); 118 if (!parent) 119 continue; 120 121 parent_rate = ccu_mux_helper_apply_prediv(common, cm, i, 122 clk_hw_get_rate(parent)); 123 124 tmp_rate = round(cm, parent, &parent_rate, req->rate, data); 125 126 /* 127 * parent_rate might have been modified by our clock. 128 * Unapply the pre-divider if there's one, and give 129 * the actual frequency the parent needs to run at. 130 */ 131 parent_rate = ccu_mux_helper_unapply_prediv(common, cm, i, 132 parent_rate); 133 if (tmp_rate == req->rate) { 134 best_parent = parent; 135 best_parent_rate = parent_rate; 136 best_rate = tmp_rate; 137 goto out; 138 } 139 140 if ((req->rate - tmp_rate) < (req->rate - best_rate)) { 141 best_rate = tmp_rate; 142 best_parent_rate = parent_rate; 143 best_parent = parent; 144 } 145 } 146 147 if (best_rate == 0) 148 return -EINVAL; 149 150 out: 151 req->best_parent_hw = best_parent; 152 req->best_parent_rate = best_parent_rate; 153 req->rate = best_rate; 154 return 0; 155 } 156 EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_determine_rate, SUNXI_CCU); 157 158 u8 ccu_mux_helper_get_parent(struct ccu_common *common, 159 struct ccu_mux_internal *cm) 160 { 161 u32 reg; 162 u8 parent; 163 164 reg = readl(common->base + common->reg); 165 parent = reg >> cm->shift; 166 parent &= (1 << cm->width) - 1; 167 168 if (cm->table) { 169 int num_parents = clk_hw_get_num_parents(&common->hw); 170 int i; 171 172 for (i = 0; i < num_parents; i++) 173 if (cm->table[i] == parent) 174 return i; 175 } 176 177 return parent; 178 } 179 EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_get_parent, SUNXI_CCU); 180 181 int ccu_mux_helper_set_parent(struct ccu_common *common, 182 struct ccu_mux_internal *cm, 183 u8 index) 184 { 185 unsigned long flags; 186 u32 reg; 187 188 if (cm->table) 189 index = cm->table[index]; 190 191 spin_lock_irqsave(common->lock, flags); 192 193 reg = readl(common->base + common->reg); 194 reg &= ~GENMASK(cm->width + cm->shift - 1, cm->shift); 195 writel(reg | (index << cm->shift), common->base + common->reg); 196 197 spin_unlock_irqrestore(common->lock, flags); 198 199 return 0; 200 } 201 EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_set_parent, SUNXI_CCU); 202 203 static void ccu_mux_disable(struct clk_hw *hw) 204 { 205 struct ccu_mux *cm = hw_to_ccu_mux(hw); 206 207 return ccu_gate_helper_disable(&cm->common, cm->enable); 208 } 209 210 static int ccu_mux_enable(struct clk_hw *hw) 211 { 212 struct ccu_mux *cm = hw_to_ccu_mux(hw); 213 214 return ccu_gate_helper_enable(&cm->common, cm->enable); 215 } 216 217 static int ccu_mux_is_enabled(struct clk_hw *hw) 218 { 219 struct ccu_mux *cm = hw_to_ccu_mux(hw); 220 221 return ccu_gate_helper_is_enabled(&cm->common, cm->enable); 222 } 223 224 static u8 ccu_mux_get_parent(struct clk_hw *hw) 225 { 226 struct ccu_mux *cm = hw_to_ccu_mux(hw); 227 228 return ccu_mux_helper_get_parent(&cm->common, &cm->mux); 229 } 230 231 static int ccu_mux_set_parent(struct clk_hw *hw, u8 index) 232 { 233 struct ccu_mux *cm = hw_to_ccu_mux(hw); 234 235 return ccu_mux_helper_set_parent(&cm->common, &cm->mux, index); 236 } 237 238 static unsigned long ccu_mux_recalc_rate(struct clk_hw *hw, 239 unsigned long parent_rate) 240 { 241 struct ccu_mux *cm = hw_to_ccu_mux(hw); 242 243 return ccu_mux_helper_apply_prediv(&cm->common, &cm->mux, -1, 244 parent_rate); 245 } 246 247 const struct clk_ops ccu_mux_ops = { 248 .disable = ccu_mux_disable, 249 .enable = ccu_mux_enable, 250 .is_enabled = ccu_mux_is_enabled, 251 252 .get_parent = ccu_mux_get_parent, 253 .set_parent = ccu_mux_set_parent, 254 255 .determine_rate = __clk_mux_determine_rate, 256 .recalc_rate = ccu_mux_recalc_rate, 257 }; 258 EXPORT_SYMBOL_NS_GPL(ccu_mux_ops, SUNXI_CCU); 259 260 /* 261 * This clock notifier is called when the frequency of the of the parent 262 * PLL clock is to be changed. The idea is to switch the parent to a 263 * stable clock, such as the main oscillator, while the PLL frequency 264 * stabilizes. 265 */ 266 static int ccu_mux_notifier_cb(struct notifier_block *nb, 267 unsigned long event, void *data) 268 { 269 struct ccu_mux_nb *mux = to_ccu_mux_nb(nb); 270 int ret = 0; 271 272 if (event == PRE_RATE_CHANGE) { 273 mux->original_index = ccu_mux_helper_get_parent(mux->common, 274 mux->cm); 275 ret = ccu_mux_helper_set_parent(mux->common, mux->cm, 276 mux->bypass_index); 277 } else if (event == POST_RATE_CHANGE) { 278 ret = ccu_mux_helper_set_parent(mux->common, mux->cm, 279 mux->original_index); 280 } 281 282 udelay(mux->delay_us); 283 284 return notifier_from_errno(ret); 285 } 286 287 int ccu_mux_notifier_register(struct clk *clk, struct ccu_mux_nb *mux_nb) 288 { 289 mux_nb->clk_nb.notifier_call = ccu_mux_notifier_cb; 290 291 return clk_notifier_register(clk, &mux_nb->clk_nb); 292 } 293 EXPORT_SYMBOL_NS_GPL(ccu_mux_notifier_register, SUNXI_CCU); 294