1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
4  */
5 
6 #include <linux/clk-provider.h>
7 #include <linux/clk/sunxi-ng.h>
8 #include <linux/io.h>
9 
10 #include "ccu_common.h"
11 
12 /**
13  * sunxi_ccu_set_mmc_timing_mode - Configure the MMC clock timing mode
14  * @clk: clock to be configured
15  * @new_mode: true for new timing mode introduced in A83T and later
16  *
17  * Return: %0 on success, %-ENOTSUPP if the clock does not support
18  * switching modes.
19  */
20 int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)
21 {
22 	struct clk_hw *hw = __clk_get_hw(clk);
23 	struct ccu_common *cm = hw_to_ccu_common(hw);
24 	unsigned long flags;
25 	u32 val;
26 
27 	if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
28 		return -ENOTSUPP;
29 
30 	spin_lock_irqsave(cm->lock, flags);
31 
32 	val = readl(cm->base + cm->reg);
33 	if (new_mode)
34 		val |= CCU_MMC_NEW_TIMING_MODE;
35 	else
36 		val &= ~CCU_MMC_NEW_TIMING_MODE;
37 	writel(val, cm->base + cm->reg);
38 
39 	spin_unlock_irqrestore(cm->lock, flags);
40 
41 	return 0;
42 }
43 EXPORT_SYMBOL_GPL(sunxi_ccu_set_mmc_timing_mode);
44 
45 /**
46  * sunxi_ccu_set_mmc_timing_mode: Get the current MMC clock timing mode
47  * @clk: clock to query
48  *
49  * Return: %0 if the clock is in old timing mode, > %0 if it is in
50  * new timing mode, and %-ENOTSUPP if the clock does not support
51  * this function.
52  */
53 int sunxi_ccu_get_mmc_timing_mode(struct clk *clk)
54 {
55 	struct clk_hw *hw = __clk_get_hw(clk);
56 	struct ccu_common *cm = hw_to_ccu_common(hw);
57 
58 	if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
59 		return -ENOTSUPP;
60 
61 	return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE);
62 }
63 EXPORT_SYMBOL_GPL(sunxi_ccu_get_mmc_timing_mode);
64