19c92ab61SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
21d80c142SMaxime Ripard /*
31d80c142SMaxime Ripard * Copyright (c) 2016 Maxime Ripard. All rights reserved.
41d80c142SMaxime Ripard */
51d80c142SMaxime Ripard
61d80c142SMaxime Ripard #ifndef _COMMON_H_
71d80c142SMaxime Ripard #define _COMMON_H_
81d80c142SMaxime Ripard
91d80c142SMaxime Ripard #include <linux/compiler.h>
101d80c142SMaxime Ripard #include <linux/clk-provider.h>
111d80c142SMaxime Ripard
121d80c142SMaxime Ripard #define CCU_FEATURE_FRACTIONAL BIT(0)
131d80c142SMaxime Ripard #define CCU_FEATURE_VARIABLE_PREDIV BIT(1)
141d80c142SMaxime Ripard #define CCU_FEATURE_FIXED_PREDIV BIT(2)
151d80c142SMaxime Ripard #define CCU_FEATURE_FIXED_POSTDIV BIT(3)
167c09b858SMaxime Ripard #define CCU_FEATURE_ALL_PREDIV BIT(4)
173de64bf1SChen-Yu Tsai #define CCU_FEATURE_LOCK_REG BIT(5)
18f6f64ed8SChen-Yu Tsai #define CCU_FEATURE_MMC_TIMING_SWITCH BIT(6)
1905d2eaacSChen-Yu Tsai #define CCU_FEATURE_SIGMA_DELTA_MOD BIT(7)
207fc46339SSamuel Holland #define CCU_FEATURE_KEY_FIELD BIT(8)
2148fb70cdSFrank Oltmanns #define CCU_FEATURE_CLOSEST_RATE BIT(9)
22f6f64ed8SChen-Yu Tsai
23f6f64ed8SChen-Yu Tsai /* MMC timing mode switch bit */
24f6f64ed8SChen-Yu Tsai #define CCU_MMC_NEW_TIMING_MODE BIT(30)
251d80c142SMaxime Ripard
261d80c142SMaxime Ripard struct device_node;
271d80c142SMaxime Ripard
281d80c142SMaxime Ripard struct ccu_common {
291d80c142SMaxime Ripard void __iomem *base;
301d80c142SMaxime Ripard u16 reg;
313de64bf1SChen-Yu Tsai u16 lock_reg;
327c09b858SMaxime Ripard u32 prediv;
331d80c142SMaxime Ripard
3454726374SFrank Oltmanns unsigned long min_rate;
3554726374SFrank Oltmanns unsigned long max_rate;
3654726374SFrank Oltmanns
371d80c142SMaxime Ripard unsigned long features;
381d80c142SMaxime Ripard spinlock_t *lock;
391d80c142SMaxime Ripard struct clk_hw hw;
401d80c142SMaxime Ripard };
411d80c142SMaxime Ripard
hw_to_ccu_common(struct clk_hw * hw)421d80c142SMaxime Ripard static inline struct ccu_common *hw_to_ccu_common(struct clk_hw *hw)
431d80c142SMaxime Ripard {
441d80c142SMaxime Ripard return container_of(hw, struct ccu_common, hw);
451d80c142SMaxime Ripard }
461d80c142SMaxime Ripard
471d80c142SMaxime Ripard struct sunxi_ccu_desc {
481d80c142SMaxime Ripard struct ccu_common **ccu_clks;
491d80c142SMaxime Ripard unsigned long num_ccu_clks;
501d80c142SMaxime Ripard
511d80c142SMaxime Ripard struct clk_hw_onecell_data *hw_clks;
521d80c142SMaxime Ripard
531d80c142SMaxime Ripard struct ccu_reset_map *resets;
541d80c142SMaxime Ripard unsigned long num_resets;
551d80c142SMaxime Ripard };
561d80c142SMaxime Ripard
571d80c142SMaxime Ripard void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock);
581d80c142SMaxime Ripard
59e373315dSFrank Oltmanns bool ccu_is_better_rate(struct ccu_common *common,
60e373315dSFrank Oltmanns unsigned long target_rate,
61e373315dSFrank Oltmanns unsigned long current_rate,
62e373315dSFrank Oltmanns unsigned long best_rate);
63e373315dSFrank Oltmanns
6402ae2bc6SChen-Yu Tsai struct ccu_pll_nb {
6502ae2bc6SChen-Yu Tsai struct notifier_block clk_nb;
6602ae2bc6SChen-Yu Tsai struct ccu_common *common;
6702ae2bc6SChen-Yu Tsai
6802ae2bc6SChen-Yu Tsai u32 enable;
6902ae2bc6SChen-Yu Tsai u32 lock;
7002ae2bc6SChen-Yu Tsai };
7102ae2bc6SChen-Yu Tsai
7202ae2bc6SChen-Yu Tsai #define to_ccu_pll_nb(_nb) container_of(_nb, struct ccu_pll_nb, clk_nb)
7302ae2bc6SChen-Yu Tsai
7402ae2bc6SChen-Yu Tsai int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb);
7502ae2bc6SChen-Yu Tsai
769bec2b9cSSamuel Holland int devm_sunxi_ccu_probe(struct device *dev, void __iomem *reg,
779bec2b9cSSamuel Holland const struct sunxi_ccu_desc *desc);
789bec2b9cSSamuel Holland void of_sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
791d80c142SMaxime Ripard const struct sunxi_ccu_desc *desc);
801d80c142SMaxime Ripard
811d80c142SMaxime Ripard #endif /* _COMMON_H_ */
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