1 /* 2 * Copyright 2016 Maxime Ripard 3 * 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #ifndef _CCU_SUN5I_H_ 18 #define _CCU_SUN5I_H_ 19 20 #include <dt-bindings/clock/sun5i-ccu.h> 21 #include <dt-bindings/reset/sun5i-ccu.h> 22 23 /* The HOSC is exported */ 24 #define CLK_PLL_CORE 2 25 #define CLK_PLL_AUDIO_BASE 3 26 #define CLK_PLL_AUDIO 4 27 #define CLK_PLL_AUDIO_2X 5 28 #define CLK_PLL_AUDIO_4X 6 29 #define CLK_PLL_AUDIO_8X 7 30 #define CLK_PLL_VIDEO0 8 31 #define CLK_PLL_VIDEO0_2X 9 32 #define CLK_PLL_VE 10 33 #define CLK_PLL_DDR_BASE 11 34 #define CLK_PLL_DDR 12 35 #define CLK_PLL_DDR_OTHER 13 36 #define CLK_PLL_PERIPH 14 37 #define CLK_PLL_VIDEO1 15 38 #define CLK_PLL_VIDEO1_2X 16 39 40 /* The CPU clock is exported */ 41 42 #define CLK_AXI 18 43 #define CLK_AHB 19 44 #define CLK_APB0 20 45 #define CLK_APB1 21 46 #define CLK_DRAM_AXI 22 47 48 /* AHB gates are exported */ 49 /* APB0 gates are exported */ 50 /* APB1 gates are exported */ 51 /* Modules clocks are exported */ 52 /* USB clocks are exported */ 53 /* GPS clock is exported */ 54 /* DRAM gates are exported */ 55 /* More display modules clocks are exported */ 56 57 #define CLK_TCON_CH1_SCLK 91 58 59 /* The rest of the module clocks are exported */ 60 61 #define CLK_MBUS 99 62 63 /* And finally the IEP clock */ 64 65 #define CLK_NUMBER (CLK_IEP + 1) 66 67 #endif /* _CCU_SUN5I_H_ */ 68