1config SUNXI_CCU 2 bool "Clock support for Allwinner SoCs" 3 depends on ARCH_SUNXI || COMPILE_TEST 4 select RESET_CONTROLLER 5 default ARCH_SUNXI 6 7if SUNXI_CCU 8 9config SUN50I_A64_CCU 10 bool "Support for the Allwinner A64 CCU" 11 default ARM64 && ARCH_SUNXI 12 depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST 13 14config SUN50I_H6_CCU 15 bool "Support for the Allwinner H6 CCU" 16 default ARM64 && ARCH_SUNXI 17 depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST 18 19config SUN4I_A10_CCU 20 bool "Support for the Allwinner A10/A20 CCU" 21 default MACH_SUN4I 22 default MACH_SUN7I 23 depends on MACH_SUN4I || MACH_SUN7I || COMPILE_TEST 24 25config SUN5I_CCU 26 bool "Support for the Allwinner sun5i family CCM" 27 default MACH_SUN5I 28 depends on MACH_SUN5I || COMPILE_TEST 29 30config SUN6I_A31_CCU 31 bool "Support for the Allwinner A31/A31s CCU" 32 default MACH_SUN6I 33 depends on MACH_SUN6I || COMPILE_TEST 34 35config SUN8I_A23_CCU 36 bool "Support for the Allwinner A23 CCU" 37 default MACH_SUN8I 38 depends on MACH_SUN8I || COMPILE_TEST 39 40config SUN8I_A33_CCU 41 bool "Support for the Allwinner A33 CCU" 42 default MACH_SUN8I 43 depends on MACH_SUN8I || COMPILE_TEST 44 45config SUN8I_A83T_CCU 46 bool "Support for the Allwinner A83T CCU" 47 default MACH_SUN8I 48 49config SUN8I_H3_CCU 50 bool "Support for the Allwinner H3 CCU" 51 default MACH_SUN8I || (ARM64 && ARCH_SUNXI) 52 depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST 53 54config SUN8I_V3S_CCU 55 bool "Support for the Allwinner V3s CCU" 56 default MACH_SUN8I 57 depends on MACH_SUN8I || COMPILE_TEST 58 59config SUN8I_DE2_CCU 60 bool "Support for the Allwinner SoCs DE2 CCU" 61 62config SUN8I_R40_CCU 63 bool "Support for the Allwinner R40 CCU" 64 default MACH_SUN8I 65 depends on MACH_SUN8I || COMPILE_TEST 66 67config SUN9I_A80_CCU 68 bool "Support for the Allwinner A80 CCU" 69 default MACH_SUN9I 70 depends on MACH_SUN9I || COMPILE_TEST 71 72config SUN8I_R_CCU 73 bool "Support for Allwinner SoCs' PRCM CCUs" 74 default MACH_SUN8I || (ARCH_SUNXI && ARM64) 75 76endif 77