1 /* SPDX-License-Identifier: GPL-2.0 */ 2 // 3 // Spreadtrum multiplexer clock driver 4 // 5 // Copyright (C) 2017 Spreadtrum, Inc. 6 // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com> 7 8 #ifndef _SPRD_MUX_H_ 9 #define _SPRD_MUX_H_ 10 11 #include "common.h" 12 13 /** 14 * struct sprd_mux_ssel - Mux clock's source select bits in its register 15 * @shift: Bit offset of the divider in its register 16 * @width: Width of the divider field in its register 17 * @table: For some mux clocks, not all sources are used on some special 18 * chips, this matches the value of mux clock's register and the 19 * sources which are used for this mux clock 20 */ 21 struct sprd_mux_ssel { 22 u8 shift; 23 u8 width; 24 const u8 *table; 25 }; 26 27 struct sprd_mux { 28 struct sprd_mux_ssel mux; 29 struct sprd_clk_common common; 30 }; 31 32 #define _SPRD_MUX_CLK(_shift, _width, _table) \ 33 { \ 34 .shift = _shift, \ 35 .width = _width, \ 36 .table = _table, \ 37 } 38 39 #define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table, \ 40 _reg, _shift, _width, \ 41 _flags) \ 42 struct sprd_mux _struct = { \ 43 .mux = _SPRD_MUX_CLK(_shift, _width, _table), \ 44 .common = { \ 45 .regmap = NULL, \ 46 .reg = _reg, \ 47 .hw.init = CLK_HW_INIT_PARENTS(_name, \ 48 _parents, \ 49 &sprd_mux_ops, \ 50 _flags), \ 51 } \ 52 } 53 54 #define SPRD_MUX_CLK(_struct, _name, _parents, _reg, \ 55 _shift, _width, _flags) \ 56 SPRD_MUX_CLK_TABLE(_struct, _name, _parents, NULL, \ 57 _reg, _shift, _width, _flags) 58 59 static inline struct sprd_mux *hw_to_sprd_mux(const struct clk_hw *hw) 60 { 61 struct sprd_clk_common *common = hw_to_sprd_clk_common(hw); 62 63 return container_of(common, struct sprd_mux, common); 64 } 65 66 extern const struct clk_ops sprd_mux_ops; 67 68 u8 sprd_mux_helper_get_parent(const struct sprd_clk_common *common, 69 const struct sprd_mux_ssel *mux); 70 int sprd_mux_helper_set_parent(const struct sprd_clk_common *common, 71 const struct sprd_mux_ssel *mux, 72 u8 index); 73 74 #endif /* _SPRD_MUX_H_ */ 75