xref: /openbmc/linux/drivers/clk/sprd/composite.c (revision 587dd448)
14fcba55cSChunyan Zhang // SPDX-License-Identifier: GPL-2.0
24fcba55cSChunyan Zhang //
34fcba55cSChunyan Zhang // Spreadtrum composite clock driver
44fcba55cSChunyan Zhang //
54fcba55cSChunyan Zhang // Copyright (C) 2017 Spreadtrum, Inc.
64fcba55cSChunyan Zhang // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
74fcba55cSChunyan Zhang 
84fcba55cSChunyan Zhang #include <linux/clk-provider.h>
94fcba55cSChunyan Zhang 
104fcba55cSChunyan Zhang #include "composite.h"
114fcba55cSChunyan Zhang 
sprd_comp_determine_rate(struct clk_hw * hw,struct clk_rate_request * req)12302d2f83SMaxime Ripard static int sprd_comp_determine_rate(struct clk_hw *hw,
13302d2f83SMaxime Ripard 				    struct clk_rate_request *req)
144fcba55cSChunyan Zhang {
154fcba55cSChunyan Zhang 	struct sprd_comp *cc = hw_to_sprd_comp(hw);
164fcba55cSChunyan Zhang 
17*587dd448SStephen Boyd 	return divider_determine_rate(hw, req, NULL, cc->div.width, 0);
184fcba55cSChunyan Zhang }
194fcba55cSChunyan Zhang 
sprd_comp_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)204fcba55cSChunyan Zhang static unsigned long sprd_comp_recalc_rate(struct clk_hw *hw,
214fcba55cSChunyan Zhang 					  unsigned long parent_rate)
224fcba55cSChunyan Zhang {
234fcba55cSChunyan Zhang 	struct sprd_comp *cc = hw_to_sprd_comp(hw);
244fcba55cSChunyan Zhang 
254fcba55cSChunyan Zhang 	return sprd_div_helper_recalc_rate(&cc->common, &cc->div, parent_rate);
264fcba55cSChunyan Zhang }
274fcba55cSChunyan Zhang 
sprd_comp_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)284fcba55cSChunyan Zhang static int sprd_comp_set_rate(struct clk_hw *hw, unsigned long rate,
294fcba55cSChunyan Zhang 			     unsigned long parent_rate)
304fcba55cSChunyan Zhang {
314fcba55cSChunyan Zhang 	struct sprd_comp *cc = hw_to_sprd_comp(hw);
324fcba55cSChunyan Zhang 
334fcba55cSChunyan Zhang 	return sprd_div_helper_set_rate(&cc->common, &cc->div,
344fcba55cSChunyan Zhang 				       rate, parent_rate);
354fcba55cSChunyan Zhang }
364fcba55cSChunyan Zhang 
sprd_comp_get_parent(struct clk_hw * hw)374fcba55cSChunyan Zhang static u8 sprd_comp_get_parent(struct clk_hw *hw)
384fcba55cSChunyan Zhang {
394fcba55cSChunyan Zhang 	struct sprd_comp *cc = hw_to_sprd_comp(hw);
404fcba55cSChunyan Zhang 
414fcba55cSChunyan Zhang 	return sprd_mux_helper_get_parent(&cc->common, &cc->mux);
424fcba55cSChunyan Zhang }
434fcba55cSChunyan Zhang 
sprd_comp_set_parent(struct clk_hw * hw,u8 index)444fcba55cSChunyan Zhang static int sprd_comp_set_parent(struct clk_hw *hw, u8 index)
454fcba55cSChunyan Zhang {
464fcba55cSChunyan Zhang 	struct sprd_comp *cc = hw_to_sprd_comp(hw);
474fcba55cSChunyan Zhang 
484fcba55cSChunyan Zhang 	return sprd_mux_helper_set_parent(&cc->common, &cc->mux, index);
494fcba55cSChunyan Zhang }
504fcba55cSChunyan Zhang 
514fcba55cSChunyan Zhang const struct clk_ops sprd_comp_ops = {
524fcba55cSChunyan Zhang 	.get_parent	= sprd_comp_get_parent,
534fcba55cSChunyan Zhang 	.set_parent	= sprd_comp_set_parent,
544fcba55cSChunyan Zhang 
55302d2f83SMaxime Ripard 	.determine_rate	= sprd_comp_determine_rate,
564fcba55cSChunyan Zhang 	.recalc_rate	= sprd_comp_recalc_rate,
574fcba55cSChunyan Zhang 	.set_rate	= sprd_comp_set_rate,
584fcba55cSChunyan Zhang };
594fcba55cSChunyan Zhang EXPORT_SYMBOL_GPL(sprd_comp_ops);
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