1 /* 2 * Copyright (C) 2012 Altera Corporation <www.altera.com> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 #include <linux/clk.h> 18 #include <linux/clkdev.h> 19 #include <linux/clk-provider.h> 20 21 #define SOCFPGA_OSC1_CLK 10000000 22 #define SOCFPGA_MPU_CLK 800000000 23 #define SOCFPGA_MAIN_QSPI_CLK 432000000 24 #define SOCFPGA_MAIN_NAND_SDMMC_CLK 250000000 25 #define SOCFPGA_S2F_USR_CLK 125000000 26 27 void __init socfpga_init_clocks(void) 28 { 29 struct clk *clk; 30 31 clk = clk_register_fixed_rate(NULL, "osc1_clk", NULL, CLK_IS_ROOT, SOCFPGA_OSC1_CLK); 32 clk_register_clkdev(clk, "osc1_clk", NULL); 33 34 clk = clk_register_fixed_rate(NULL, "mpu_clk", NULL, CLK_IS_ROOT, SOCFPGA_MPU_CLK); 35 clk_register_clkdev(clk, "mpu_clk", NULL); 36 37 clk = clk_register_fixed_rate(NULL, "main_clk", NULL, CLK_IS_ROOT, SOCFPGA_MPU_CLK/2); 38 clk_register_clkdev(clk, "main_clk", NULL); 39 40 clk = clk_register_fixed_rate(NULL, "dbg_base_clk", NULL, CLK_IS_ROOT, SOCFPGA_MPU_CLK/2); 41 clk_register_clkdev(clk, "dbg_base_clk", NULL); 42 43 clk = clk_register_fixed_rate(NULL, "main_qspi_clk", NULL, CLK_IS_ROOT, SOCFPGA_MAIN_QSPI_CLK); 44 clk_register_clkdev(clk, "main_qspi_clk", NULL); 45 46 clk = clk_register_fixed_rate(NULL, "main_nand_sdmmc_clk", NULL, CLK_IS_ROOT, SOCFPGA_MAIN_NAND_SDMMC_CLK); 47 clk_register_clkdev(clk, "main_nand_sdmmc_clk", NULL); 48 49 clk = clk_register_fixed_rate(NULL, "s2f_usr_clk", NULL, CLK_IS_ROOT, SOCFPGA_S2F_USR_CLK); 50 clk_register_clkdev(clk, "s2f_usr_clk", NULL); 51 } 52