11609027fSChander Kashyap /* 21609027fSChander Kashyap * Copyright (c) 2013 Samsung Electronics Co., Ltd. 31609027fSChander Kashyap * Authors: Thomas Abraham <thomas.ab@samsung.com> 41609027fSChander Kashyap * Chander Kashyap <k.chander@samsung.com> 51609027fSChander Kashyap * 61609027fSChander Kashyap * This program is free software; you can redistribute it and/or modify 71609027fSChander Kashyap * it under the terms of the GNU General Public License version 2 as 81609027fSChander Kashyap * published by the Free Software Foundation. 91609027fSChander Kashyap * 101609027fSChander Kashyap * Common Clock Framework support for Exynos5420 SoC. 111609027fSChander Kashyap */ 121609027fSChander Kashyap 131609027fSChander Kashyap #include <linux/clk.h> 141609027fSChander Kashyap #include <linux/clkdev.h> 151609027fSChander Kashyap #include <linux/clk-provider.h> 161609027fSChander Kashyap #include <linux/of.h> 171609027fSChander Kashyap #include <linux/of_address.h> 181609027fSChander Kashyap 191609027fSChander Kashyap #include "clk.h" 201609027fSChander Kashyap 21c898c6b7SYadwinder Singh Brar #define APLL_LOCK 0x0 22c898c6b7SYadwinder Singh Brar #define APLL_CON0 0x100 231609027fSChander Kashyap #define SRC_CPU 0x200 241609027fSChander Kashyap #define DIV_CPU0 0x500 251609027fSChander Kashyap #define DIV_CPU1 0x504 261609027fSChander Kashyap #define GATE_BUS_CPU 0x700 271609027fSChander Kashyap #define GATE_SCLK_CPU 0x800 28c898c6b7SYadwinder Singh Brar #define CPLL_LOCK 0x10020 29c898c6b7SYadwinder Singh Brar #define DPLL_LOCK 0x10030 30c898c6b7SYadwinder Singh Brar #define EPLL_LOCK 0x10040 31c898c6b7SYadwinder Singh Brar #define RPLL_LOCK 0x10050 32c898c6b7SYadwinder Singh Brar #define IPLL_LOCK 0x10060 33c898c6b7SYadwinder Singh Brar #define SPLL_LOCK 0x10070 34c898c6b7SYadwinder Singh Brar #define VPLL_LOCK 0x10070 35c898c6b7SYadwinder Singh Brar #define MPLL_LOCK 0x10090 36c898c6b7SYadwinder Singh Brar #define CPLL_CON0 0x10120 37c898c6b7SYadwinder Singh Brar #define DPLL_CON0 0x10128 38c898c6b7SYadwinder Singh Brar #define EPLL_CON0 0x10130 39c898c6b7SYadwinder Singh Brar #define RPLL_CON0 0x10140 40c898c6b7SYadwinder Singh Brar #define IPLL_CON0 0x10150 41c898c6b7SYadwinder Singh Brar #define SPLL_CON0 0x10160 42c898c6b7SYadwinder Singh Brar #define VPLL_CON0 0x10170 43c898c6b7SYadwinder Singh Brar #define MPLL_CON0 0x10180 441609027fSChander Kashyap #define SRC_TOP0 0x10200 451609027fSChander Kashyap #define SRC_TOP1 0x10204 461609027fSChander Kashyap #define SRC_TOP2 0x10208 471609027fSChander Kashyap #define SRC_TOP3 0x1020c 481609027fSChander Kashyap #define SRC_TOP4 0x10210 491609027fSChander Kashyap #define SRC_TOP5 0x10214 501609027fSChander Kashyap #define SRC_TOP6 0x10218 511609027fSChander Kashyap #define SRC_TOP7 0x1021c 521609027fSChander Kashyap #define SRC_DISP10 0x1022c 531609027fSChander Kashyap #define SRC_MAU 0x10240 541609027fSChander Kashyap #define SRC_FSYS 0x10244 551609027fSChander Kashyap #define SRC_PERIC0 0x10250 561609027fSChander Kashyap #define SRC_PERIC1 0x10254 571609027fSChander Kashyap #define SRC_TOP10 0x10280 581609027fSChander Kashyap #define SRC_TOP11 0x10284 591609027fSChander Kashyap #define SRC_TOP12 0x10288 601609027fSChander Kashyap #define SRC_MASK_DISP10 0x1032c 611609027fSChander Kashyap #define SRC_MASK_FSYS 0x10340 621609027fSChander Kashyap #define SRC_MASK_PERIC0 0x10350 631609027fSChander Kashyap #define SRC_MASK_PERIC1 0x10354 641609027fSChander Kashyap #define DIV_TOP0 0x10500 651609027fSChander Kashyap #define DIV_TOP1 0x10504 661609027fSChander Kashyap #define DIV_TOP2 0x10508 671609027fSChander Kashyap #define DIV_DISP10 0x1052c 681609027fSChander Kashyap #define DIV_MAU 0x10544 691609027fSChander Kashyap #define DIV_FSYS0 0x10548 701609027fSChander Kashyap #define DIV_FSYS1 0x1054c 711609027fSChander Kashyap #define DIV_FSYS2 0x10550 721609027fSChander Kashyap #define DIV_PERIC0 0x10558 731609027fSChander Kashyap #define DIV_PERIC1 0x1055c 741609027fSChander Kashyap #define DIV_PERIC2 0x10560 751609027fSChander Kashyap #define DIV_PERIC3 0x10564 761609027fSChander Kashyap #define DIV_PERIC4 0x10568 771609027fSChander Kashyap #define GATE_BUS_TOP 0x10700 781609027fSChander Kashyap #define GATE_BUS_FSYS0 0x10740 791609027fSChander Kashyap #define GATE_BUS_PERIC 0x10750 801609027fSChander Kashyap #define GATE_BUS_PERIC1 0x10754 811609027fSChander Kashyap #define GATE_BUS_PERIS0 0x10760 821609027fSChander Kashyap #define GATE_BUS_PERIS1 0x10764 831609027fSChander Kashyap #define GATE_IP_GSCL0 0x10910 841609027fSChander Kashyap #define GATE_IP_GSCL1 0x10920 851609027fSChander Kashyap #define GATE_IP_MFC 0x1092c 861609027fSChander Kashyap #define GATE_IP_DISP1 0x10928 871609027fSChander Kashyap #define GATE_IP_G3D 0x10930 881609027fSChander Kashyap #define GATE_IP_GEN 0x10934 891609027fSChander Kashyap #define GATE_IP_MSCL 0x10970 901609027fSChander Kashyap #define GATE_TOP_SCLK_GSCL 0x10820 911609027fSChander Kashyap #define GATE_TOP_SCLK_DISP1 0x10828 921609027fSChander Kashyap #define GATE_TOP_SCLK_MAU 0x1083c 931609027fSChander Kashyap #define GATE_TOP_SCLK_FSYS 0x10840 941609027fSChander Kashyap #define GATE_TOP_SCLK_PERIC 0x10850 95c898c6b7SYadwinder Singh Brar #define BPLL_LOCK 0x20010 96c898c6b7SYadwinder Singh Brar #define BPLL_CON0 0x20110 971609027fSChander Kashyap #define SRC_CDREX 0x20200 98c898c6b7SYadwinder Singh Brar #define KPLL_LOCK 0x28000 99c898c6b7SYadwinder Singh Brar #define KPLL_CON0 0x28100 1001609027fSChander Kashyap #define SRC_KFC 0x28200 1011609027fSChander Kashyap #define DIV_KFC0 0x28500 1021609027fSChander Kashyap 103c898c6b7SYadwinder Singh Brar /* list of PLLs */ 104c898c6b7SYadwinder Singh Brar enum exynos5420_plls { 105c898c6b7SYadwinder Singh Brar apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, 106c898c6b7SYadwinder Singh Brar bpll, kpll, 107c898c6b7SYadwinder Singh Brar nr_plls /* number of PLLs */ 108c898c6b7SYadwinder Singh Brar }; 109c898c6b7SYadwinder Singh Brar 1101609027fSChander Kashyap enum exynos5420_clks { 1111609027fSChander Kashyap none, 1121609027fSChander Kashyap 1131609027fSChander Kashyap /* core clocks */ 114c898c6b7SYadwinder Singh Brar fin_pll, fout_apll, fout_cpll, fout_dpll, fout_epll, fout_rpll, 115c898c6b7SYadwinder Singh Brar fout_ipll, fout_spll, fout_vpll, fout_mpll, fout_bpll, fout_kpll, 1161609027fSChander Kashyap 1171609027fSChander Kashyap /* gate for special clocks (sclk) */ 1181609027fSChander Kashyap sclk_uart0 = 128, sclk_uart1, sclk_uart2, sclk_uart3, sclk_mmc0, 1191609027fSChander Kashyap sclk_mmc1, sclk_mmc2, sclk_spi0, sclk_spi1, sclk_spi2, sclk_i2s1, 1201609027fSChander Kashyap sclk_i2s2, sclk_pcm1, sclk_pcm2, sclk_spdif, sclk_hdmi, sclk_pixel, 1211609027fSChander Kashyap sclk_dp1, sclk_mipi1, sclk_fimd1, sclk_maudio0, sclk_maupcm0, 1221609027fSChander Kashyap sclk_usbd300, sclk_usbd301, sclk_usbphy300, sclk_usbphy301, sclk_unipro, 123c9f3f081SRahul Sharma sclk_pwm, sclk_gscl_wa, sclk_gscl_wb, sclk_hdmiphy, 1241609027fSChander Kashyap 1251609027fSChander Kashyap /* gate clocks */ 1261609027fSChander Kashyap aclk66_peric = 256, uart0, uart1, uart2, uart3, i2c0, i2c1, i2c2, i2c3, 1271609027fSChander Kashyap i2c4, i2c5, i2c6, i2c7, i2c_hdmi, tsadc, spi0, spi1, spi2, keyif, i2s1, 1281609027fSChander Kashyap i2s2, pcm1, pcm2, pwm, spdif, i2c8, i2c9, i2c10, aclk66_psgen = 300, 1291609027fSChander Kashyap chipid, sysreg, tzpc0, tzpc1, tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, 1301609027fSChander Kashyap tzpc8, tzpc9, hdmi_cec, seckey, mct, wdt, rtc, tmu, tmu_gpu, 1311609027fSChander Kashyap pclk66_gpio = 330, aclk200_fsys2 = 350, mmc0, mmc1, mmc2, sromc, ufs, 1321609027fSChander Kashyap aclk200_fsys = 360, tsi, pdma0, pdma1, rtic, usbh20, usbd300, usbd301, 1331609027fSChander Kashyap aclk400_mscl = 380, mscl0, mscl1, mscl2, smmu_mscl0, smmu_mscl1, 1341609027fSChander Kashyap smmu_mscl2, aclk333 = 400, mfc, smmu_mfcl, smmu_mfcr, 1351609027fSChander Kashyap aclk200_disp1 = 410, dsim1, dp1, hdmi, aclk300_disp1 = 420, fimd1, 1361609027fSChander Kashyap smmu_fimd1, aclk166 = 430, mixer, aclk266 = 440, rotator, mdma1, 1371609027fSChander Kashyap smmu_rotator, smmu_mdma1, aclk300_jpeg = 450, jpeg, jpeg2, smmu_jpeg, 1381609027fSChander Kashyap aclk300_gscl = 460, smmu_gscl0, smmu_gscl1, gscl_wa, gscl_wb, gscl0, 1391609027fSChander Kashyap gscl1, clk_3aa, aclk266_g2d = 470, sss, slim_sss, mdma0, 1401609027fSChander Kashyap aclk333_g2d = 480, g2d, aclk333_432_gscl = 490, smmu_3aa, smmu_fimcl0, 1419b229d8bSRahul Sharma smmu_fimcl1, smmu_fimcl3, fimc_lite3, aclk_g3d = 500, g3d, smmu_mixer, 1421609027fSChander Kashyap 1434625f1b5SRahul Sharma /* mux clocks */ 1444625f1b5SRahul Sharma mout_hdmi = 640, 1454625f1b5SRahul Sharma 1460044cbcdSRahul Sharma /* divider clocks */ 1470044cbcdSRahul Sharma dout_pixel = 768, 1480044cbcdSRahul Sharma 1491609027fSChander Kashyap nr_clks, 1501609027fSChander Kashyap }; 1511609027fSChander Kashyap 1521609027fSChander Kashyap /* 1531609027fSChander Kashyap * list of controller registers to be saved and restored during a 1541609027fSChander Kashyap * suspend/resume cycle. 1551609027fSChander Kashyap */ 156202e5ae9SSachin Kamat static unsigned long exynos5420_clk_regs[] __initdata = { 1571609027fSChander Kashyap SRC_CPU, 1581609027fSChander Kashyap DIV_CPU0, 1591609027fSChander Kashyap DIV_CPU1, 1601609027fSChander Kashyap GATE_BUS_CPU, 1611609027fSChander Kashyap GATE_SCLK_CPU, 1621609027fSChander Kashyap SRC_TOP0, 1631609027fSChander Kashyap SRC_TOP1, 1641609027fSChander Kashyap SRC_TOP2, 1651609027fSChander Kashyap SRC_TOP3, 1661609027fSChander Kashyap SRC_TOP4, 1671609027fSChander Kashyap SRC_TOP5, 1681609027fSChander Kashyap SRC_TOP6, 1691609027fSChander Kashyap SRC_TOP7, 1701609027fSChander Kashyap SRC_DISP10, 1711609027fSChander Kashyap SRC_MAU, 1721609027fSChander Kashyap SRC_FSYS, 1731609027fSChander Kashyap SRC_PERIC0, 1741609027fSChander Kashyap SRC_PERIC1, 1751609027fSChander Kashyap SRC_TOP10, 1761609027fSChander Kashyap SRC_TOP11, 1771609027fSChander Kashyap SRC_TOP12, 1781609027fSChander Kashyap SRC_MASK_DISP10, 1791609027fSChander Kashyap SRC_MASK_FSYS, 1801609027fSChander Kashyap SRC_MASK_PERIC0, 1811609027fSChander Kashyap SRC_MASK_PERIC1, 1821609027fSChander Kashyap DIV_TOP0, 1831609027fSChander Kashyap DIV_TOP1, 1841609027fSChander Kashyap DIV_TOP2, 1851609027fSChander Kashyap DIV_DISP10, 1861609027fSChander Kashyap DIV_MAU, 1871609027fSChander Kashyap DIV_FSYS0, 1881609027fSChander Kashyap DIV_FSYS1, 1891609027fSChander Kashyap DIV_FSYS2, 1901609027fSChander Kashyap DIV_PERIC0, 1911609027fSChander Kashyap DIV_PERIC1, 1921609027fSChander Kashyap DIV_PERIC2, 1931609027fSChander Kashyap DIV_PERIC3, 1941609027fSChander Kashyap DIV_PERIC4, 1951609027fSChander Kashyap GATE_BUS_TOP, 1961609027fSChander Kashyap GATE_BUS_FSYS0, 1971609027fSChander Kashyap GATE_BUS_PERIC, 1981609027fSChander Kashyap GATE_BUS_PERIC1, 1991609027fSChander Kashyap GATE_BUS_PERIS0, 2001609027fSChander Kashyap GATE_BUS_PERIS1, 2011609027fSChander Kashyap GATE_IP_GSCL0, 2021609027fSChander Kashyap GATE_IP_GSCL1, 2031609027fSChander Kashyap GATE_IP_MFC, 2041609027fSChander Kashyap GATE_IP_DISP1, 2051609027fSChander Kashyap GATE_IP_G3D, 2061609027fSChander Kashyap GATE_IP_GEN, 2071609027fSChander Kashyap GATE_IP_MSCL, 2081609027fSChander Kashyap GATE_TOP_SCLK_GSCL, 2091609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 2101609027fSChander Kashyap GATE_TOP_SCLK_MAU, 2111609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 2121609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 2131609027fSChander Kashyap SRC_CDREX, 2141609027fSChander Kashyap SRC_KFC, 2151609027fSChander Kashyap DIV_KFC0, 2161609027fSChander Kashyap }; 2171609027fSChander Kashyap 2181609027fSChander Kashyap /* list of all parent clocks */ 2191609027fSChander Kashyap PNAME(mspll_cpu_p) = { "sclk_cpll", "sclk_dpll", 2201609027fSChander Kashyap "sclk_mpll", "sclk_spll" }; 2211609027fSChander Kashyap PNAME(cpu_p) = { "mout_apll" , "mout_mspll_cpu" }; 2221609027fSChander Kashyap PNAME(kfc_p) = { "mout_kpll" , "mout_mspll_kfc" }; 2231609027fSChander Kashyap PNAME(apll_p) = { "fin_pll", "fout_apll", }; 2241609027fSChander Kashyap PNAME(bpll_p) = { "fin_pll", "fout_bpll", }; 2251609027fSChander Kashyap PNAME(cpll_p) = { "fin_pll", "fout_cpll", }; 2261609027fSChander Kashyap PNAME(dpll_p) = { "fin_pll", "fout_dpll", }; 2271609027fSChander Kashyap PNAME(epll_p) = { "fin_pll", "fout_epll", }; 2281609027fSChander Kashyap PNAME(ipll_p) = { "fin_pll", "fout_ipll", }; 2291609027fSChander Kashyap PNAME(kpll_p) = { "fin_pll", "fout_kpll", }; 2301609027fSChander Kashyap PNAME(mpll_p) = { "fin_pll", "fout_mpll", }; 2311609027fSChander Kashyap PNAME(rpll_p) = { "fin_pll", "fout_rpll", }; 2321609027fSChander Kashyap PNAME(spll_p) = { "fin_pll", "fout_spll", }; 2331609027fSChander Kashyap PNAME(vpll_p) = { "fin_pll", "fout_vpll", }; 2341609027fSChander Kashyap 2351609027fSChander Kashyap PNAME(group1_p) = { "sclk_cpll", "sclk_dpll", "sclk_mpll" }; 2361609027fSChander Kashyap PNAME(group2_p) = { "fin_pll", "sclk_cpll", "sclk_dpll", "sclk_mpll", 2371609027fSChander Kashyap "sclk_spll", "sclk_ipll", "sclk_epll", "sclk_rpll" }; 2381609027fSChander Kashyap PNAME(group3_p) = { "sclk_rpll", "sclk_spll" }; 2391609027fSChander Kashyap PNAME(group4_p) = { "sclk_ipll", "sclk_dpll", "sclk_mpll" }; 2401609027fSChander Kashyap PNAME(group5_p) = { "sclk_vpll", "sclk_dpll" }; 2411609027fSChander Kashyap 2421609027fSChander Kashyap PNAME(sw_aclk66_p) = { "dout_aclk66", "sclk_spll" }; 2431609027fSChander Kashyap PNAME(aclk66_peric_p) = { "fin_pll", "mout_sw_aclk66" }; 2441609027fSChander Kashyap 2451609027fSChander Kashyap PNAME(sw_aclk200_fsys_p) = { "dout_aclk200_fsys", "sclk_spll"}; 2461609027fSChander Kashyap PNAME(user_aclk200_fsys_p) = { "fin_pll", "mout_sw_aclk200_fsys" }; 2471609027fSChander Kashyap 2481609027fSChander Kashyap PNAME(sw_aclk200_fsys2_p) = { "dout_aclk200_fsys2", "sclk_spll"}; 2491609027fSChander Kashyap PNAME(user_aclk200_fsys2_p) = { "fin_pll", "mout_sw_aclk200_fsys2" }; 2501609027fSChander Kashyap 2511609027fSChander Kashyap PNAME(sw_aclk200_p) = { "dout_aclk200", "sclk_spll"}; 2521609027fSChander Kashyap PNAME(aclk200_disp1_p) = { "fin_pll", "mout_sw_aclk200" }; 2531609027fSChander Kashyap 2541609027fSChander Kashyap PNAME(sw_aclk400_mscl_p) = { "dout_aclk400_mscl", "sclk_spll"}; 2551609027fSChander Kashyap PNAME(user_aclk400_mscl_p) = { "fin_pll", "mout_sw_aclk400_mscl" }; 2561609027fSChander Kashyap 2571609027fSChander Kashyap PNAME(sw_aclk333_p) = { "dout_aclk333", "sclk_spll"}; 2581609027fSChander Kashyap PNAME(user_aclk333_p) = { "fin_pll", "mout_sw_aclk333" }; 2591609027fSChander Kashyap 2601609027fSChander Kashyap PNAME(sw_aclk166_p) = { "dout_aclk166", "sclk_spll"}; 2611609027fSChander Kashyap PNAME(user_aclk166_p) = { "fin_pll", "mout_sw_aclk166" }; 2621609027fSChander Kashyap 2631609027fSChander Kashyap PNAME(sw_aclk266_p) = { "dout_aclk266", "sclk_spll"}; 2641609027fSChander Kashyap PNAME(user_aclk266_p) = { "fin_pll", "mout_sw_aclk266" }; 2651609027fSChander Kashyap 2661609027fSChander Kashyap PNAME(sw_aclk333_432_gscl_p) = { "dout_aclk333_432_gscl", "sclk_spll"}; 2671609027fSChander Kashyap PNAME(user_aclk333_432_gscl_p) = { "fin_pll", "mout_sw_aclk333_432_gscl" }; 2681609027fSChander Kashyap 2691609027fSChander Kashyap PNAME(sw_aclk300_gscl_p) = { "dout_aclk300_gscl", "sclk_spll"}; 2701609027fSChander Kashyap PNAME(user_aclk300_gscl_p) = { "fin_pll", "mout_sw_aclk300_gscl" }; 2711609027fSChander Kashyap 2721609027fSChander Kashyap PNAME(sw_aclk300_disp1_p) = { "dout_aclk300_disp1", "sclk_spll"}; 2731609027fSChander Kashyap PNAME(user_aclk300_disp1_p) = { "fin_pll", "mout_sw_aclk300_disp1" }; 2741609027fSChander Kashyap 2751609027fSChander Kashyap PNAME(sw_aclk300_jpeg_p) = { "dout_aclk300_jpeg", "sclk_spll"}; 2761609027fSChander Kashyap PNAME(user_aclk300_jpeg_p) = { "fin_pll", "mout_sw_aclk300_jpeg" }; 2771609027fSChander Kashyap 2781609027fSChander Kashyap PNAME(sw_aclk_g3d_p) = { "dout_aclk_g3d", "sclk_spll"}; 2791609027fSChander Kashyap PNAME(user_aclk_g3d_p) = { "fin_pll", "mout_sw_aclk_g3d" }; 2801609027fSChander Kashyap 2811609027fSChander Kashyap PNAME(sw_aclk266_g2d_p) = { "dout_aclk266_g2d", "sclk_spll"}; 2821609027fSChander Kashyap PNAME(user_aclk266_g2d_p) = { "fin_pll", "mout_sw_aclk266_g2d" }; 2831609027fSChander Kashyap 2841609027fSChander Kashyap PNAME(sw_aclk333_g2d_p) = { "dout_aclk333_g2d", "sclk_spll"}; 2851609027fSChander Kashyap PNAME(user_aclk333_g2d_p) = { "fin_pll", "mout_sw_aclk333_g2d" }; 2861609027fSChander Kashyap 2871609027fSChander Kashyap PNAME(audio0_p) = { "fin_pll", "cdclk0", "sclk_dpll", "sclk_mpll", 2881609027fSChander Kashyap "sclk_spll", "sclk_ipll", "sclk_epll", "sclk_rpll" }; 2891609027fSChander Kashyap PNAME(audio1_p) = { "fin_pll", "cdclk1", "sclk_dpll", "sclk_mpll", 2901609027fSChander Kashyap "sclk_spll", "sclk_ipll", "sclk_epll", "sclk_rpll" }; 2911609027fSChander Kashyap PNAME(audio2_p) = { "fin_pll", "cdclk2", "sclk_dpll", "sclk_mpll", 2921609027fSChander Kashyap "sclk_spll", "sclk_ipll", "sclk_epll", "sclk_rpll" }; 2931609027fSChander Kashyap PNAME(spdif_p) = { "fin_pll", "dout_audio0", "dout_audio1", "dout_audio2", 2941609027fSChander Kashyap "spdif_extclk", "sclk_ipll", "sclk_epll", "sclk_rpll" }; 29514d87cdaSRahul Sharma PNAME(hdmi_p) = { "dout_hdmi_pixel", "sclk_hdmiphy" }; 2961609027fSChander Kashyap PNAME(maudio0_p) = { "fin_pll", "maudio_clk", "sclk_dpll", "sclk_mpll", 2971609027fSChander Kashyap "sclk_spll", "sclk_ipll", "sclk_epll", "sclk_rpll" }; 2981609027fSChander Kashyap 2991609027fSChander Kashyap /* fixed rate clocks generated outside the soc */ 300c7306229SSachin Kamat static struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[] __initdata = { 3011609027fSChander Kashyap FRATE(fin_pll, "fin_pll", NULL, CLK_IS_ROOT, 0), 3021609027fSChander Kashyap }; 3031609027fSChander Kashyap 3041609027fSChander Kashyap /* fixed rate clocks generated inside the soc */ 305c7306229SSachin Kamat static struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[] __initdata = { 306c9f3f081SRahul Sharma FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), 3071609027fSChander Kashyap FRATE(none, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000), 3081609027fSChander Kashyap FRATE(none, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000), 3091609027fSChander Kashyap FRATE(none, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000), 3101609027fSChander Kashyap FRATE(none, "sclk_usbh20_scan_clk", NULL, CLK_IS_ROOT, 480000000), 3111609027fSChander Kashyap }; 3121609027fSChander Kashyap 313c7306229SSachin Kamat static struct samsung_fixed_factor_clock exynos5420_fixed_factor_clks[] __initdata = { 3141609027fSChander Kashyap FFACTOR(none, "sclk_hsic_12m", "fin_pll", 1, 2, 0), 3151609027fSChander Kashyap }; 3161609027fSChander Kashyap 317c7306229SSachin Kamat static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = { 3181609027fSChander Kashyap MUX(none, "mout_mspll_kfc", mspll_cpu_p, SRC_TOP7, 8, 2), 3191609027fSChander Kashyap MUX(none, "mout_mspll_cpu", mspll_cpu_p, SRC_TOP7, 12, 2), 3201609027fSChander Kashyap MUX(none, "mout_apll", apll_p, SRC_CPU, 0, 1), 3211609027fSChander Kashyap MUX(none, "mout_cpu", cpu_p, SRC_CPU, 16, 1), 3221609027fSChander Kashyap MUX(none, "mout_kpll", kpll_p, SRC_KFC, 0, 1), 3231609027fSChander Kashyap MUX(none, "mout_cpu_kfc", kfc_p, SRC_KFC, 16, 1), 3241609027fSChander Kashyap 3251609027fSChander Kashyap MUX(none, "sclk_bpll", bpll_p, SRC_CDREX, 0, 1), 3261609027fSChander Kashyap 3271609027fSChander Kashyap MUX_A(none, "mout_aclk400_mscl", group1_p, 3281609027fSChander Kashyap SRC_TOP0, 4, 2, "aclk400_mscl"), 3291609027fSChander Kashyap MUX(none, "mout_aclk200", group1_p, SRC_TOP0, 8, 2), 3301609027fSChander Kashyap MUX(none, "mout_aclk200_fsys2", group1_p, SRC_TOP0, 12, 2), 3311609027fSChander Kashyap MUX(none, "mout_aclk200_fsys", group1_p, SRC_TOP0, 28, 2), 3321609027fSChander Kashyap 3331609027fSChander Kashyap MUX(none, "mout_aclk333_432_gscl", group4_p, SRC_TOP1, 0, 2), 3341609027fSChander Kashyap MUX(none, "mout_aclk66", group1_p, SRC_TOP1, 8, 2), 3351609027fSChander Kashyap MUX(none, "mout_aclk266", group1_p, SRC_TOP1, 20, 2), 3361609027fSChander Kashyap MUX(none, "mout_aclk166", group1_p, SRC_TOP1, 24, 2), 3371609027fSChander Kashyap MUX(none, "mout_aclk333", group1_p, SRC_TOP1, 28, 2), 3381609027fSChander Kashyap 3391609027fSChander Kashyap MUX(none, "mout_aclk333_g2d", group1_p, SRC_TOP2, 8, 2), 3401609027fSChander Kashyap MUX(none, "mout_aclk266_g2d", group1_p, SRC_TOP2, 12, 2), 3411609027fSChander Kashyap MUX(none, "mout_aclk_g3d", group5_p, SRC_TOP2, 16, 1), 3421609027fSChander Kashyap MUX(none, "mout_aclk300_jpeg", group1_p, SRC_TOP2, 20, 2), 3431609027fSChander Kashyap MUX(none, "mout_aclk300_disp1", group1_p, SRC_TOP2, 24, 2), 3441609027fSChander Kashyap MUX(none, "mout_aclk300_gscl", group1_p, SRC_TOP2, 28, 2), 3451609027fSChander Kashyap 3461609027fSChander Kashyap MUX(none, "mout_user_aclk400_mscl", user_aclk400_mscl_p, 3471609027fSChander Kashyap SRC_TOP3, 4, 1), 3481609027fSChander Kashyap MUX_A(none, "mout_aclk200_disp1", aclk200_disp1_p, 3491609027fSChander Kashyap SRC_TOP3, 8, 1, "aclk200_disp1"), 3501609027fSChander Kashyap MUX(none, "mout_user_aclk200_fsys2", user_aclk200_fsys2_p, 3511609027fSChander Kashyap SRC_TOP3, 12, 1), 3521609027fSChander Kashyap MUX(none, "mout_user_aclk200_fsys", user_aclk200_fsys_p, 3531609027fSChander Kashyap SRC_TOP3, 28, 1), 3541609027fSChander Kashyap 3551609027fSChander Kashyap MUX(none, "mout_user_aclk333_432_gscl", user_aclk333_432_gscl_p, 3561609027fSChander Kashyap SRC_TOP4, 0, 1), 3571609027fSChander Kashyap MUX(none, "mout_aclk66_peric", aclk66_peric_p, SRC_TOP4, 8, 1), 3581609027fSChander Kashyap MUX(none, "mout_user_aclk266", user_aclk266_p, SRC_TOP4, 20, 1), 3591609027fSChander Kashyap MUX(none, "mout_user_aclk166", user_aclk166_p, SRC_TOP4, 24, 1), 3601609027fSChander Kashyap MUX(none, "mout_user_aclk333", user_aclk333_p, SRC_TOP4, 28, 1), 3611609027fSChander Kashyap 3621609027fSChander Kashyap MUX(none, "mout_aclk66_psgen", aclk66_peric_p, SRC_TOP5, 4, 1), 3631609027fSChander Kashyap MUX(none, "mout_user_aclk333_g2d", user_aclk333_g2d_p, SRC_TOP5, 8, 1), 3641609027fSChander Kashyap MUX(none, "mout_user_aclk266_g2d", user_aclk266_g2d_p, SRC_TOP5, 12, 1), 3651609027fSChander Kashyap MUX_A(none, "mout_user_aclk_g3d", user_aclk_g3d_p, 3661609027fSChander Kashyap SRC_TOP5, 16, 1, "aclkg3d"), 3671609027fSChander Kashyap MUX(none, "mout_user_aclk300_jpeg", user_aclk300_jpeg_p, 3681609027fSChander Kashyap SRC_TOP5, 20, 1), 3691609027fSChander Kashyap MUX(none, "mout_user_aclk300_disp1", user_aclk300_disp1_p, 3701609027fSChander Kashyap SRC_TOP5, 24, 1), 3711609027fSChander Kashyap MUX(none, "mout_user_aclk300_gscl", user_aclk300_gscl_p, 3721609027fSChander Kashyap SRC_TOP5, 28, 1), 3731609027fSChander Kashyap 3741609027fSChander Kashyap MUX(none, "sclk_mpll", mpll_p, SRC_TOP6, 0, 1), 3751609027fSChander Kashyap MUX(none, "sclk_vpll", vpll_p, SRC_TOP6, 4, 1), 3761609027fSChander Kashyap MUX(none, "sclk_spll", spll_p, SRC_TOP6, 8, 1), 3771609027fSChander Kashyap MUX(none, "sclk_ipll", ipll_p, SRC_TOP6, 12, 1), 3781609027fSChander Kashyap MUX(none, "sclk_rpll", rpll_p, SRC_TOP6, 16, 1), 3791609027fSChander Kashyap MUX(none, "sclk_epll", epll_p, SRC_TOP6, 20, 1), 3801609027fSChander Kashyap MUX(none, "sclk_dpll", dpll_p, SRC_TOP6, 24, 1), 3811609027fSChander Kashyap MUX(none, "sclk_cpll", cpll_p, SRC_TOP6, 28, 1), 3821609027fSChander Kashyap 3831609027fSChander Kashyap MUX(none, "mout_sw_aclk400_mscl", sw_aclk400_mscl_p, SRC_TOP10, 4, 1), 3841609027fSChander Kashyap MUX(none, "mout_sw_aclk200", sw_aclk200_p, SRC_TOP10, 8, 1), 3851609027fSChander Kashyap MUX(none, "mout_sw_aclk200_fsys2", sw_aclk200_fsys2_p, 3861609027fSChander Kashyap SRC_TOP10, 12, 1), 3871609027fSChander Kashyap MUX(none, "mout_sw_aclk200_fsys", sw_aclk200_fsys_p, SRC_TOP10, 28, 1), 3881609027fSChander Kashyap 3891609027fSChander Kashyap MUX(none, "mout_sw_aclk333_432_gscl", sw_aclk333_432_gscl_p, 3901609027fSChander Kashyap SRC_TOP11, 0, 1), 3911609027fSChander Kashyap MUX(none, "mout_sw_aclk66", sw_aclk66_p, SRC_TOP11, 8, 1), 3921609027fSChander Kashyap MUX(none, "mout_sw_aclk266", sw_aclk266_p, SRC_TOP11, 20, 1), 3931609027fSChander Kashyap MUX(none, "mout_sw_aclk166", sw_aclk166_p, SRC_TOP11, 24, 1), 3941609027fSChander Kashyap MUX(none, "mout_sw_aclk333", sw_aclk333_p, SRC_TOP11, 28, 1), 3951609027fSChander Kashyap 3961609027fSChander Kashyap MUX(none, "mout_sw_aclk333_g2d", sw_aclk333_g2d_p, SRC_TOP12, 8, 1), 3971609027fSChander Kashyap MUX(none, "mout_sw_aclk266_g2d", sw_aclk266_g2d_p, SRC_TOP12, 12, 1), 3981609027fSChander Kashyap MUX(none, "mout_sw_aclk_g3d", sw_aclk_g3d_p, SRC_TOP12, 16, 1), 3991609027fSChander Kashyap MUX(none, "mout_sw_aclk300_jpeg", sw_aclk300_jpeg_p, SRC_TOP12, 20, 1), 4001609027fSChander Kashyap MUX(none, "mout_sw_aclk300_disp1", sw_aclk300_disp1_p, 4011609027fSChander Kashyap SRC_TOP12, 24, 1), 4021609027fSChander Kashyap MUX(none, "mout_sw_aclk300_gscl", sw_aclk300_gscl_p, SRC_TOP12, 28, 1), 4031609027fSChander Kashyap 4041609027fSChander Kashyap /* DISP1 Block */ 4051609027fSChander Kashyap MUX(none, "mout_fimd1", group3_p, SRC_DISP10, 4, 1), 4061609027fSChander Kashyap MUX(none, "mout_mipi1", group2_p, SRC_DISP10, 16, 3), 4071609027fSChander Kashyap MUX(none, "mout_dp1", group2_p, SRC_DISP10, 20, 3), 4081609027fSChander Kashyap MUX(none, "mout_pixel", group2_p, SRC_DISP10, 24, 3), 4094625f1b5SRahul Sharma MUX(mout_hdmi, "mout_hdmi", hdmi_p, SRC_DISP10, 28, 1), 4101609027fSChander Kashyap 4111609027fSChander Kashyap /* MAU Block */ 4121609027fSChander Kashyap MUX(none, "mout_maudio0", maudio0_p, SRC_MAU, 28, 3), 4131609027fSChander Kashyap 4141609027fSChander Kashyap /* FSYS Block */ 4151609027fSChander Kashyap MUX(none, "mout_usbd301", group2_p, SRC_FSYS, 4, 3), 4161609027fSChander Kashyap MUX(none, "mout_mmc0", group2_p, SRC_FSYS, 8, 3), 4171609027fSChander Kashyap MUX(none, "mout_mmc1", group2_p, SRC_FSYS, 12, 3), 4181609027fSChander Kashyap MUX(none, "mout_mmc2", group2_p, SRC_FSYS, 16, 3), 4191609027fSChander Kashyap MUX(none, "mout_usbd300", group2_p, SRC_FSYS, 20, 3), 4201609027fSChander Kashyap MUX(none, "mout_unipro", group2_p, SRC_FSYS, 24, 3), 4211609027fSChander Kashyap 4221609027fSChander Kashyap /* PERIC Block */ 4231609027fSChander Kashyap MUX(none, "mout_uart0", group2_p, SRC_PERIC0, 4, 3), 4241609027fSChander Kashyap MUX(none, "mout_uart1", group2_p, SRC_PERIC0, 8, 3), 4251609027fSChander Kashyap MUX(none, "mout_uart2", group2_p, SRC_PERIC0, 12, 3), 4261609027fSChander Kashyap MUX(none, "mout_uart3", group2_p, SRC_PERIC0, 16, 3), 4271609027fSChander Kashyap MUX(none, "mout_pwm", group2_p, SRC_PERIC0, 24, 3), 4281609027fSChander Kashyap MUX(none, "mout_spdif", spdif_p, SRC_PERIC0, 28, 3), 4291609027fSChander Kashyap MUX(none, "mout_audio0", audio0_p, SRC_PERIC1, 8, 3), 4301609027fSChander Kashyap MUX(none, "mout_audio1", audio1_p, SRC_PERIC1, 12, 3), 4311609027fSChander Kashyap MUX(none, "mout_audio2", audio2_p, SRC_PERIC1, 16, 3), 4321609027fSChander Kashyap MUX(none, "mout_spi0", group2_p, SRC_PERIC1, 20, 3), 4331609027fSChander Kashyap MUX(none, "mout_spi1", group2_p, SRC_PERIC1, 24, 3), 4341609027fSChander Kashyap MUX(none, "mout_spi2", group2_p, SRC_PERIC1, 28, 3), 4351609027fSChander Kashyap }; 4361609027fSChander Kashyap 437c7306229SSachin Kamat static struct samsung_div_clock exynos5420_div_clks[] __initdata = { 4381609027fSChander Kashyap DIV(none, "div_arm", "mout_cpu", DIV_CPU0, 0, 3), 4391609027fSChander Kashyap DIV(none, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3), 4401609027fSChander Kashyap DIV(none, "armclk2", "div_arm", DIV_CPU0, 28, 3), 4411609027fSChander Kashyap DIV(none, "div_kfc", "mout_cpu_kfc", DIV_KFC0, 0, 3), 4421609027fSChander Kashyap DIV(none, "sclk_kpll", "mout_kpll", DIV_KFC0, 24, 3), 4431609027fSChander Kashyap 4441609027fSChander Kashyap DIV(none, "dout_aclk400_mscl", "mout_aclk400_mscl", DIV_TOP0, 4, 3), 4451609027fSChander Kashyap DIV(none, "dout_aclk200", "mout_aclk200", DIV_TOP0, 8, 3), 4461609027fSChander Kashyap DIV(none, "dout_aclk200_fsys2", "mout_aclk200_fsys2", DIV_TOP0, 12, 3), 4471609027fSChander Kashyap DIV(none, "dout_pclk200_fsys", "mout_pclk200_fsys", DIV_TOP0, 24, 3), 4481609027fSChander Kashyap DIV(none, "dout_aclk200_fsys", "mout_aclk200_fsys", DIV_TOP0, 28, 3), 4491609027fSChander Kashyap 4501609027fSChander Kashyap DIV(none, "dout_aclk333_432_gscl", "mout_aclk333_432_gscl", 4511609027fSChander Kashyap DIV_TOP1, 0, 3), 4521609027fSChander Kashyap DIV(none, "dout_aclk66", "mout_aclk66", DIV_TOP1, 8, 6), 4531609027fSChander Kashyap DIV(none, "dout_aclk266", "mout_aclk266", DIV_TOP1, 20, 3), 4541609027fSChander Kashyap DIV(none, "dout_aclk166", "mout_aclk166", DIV_TOP1, 24, 3), 4551609027fSChander Kashyap DIV(none, "dout_aclk333", "mout_aclk333", DIV_TOP1, 28, 3), 4561609027fSChander Kashyap 4571609027fSChander Kashyap DIV(none, "dout_aclk333_g2d", "mout_aclk333_g2d", DIV_TOP2, 8, 3), 4581609027fSChander Kashyap DIV(none, "dout_aclk266_g2d", "mout_aclk266_g2d", DIV_TOP2, 12, 3), 4591609027fSChander Kashyap DIV(none, "dout_aclk_g3d", "mout_aclk_g3d", DIV_TOP2, 16, 3), 4601609027fSChander Kashyap DIV(none, "dout_aclk300_jpeg", "mout_aclk300_jpeg", DIV_TOP2, 20, 3), 4611609027fSChander Kashyap DIV_A(none, "dout_aclk300_disp1", "mout_aclk300_disp1", 4621609027fSChander Kashyap DIV_TOP2, 24, 3, "aclk300_disp1"), 4631609027fSChander Kashyap DIV(none, "dout_aclk300_gscl", "mout_aclk300_gscl", DIV_TOP2, 28, 3), 4641609027fSChander Kashyap 4651609027fSChander Kashyap /* DISP1 Block */ 4661609027fSChander Kashyap DIV(none, "dout_fimd1", "mout_fimd1", DIV_DISP10, 0, 4), 4671609027fSChander Kashyap DIV(none, "dout_mipi1", "mout_mipi1", DIV_DISP10, 16, 8), 4681609027fSChander Kashyap DIV(none, "dout_dp1", "mout_dp1", DIV_DISP10, 24, 4), 4690044cbcdSRahul Sharma DIV(dout_pixel, "dout_hdmi_pixel", "mout_pixel", DIV_DISP10, 28, 4), 4701609027fSChander Kashyap 4711609027fSChander Kashyap /* Audio Block */ 4721609027fSChander Kashyap DIV(none, "dout_maudio0", "mout_maudio0", DIV_MAU, 20, 4), 4731609027fSChander Kashyap DIV(none, "dout_maupcm0", "dout_maudio0", DIV_MAU, 24, 8), 4741609027fSChander Kashyap 4751609027fSChander Kashyap /* USB3.0 */ 4761609027fSChander Kashyap DIV(none, "dout_usbphy301", "mout_usbd301", DIV_FSYS0, 12, 4), 4771609027fSChander Kashyap DIV(none, "dout_usbphy300", "mout_usbd300", DIV_FSYS0, 16, 4), 4781609027fSChander Kashyap DIV(none, "dout_usbd301", "mout_usbd301", DIV_FSYS0, 20, 4), 4791609027fSChander Kashyap DIV(none, "dout_usbd300", "mout_usbd300", DIV_FSYS0, 24, 4), 4801609027fSChander Kashyap 4811609027fSChander Kashyap /* MMC */ 4821609027fSChander Kashyap DIV(none, "dout_mmc0", "mout_mmc0", DIV_FSYS1, 0, 10), 4831609027fSChander Kashyap DIV(none, "dout_mmc1", "mout_mmc1", DIV_FSYS1, 10, 10), 4841609027fSChander Kashyap DIV(none, "dout_mmc2", "mout_mmc2", DIV_FSYS1, 20, 10), 4851609027fSChander Kashyap 4861609027fSChander Kashyap DIV(none, "dout_unipro", "mout_unipro", DIV_FSYS2, 24, 8), 4871609027fSChander Kashyap 4881609027fSChander Kashyap /* UART and PWM */ 4891609027fSChander Kashyap DIV(none, "dout_uart0", "mout_uart0", DIV_PERIC0, 8, 4), 4901609027fSChander Kashyap DIV(none, "dout_uart1", "mout_uart1", DIV_PERIC0, 12, 4), 4911609027fSChander Kashyap DIV(none, "dout_uart2", "mout_uart2", DIV_PERIC0, 16, 4), 4921609027fSChander Kashyap DIV(none, "dout_uart3", "mout_uart3", DIV_PERIC0, 20, 4), 4931609027fSChander Kashyap DIV(none, "dout_pwm", "mout_pwm", DIV_PERIC0, 28, 4), 4941609027fSChander Kashyap 4951609027fSChander Kashyap /* SPI */ 4961609027fSChander Kashyap DIV(none, "dout_spi0", "mout_spi0", DIV_PERIC1, 20, 4), 4971609027fSChander Kashyap DIV(none, "dout_spi1", "mout_spi1", DIV_PERIC1, 24, 4), 4981609027fSChander Kashyap DIV(none, "dout_spi2", "mout_spi2", DIV_PERIC1, 28, 4), 4991609027fSChander Kashyap 5001609027fSChander Kashyap /* PCM */ 5011609027fSChander Kashyap DIV(none, "dout_pcm1", "dout_audio1", DIV_PERIC2, 16, 8), 5021609027fSChander Kashyap DIV(none, "dout_pcm2", "dout_audio2", DIV_PERIC2, 24, 8), 5031609027fSChander Kashyap 5041609027fSChander Kashyap /* Audio - I2S */ 5051609027fSChander Kashyap DIV(none, "dout_i2s1", "dout_audio1", DIV_PERIC3, 6, 6), 5061609027fSChander Kashyap DIV(none, "dout_i2s2", "dout_audio2", DIV_PERIC3, 12, 6), 5071609027fSChander Kashyap DIV(none, "dout_audio0", "mout_audio0", DIV_PERIC3, 20, 4), 5081609027fSChander Kashyap DIV(none, "dout_audio1", "mout_audio1", DIV_PERIC3, 24, 4), 5091609027fSChander Kashyap DIV(none, "dout_audio2", "mout_audio2", DIV_PERIC3, 28, 4), 5101609027fSChander Kashyap 5111609027fSChander Kashyap /* SPI Pre-Ratio */ 5121609027fSChander Kashyap DIV(none, "dout_pre_spi0", "dout_spi0", DIV_PERIC4, 8, 8), 5131609027fSChander Kashyap DIV(none, "dout_pre_spi1", "dout_spi1", DIV_PERIC4, 16, 8), 5141609027fSChander Kashyap DIV(none, "dout_pre_spi2", "dout_spi2", DIV_PERIC4, 24, 8), 5151609027fSChander Kashyap }; 5161609027fSChander Kashyap 517c7306229SSachin Kamat static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { 5181609027fSChander Kashyap /* TODO: Re-verify the CG bits for all the gate clocks */ 5191609027fSChander Kashyap GATE_A(mct, "pclk_st", "aclk66_psgen", GATE_BUS_PERIS1, 2, 0, 0, "mct"), 5201609027fSChander Kashyap 5211609027fSChander Kashyap GATE(0, "aclk200_fsys", "mout_user_aclk200_fsys", 5221609027fSChander Kashyap GATE_BUS_FSYS0, 9, CLK_IGNORE_UNUSED, 0), 5231609027fSChander Kashyap GATE(0, "aclk200_fsys2", "mout_user_aclk200_fsys2", 5241609027fSChander Kashyap GATE_BUS_FSYS0, 10, CLK_IGNORE_UNUSED, 0), 5251609027fSChander Kashyap 5261609027fSChander Kashyap GATE(0, "aclk333_g2d", "mout_user_aclk333_g2d", 5271609027fSChander Kashyap GATE_BUS_TOP, 0, CLK_IGNORE_UNUSED, 0), 5281609027fSChander Kashyap GATE(0, "aclk266_g2d", "mout_user_aclk266_g2d", 5291609027fSChander Kashyap GATE_BUS_TOP, 1, CLK_IGNORE_UNUSED, 0), 5301609027fSChander Kashyap GATE(0, "aclk300_jpeg", "mout_user_aclk300_jpeg", 5311609027fSChander Kashyap GATE_BUS_TOP, 4, CLK_IGNORE_UNUSED, 0), 5321609027fSChander Kashyap GATE(0, "aclk300_gscl", "mout_user_aclk300_gscl", 5331609027fSChander Kashyap GATE_BUS_TOP, 6, CLK_IGNORE_UNUSED, 0), 5341609027fSChander Kashyap GATE(0, "aclk333_432_gscl", "mout_user_aclk333_432_gscl", 5351609027fSChander Kashyap GATE_BUS_TOP, 7, CLK_IGNORE_UNUSED, 0), 5361609027fSChander Kashyap GATE(0, "pclk66_gpio", "mout_sw_aclk66", 5371609027fSChander Kashyap GATE_BUS_TOP, 9, CLK_IGNORE_UNUSED, 0), 5381609027fSChander Kashyap GATE(0, "aclk66_psgen", "mout_aclk66_psgen", 5391609027fSChander Kashyap GATE_BUS_TOP, 10, CLK_IGNORE_UNUSED, 0), 5401609027fSChander Kashyap GATE(0, "aclk66_peric", "mout_aclk66_peric", 5411609027fSChander Kashyap GATE_BUS_TOP, 11, 0, 0), 5421609027fSChander Kashyap GATE(0, "aclk166", "mout_user_aclk166", 5431609027fSChander Kashyap GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), 5441609027fSChander Kashyap GATE(0, "aclk333", "mout_aclk333", 5451609027fSChander Kashyap GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), 5461609027fSChander Kashyap 5471609027fSChander Kashyap /* sclk */ 5481609027fSChander Kashyap GATE(sclk_uart0, "sclk_uart0", "dout_uart0", 5491609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 0, CLK_SET_RATE_PARENT, 0), 5501609027fSChander Kashyap GATE(sclk_uart1, "sclk_uart1", "dout_uart1", 5511609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 1, CLK_SET_RATE_PARENT, 0), 5521609027fSChander Kashyap GATE(sclk_uart2, "sclk_uart2", "dout_uart2", 5531609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 2, CLK_SET_RATE_PARENT, 0), 5541609027fSChander Kashyap GATE(sclk_uart3, "sclk_uart3", "dout_uart3", 5551609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 3, CLK_SET_RATE_PARENT, 0), 5561609027fSChander Kashyap GATE(sclk_spi0, "sclk_spi0", "dout_pre_spi0", 5571609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 6, CLK_SET_RATE_PARENT, 0), 5581609027fSChander Kashyap GATE(sclk_spi1, "sclk_spi1", "dout_pre_spi1", 5591609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 7, CLK_SET_RATE_PARENT, 0), 5601609027fSChander Kashyap GATE(sclk_spi2, "sclk_spi2", "dout_pre_spi2", 5611609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 8, CLK_SET_RATE_PARENT, 0), 5621609027fSChander Kashyap GATE(sclk_spdif, "sclk_spdif", "mout_spdif", 5631609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 9, CLK_SET_RATE_PARENT, 0), 5641609027fSChander Kashyap GATE(sclk_pwm, "sclk_pwm", "dout_pwm", 5651609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0), 5661609027fSChander Kashyap GATE(sclk_pcm1, "sclk_pcm1", "dout_pcm1", 5671609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 15, CLK_SET_RATE_PARENT, 0), 5681609027fSChander Kashyap GATE(sclk_pcm2, "sclk_pcm2", "dout_pcm2", 5691609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 16, CLK_SET_RATE_PARENT, 0), 5701609027fSChander Kashyap GATE(sclk_i2s1, "sclk_i2s1", "dout_i2s1", 5711609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 17, CLK_SET_RATE_PARENT, 0), 5721609027fSChander Kashyap GATE(sclk_i2s2, "sclk_i2s2", "dout_i2s2", 5731609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 18, CLK_SET_RATE_PARENT, 0), 5741609027fSChander Kashyap 5751609027fSChander Kashyap GATE(sclk_mmc0, "sclk_mmc0", "dout_mmc0", 5761609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 0, CLK_SET_RATE_PARENT, 0), 5771609027fSChander Kashyap GATE(sclk_mmc1, "sclk_mmc1", "dout_mmc1", 5781609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 1, CLK_SET_RATE_PARENT, 0), 5791609027fSChander Kashyap GATE(sclk_mmc2, "sclk_mmc2", "dout_mmc2", 5801609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 2, CLK_SET_RATE_PARENT, 0), 5811609027fSChander Kashyap GATE(sclk_usbphy301, "sclk_usbphy301", "dout_usbphy301", 5821609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 7, CLK_SET_RATE_PARENT, 0), 5831609027fSChander Kashyap GATE(sclk_usbphy300, "sclk_usbphy300", "dout_usbphy300", 5841609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 8, CLK_SET_RATE_PARENT, 0), 5851609027fSChander Kashyap GATE(sclk_usbd300, "sclk_usbd300", "dout_usbd300", 5861609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 9, CLK_SET_RATE_PARENT, 0), 5871609027fSChander Kashyap GATE(sclk_usbd301, "sclk_usbd301", "dout_usbd301", 5881609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 10, CLK_SET_RATE_PARENT, 0), 5891609027fSChander Kashyap 5901609027fSChander Kashyap GATE(sclk_usbd301, "sclk_unipro", "dout_unipro", 5911609027fSChander Kashyap SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0), 5921609027fSChander Kashyap 5931609027fSChander Kashyap GATE(sclk_gscl_wa, "sclk_gscl_wa", "aclK333_432_gscl", 5941609027fSChander Kashyap GATE_TOP_SCLK_GSCL, 6, CLK_SET_RATE_PARENT, 0), 5951609027fSChander Kashyap GATE(sclk_gscl_wb, "sclk_gscl_wb", "aclk333_432_gscl", 5961609027fSChander Kashyap GATE_TOP_SCLK_GSCL, 7, CLK_SET_RATE_PARENT, 0), 5971609027fSChander Kashyap 5981609027fSChander Kashyap /* Display */ 5991609027fSChander Kashyap GATE(sclk_fimd1, "sclk_fimd1", "dout_fimd1", 6001609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 0, CLK_SET_RATE_PARENT, 0), 6011609027fSChander Kashyap GATE(sclk_mipi1, "sclk_mipi1", "dout_mipi1", 6021609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 3, CLK_SET_RATE_PARENT, 0), 6031609027fSChander Kashyap GATE(sclk_hdmi, "sclk_hdmi", "mout_hdmi", 6041609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 9, CLK_SET_RATE_PARENT, 0), 6051609027fSChander Kashyap GATE(sclk_pixel, "sclk_pixel", "dout_hdmi_pixel", 6061609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 10, CLK_SET_RATE_PARENT, 0), 6071609027fSChander Kashyap GATE(sclk_dp1, "sclk_dp1", "dout_dp1", 6081609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 20, CLK_SET_RATE_PARENT, 0), 6091609027fSChander Kashyap 6101609027fSChander Kashyap /* Maudio Block */ 6111609027fSChander Kashyap GATE(sclk_maudio0, "sclk_maudio0", "dout_maudio0", 6121609027fSChander Kashyap GATE_TOP_SCLK_MAU, 0, CLK_SET_RATE_PARENT, 0), 6131609027fSChander Kashyap GATE(sclk_maupcm0, "sclk_maupcm0", "dout_maupcm0", 6141609027fSChander Kashyap GATE_TOP_SCLK_MAU, 1, CLK_SET_RATE_PARENT, 0), 6151609027fSChander Kashyap /* FSYS */ 6161609027fSChander Kashyap GATE(tsi, "tsi", "aclk200_fsys", GATE_BUS_FSYS0, 0, 0, 0), 6171609027fSChander Kashyap GATE(pdma0, "pdma0", "aclk200_fsys", GATE_BUS_FSYS0, 1, 0, 0), 6181609027fSChander Kashyap GATE(pdma1, "pdma1", "aclk200_fsys", GATE_BUS_FSYS0, 2, 0, 0), 6191609027fSChander Kashyap GATE(ufs, "ufs", "aclk200_fsys2", GATE_BUS_FSYS0, 3, 0, 0), 6201609027fSChander Kashyap GATE(rtic, "rtic", "aclk200_fsys", GATE_BUS_FSYS0, 5, 0, 0), 6211609027fSChander Kashyap GATE(mmc0, "mmc0", "aclk200_fsys2", GATE_BUS_FSYS0, 12, 0, 0), 6221609027fSChander Kashyap GATE(mmc1, "mmc1", "aclk200_fsys2", GATE_BUS_FSYS0, 13, 0, 0), 6231609027fSChander Kashyap GATE(mmc2, "mmc2", "aclk200_fsys2", GATE_BUS_FSYS0, 14, 0, 0), 6241609027fSChander Kashyap GATE(sromc, "sromc", "aclk200_fsys2", 6251609027fSChander Kashyap GATE_BUS_FSYS0, 19, CLK_IGNORE_UNUSED, 0), 6261609027fSChander Kashyap GATE(usbh20, "usbh20", "aclk200_fsys", GATE_BUS_FSYS0, 20, 0, 0), 6271609027fSChander Kashyap GATE(usbd300, "usbd300", "aclk200_fsys", GATE_BUS_FSYS0, 21, 0, 0), 6281609027fSChander Kashyap GATE(usbd301, "usbd301", "aclk200_fsys", GATE_BUS_FSYS0, 28, 0, 0), 6291609027fSChander Kashyap 6301609027fSChander Kashyap /* UART */ 6311609027fSChander Kashyap GATE(uart0, "uart0", "aclk66_peric", GATE_BUS_PERIC, 4, 0, 0), 6321609027fSChander Kashyap GATE(uart1, "uart1", "aclk66_peric", GATE_BUS_PERIC, 5, 0, 0), 6331609027fSChander Kashyap GATE_A(uart2, "uart2", "aclk66_peric", 6341609027fSChander Kashyap GATE_BUS_PERIC, 6, CLK_IGNORE_UNUSED, 0, "uart2"), 6351609027fSChander Kashyap GATE(uart3, "uart3", "aclk66_peric", GATE_BUS_PERIC, 7, 0, 0), 6361609027fSChander Kashyap /* I2C */ 6371609027fSChander Kashyap GATE(i2c0, "i2c0", "aclk66_peric", GATE_BUS_PERIC, 9, 0, 0), 6381609027fSChander Kashyap GATE(i2c1, "i2c1", "aclk66_peric", GATE_BUS_PERIC, 10, 0, 0), 6391609027fSChander Kashyap GATE(i2c2, "i2c2", "aclk66_peric", GATE_BUS_PERIC, 11, 0, 0), 6401609027fSChander Kashyap GATE(i2c3, "i2c3", "aclk66_peric", GATE_BUS_PERIC, 12, 0, 0), 6411609027fSChander Kashyap GATE(i2c4, "i2c4", "aclk66_peric", GATE_BUS_PERIC, 13, 0, 0), 6421609027fSChander Kashyap GATE(i2c5, "i2c5", "aclk66_peric", GATE_BUS_PERIC, 14, 0, 0), 6431609027fSChander Kashyap GATE(i2c6, "i2c6", "aclk66_peric", GATE_BUS_PERIC, 15, 0, 0), 6441609027fSChander Kashyap GATE(i2c7, "i2c7", "aclk66_peric", GATE_BUS_PERIC, 16, 0, 0), 6451609027fSChander Kashyap GATE(i2c_hdmi, "i2c_hdmi", "aclk66_peric", GATE_BUS_PERIC, 17, 0, 0), 6461609027fSChander Kashyap GATE(tsadc, "tsadc", "aclk66_peric", GATE_BUS_PERIC, 18, 0, 0), 6471609027fSChander Kashyap /* SPI */ 6481609027fSChander Kashyap GATE(spi0, "spi0", "aclk66_peric", GATE_BUS_PERIC, 19, 0, 0), 6491609027fSChander Kashyap GATE(spi1, "spi1", "aclk66_peric", GATE_BUS_PERIC, 20, 0, 0), 6501609027fSChander Kashyap GATE(spi2, "spi2", "aclk66_peric", GATE_BUS_PERIC, 21, 0, 0), 6511609027fSChander Kashyap GATE(keyif, "keyif", "aclk66_peric", GATE_BUS_PERIC, 22, 0, 0), 6521609027fSChander Kashyap /* I2S */ 6531609027fSChander Kashyap GATE(i2s1, "i2s1", "aclk66_peric", GATE_BUS_PERIC, 23, 0, 0), 6541609027fSChander Kashyap GATE(i2s2, "i2s2", "aclk66_peric", GATE_BUS_PERIC, 24, 0, 0), 6551609027fSChander Kashyap /* PCM */ 6561609027fSChander Kashyap GATE(pcm1, "pcm1", "aclk66_peric", GATE_BUS_PERIC, 25, 0, 0), 6571609027fSChander Kashyap GATE(pcm2, "pcm2", "aclk66_peric", GATE_BUS_PERIC, 26, 0, 0), 6581609027fSChander Kashyap /* PWM */ 6591609027fSChander Kashyap GATE(pwm, "pwm", "aclk66_peric", GATE_BUS_PERIC, 27, 0, 0), 6601609027fSChander Kashyap /* SPDIF */ 6611609027fSChander Kashyap GATE(spdif, "spdif", "aclk66_peric", GATE_BUS_PERIC, 29, 0, 0), 6621609027fSChander Kashyap 6631609027fSChander Kashyap GATE(i2c8, "i2c8", "aclk66_peric", GATE_BUS_PERIC1, 0, 0, 0), 6641609027fSChander Kashyap GATE(i2c9, "i2c9", "aclk66_peric", GATE_BUS_PERIC1, 1, 0, 0), 6651609027fSChander Kashyap GATE(i2c10, "i2c10", "aclk66_peric", GATE_BUS_PERIC1, 2, 0, 0), 6661609027fSChander Kashyap 6671609027fSChander Kashyap GATE(chipid, "chipid", "aclk66_psgen", 6681609027fSChander Kashyap GATE_BUS_PERIS0, 12, CLK_IGNORE_UNUSED, 0), 6691609027fSChander Kashyap GATE(sysreg, "sysreg", "aclk66_psgen", 6701609027fSChander Kashyap GATE_BUS_PERIS0, 13, CLK_IGNORE_UNUSED, 0), 6711609027fSChander Kashyap GATE(tzpc0, "tzpc0", "aclk66_psgen", GATE_BUS_PERIS0, 18, 0, 0), 6721609027fSChander Kashyap GATE(tzpc1, "tzpc1", "aclk66_psgen", GATE_BUS_PERIS0, 19, 0, 0), 6731609027fSChander Kashyap GATE(tzpc2, "tzpc2", "aclk66_psgen", GATE_BUS_PERIS0, 20, 0, 0), 6741609027fSChander Kashyap GATE(tzpc3, "tzpc3", "aclk66_psgen", GATE_BUS_PERIS0, 21, 0, 0), 6751609027fSChander Kashyap GATE(tzpc4, "tzpc4", "aclk66_psgen", GATE_BUS_PERIS0, 22, 0, 0), 6761609027fSChander Kashyap GATE(tzpc5, "tzpc5", "aclk66_psgen", GATE_BUS_PERIS0, 23, 0, 0), 6771609027fSChander Kashyap GATE(tzpc6, "tzpc6", "aclk66_psgen", GATE_BUS_PERIS0, 24, 0, 0), 6781609027fSChander Kashyap GATE(tzpc7, "tzpc7", "aclk66_psgen", GATE_BUS_PERIS0, 25, 0, 0), 6791609027fSChander Kashyap GATE(tzpc8, "tzpc8", "aclk66_psgen", GATE_BUS_PERIS0, 26, 0, 0), 6801609027fSChander Kashyap GATE(tzpc9, "tzpc9", "aclk66_psgen", GATE_BUS_PERIS0, 27, 0, 0), 6811609027fSChander Kashyap 6821609027fSChander Kashyap GATE(hdmi_cec, "hdmi_cec", "aclk66_psgen", GATE_BUS_PERIS1, 0, 0, 0), 6831609027fSChander Kashyap GATE(seckey, "seckey", "aclk66_psgen", GATE_BUS_PERIS1, 1, 0, 0), 6841609027fSChander Kashyap GATE(wdt, "wdt", "aclk66_psgen", GATE_BUS_PERIS1, 3, 0, 0), 6851609027fSChander Kashyap GATE(rtc, "rtc", "aclk66_psgen", GATE_BUS_PERIS1, 4, 0, 0), 6861609027fSChander Kashyap GATE(tmu, "tmu", "aclk66_psgen", GATE_BUS_PERIS1, 5, 0, 0), 6871609027fSChander Kashyap GATE(tmu_gpu, "tmu_gpu", "aclk66_psgen", GATE_BUS_PERIS1, 6, 0, 0), 6881609027fSChander Kashyap 6891609027fSChander Kashyap GATE(gscl0, "gscl0", "aclk300_gscl", GATE_IP_GSCL0, 0, 0, 0), 6901609027fSChander Kashyap GATE(gscl1, "gscl1", "aclk300_gscl", GATE_IP_GSCL0, 1, 0, 0), 6911609027fSChander Kashyap GATE(clk_3aa, "clk_3aa", "aclk300_gscl", GATE_IP_GSCL0, 4, 0, 0), 6921609027fSChander Kashyap 6931609027fSChander Kashyap GATE(smmu_3aa, "smmu_3aa", "aclk333_432_gscl", GATE_IP_GSCL1, 2, 0, 0), 6941609027fSChander Kashyap GATE(smmu_fimcl0, "smmu_fimcl0", "aclk333_432_gscl", 6951609027fSChander Kashyap GATE_IP_GSCL1, 3, 0, 0), 6961609027fSChander Kashyap GATE(smmu_fimcl1, "smmu_fimcl1", "aclk333_432_gscl", 6971609027fSChander Kashyap GATE_IP_GSCL1, 4, 0, 0), 6981609027fSChander Kashyap GATE(smmu_gscl0, "smmu_gscl0", "aclk300_gscl", GATE_IP_GSCL1, 6, 0, 0), 6991609027fSChander Kashyap GATE(smmu_gscl1, "smmu_gscl1", "aclk300_gscl", GATE_IP_GSCL1, 7, 0, 0), 7001609027fSChander Kashyap GATE(gscl_wa, "gscl_wa", "aclk300_gscl", GATE_IP_GSCL1, 12, 0, 0), 7011609027fSChander Kashyap GATE(gscl_wb, "gscl_wb", "aclk300_gscl", GATE_IP_GSCL1, 13, 0, 0), 7021609027fSChander Kashyap GATE(smmu_fimcl3, "smmu_fimcl3,", "aclk333_432_gscl", 7031609027fSChander Kashyap GATE_IP_GSCL1, 16, 0, 0), 7041609027fSChander Kashyap GATE(fimc_lite3, "fimc_lite3", "aclk333_432_gscl", 7051609027fSChander Kashyap GATE_IP_GSCL1, 17, 0, 0), 7061609027fSChander Kashyap 7071609027fSChander Kashyap GATE(fimd1, "fimd1", "aclk300_disp1", GATE_IP_DISP1, 0, 0, 0), 7081609027fSChander Kashyap GATE(dsim1, "dsim1", "aclk200_disp1", GATE_IP_DISP1, 3, 0, 0), 7091609027fSChander Kashyap GATE(dp1, "dp1", "aclk200_disp1", GATE_IP_DISP1, 4, 0, 0), 7101609027fSChander Kashyap GATE(mixer, "mixer", "aclk166", GATE_IP_DISP1, 5, 0, 0), 7111609027fSChander Kashyap GATE(hdmi, "hdmi", "aclk200_disp1", GATE_IP_DISP1, 6, 0, 0), 7121609027fSChander Kashyap GATE(smmu_fimd1, "smmu_fimd1", "aclk300_disp1", GATE_IP_DISP1, 8, 0, 0), 7131609027fSChander Kashyap 7141609027fSChander Kashyap GATE(mfc, "mfc", "aclk333", GATE_IP_MFC, 0, 0, 0), 7151609027fSChander Kashyap GATE(smmu_mfcl, "smmu_mfcl", "aclk333", GATE_IP_MFC, 1, 0, 0), 7161609027fSChander Kashyap GATE(smmu_mfcr, "smmu_mfcr", "aclk333", GATE_IP_MFC, 2, 0, 0), 7171609027fSChander Kashyap 7181609027fSChander Kashyap GATE(g3d, "g3d", "aclkg3d", GATE_IP_G3D, 9, 0, 0), 7191609027fSChander Kashyap 7201609027fSChander Kashyap GATE(rotator, "rotator", "aclk266", GATE_IP_GEN, 1, 0, 0), 7211609027fSChander Kashyap GATE(jpeg, "jpeg", "aclk300_jpeg", GATE_IP_GEN, 2, 0, 0), 7221609027fSChander Kashyap GATE(jpeg2, "jpeg2", "aclk300_jpeg", GATE_IP_GEN, 3, 0, 0), 7231609027fSChander Kashyap GATE(mdma1, "mdma1", "aclk266", GATE_IP_GEN, 4, 0, 0), 7241609027fSChander Kashyap GATE(smmu_rotator, "smmu_rotator", "aclk266", GATE_IP_GEN, 6, 0, 0), 7251609027fSChander Kashyap GATE(smmu_jpeg, "smmu_jpeg", "aclk300_jpeg", GATE_IP_GEN, 7, 0, 0), 7261609027fSChander Kashyap GATE(smmu_mdma1, "smmu_mdma1", "aclk266", GATE_IP_GEN, 9, 0, 0), 7271609027fSChander Kashyap 7281609027fSChander Kashyap GATE(mscl0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0), 7291609027fSChander Kashyap GATE(mscl1, "mscl1", "aclk400_mscl", GATE_IP_MSCL, 1, 0, 0), 7301609027fSChander Kashyap GATE(mscl2, "mscl2", "aclk400_mscl", GATE_IP_MSCL, 2, 0, 0), 7311609027fSChander Kashyap GATE(smmu_mscl0, "smmu_mscl0", "aclk400_mscl", GATE_IP_MSCL, 8, 0, 0), 7321609027fSChander Kashyap GATE(smmu_mscl1, "smmu_mscl1", "aclk400_mscl", GATE_IP_MSCL, 9, 0, 0), 7331609027fSChander Kashyap GATE(smmu_mscl2, "smmu_mscl2", "aclk400_mscl", GATE_IP_MSCL, 10, 0, 0), 7349b229d8bSRahul Sharma GATE(smmu_mixer, "smmu_mixer", "aclk200_disp1", GATE_IP_DISP1, 9, 0, 0), 7351609027fSChander Kashyap }; 7361609027fSChander Kashyap 737202e5ae9SSachin Kamat static struct samsung_pll_clock exynos5420_plls[nr_plls] __initdata = { 738c898c6b7SYadwinder Singh Brar [apll] = PLL(pll_2550, fout_apll, "fout_apll", "fin_pll", APLL_LOCK, 7393ff6e0d8SYadwinder Singh Brar APLL_CON0, NULL), 740cdf64eeeSChander Kashyap [cpll] = PLL(pll_2550, fout_cpll, "fout_cpll", "fin_pll", CPLL_LOCK, 741cdf64eeeSChander Kashyap CPLL_CON0, NULL), 742c898c6b7SYadwinder Singh Brar [dpll] = PLL(pll_2550, fout_dpll, "fout_dpll", "fin_pll", DPLL_LOCK, 7433ff6e0d8SYadwinder Singh Brar DPLL_CON0, NULL), 744c898c6b7SYadwinder Singh Brar [epll] = PLL(pll_2650, fout_epll, "fout_epll", "fin_pll", EPLL_LOCK, 7453ff6e0d8SYadwinder Singh Brar EPLL_CON0, NULL), 746c898c6b7SYadwinder Singh Brar [rpll] = PLL(pll_2650, fout_rpll, "fout_rpll", "fin_pll", RPLL_LOCK, 7473ff6e0d8SYadwinder Singh Brar RPLL_CON0, NULL), 748c898c6b7SYadwinder Singh Brar [ipll] = PLL(pll_2550, fout_ipll, "fout_ipll", "fin_pll", IPLL_LOCK, 7493ff6e0d8SYadwinder Singh Brar IPLL_CON0, NULL), 750c898c6b7SYadwinder Singh Brar [spll] = PLL(pll_2550, fout_spll, "fout_spll", "fin_pll", SPLL_LOCK, 7513ff6e0d8SYadwinder Singh Brar SPLL_CON0, NULL), 752c898c6b7SYadwinder Singh Brar [vpll] = PLL(pll_2550, fout_vpll, "fout_vpll", "fin_pll", VPLL_LOCK, 7533ff6e0d8SYadwinder Singh Brar VPLL_CON0, NULL), 754c898c6b7SYadwinder Singh Brar [mpll] = PLL(pll_2550, fout_mpll, "fout_mpll", "fin_pll", MPLL_LOCK, 7553ff6e0d8SYadwinder Singh Brar MPLL_CON0, NULL), 756c898c6b7SYadwinder Singh Brar [bpll] = PLL(pll_2550, fout_bpll, "fout_bpll", "fin_pll", BPLL_LOCK, 7573ff6e0d8SYadwinder Singh Brar BPLL_CON0, NULL), 758c898c6b7SYadwinder Singh Brar [kpll] = PLL(pll_2550, fout_kpll, "fout_kpll", "fin_pll", KPLL_LOCK, 7593ff6e0d8SYadwinder Singh Brar KPLL_CON0, NULL), 760c898c6b7SYadwinder Singh Brar }; 761c898c6b7SYadwinder Singh Brar 762202e5ae9SSachin Kamat static struct of_device_id ext_clk_match[] __initdata = { 7631609027fSChander Kashyap { .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, }, 7641609027fSChander Kashyap { }, 7651609027fSChander Kashyap }; 7661609027fSChander Kashyap 7671609027fSChander Kashyap /* register exynos5420 clocks */ 768c7306229SSachin Kamat static void __init exynos5420_clk_init(struct device_node *np) 7691609027fSChander Kashyap { 7701609027fSChander Kashyap void __iomem *reg_base; 7711609027fSChander Kashyap 7721609027fSChander Kashyap if (np) { 7731609027fSChander Kashyap reg_base = of_iomap(np, 0); 7741609027fSChander Kashyap if (!reg_base) 7751609027fSChander Kashyap panic("%s: failed to map registers\n", __func__); 7761609027fSChander Kashyap } else { 7771609027fSChander Kashyap panic("%s: unable to determine soc\n", __func__); 7781609027fSChander Kashyap } 7791609027fSChander Kashyap 7801609027fSChander Kashyap samsung_clk_init(np, reg_base, nr_clks, 7811609027fSChander Kashyap exynos5420_clk_regs, ARRAY_SIZE(exynos5420_clk_regs), 7821609027fSChander Kashyap NULL, 0); 7831609027fSChander Kashyap samsung_clk_of_register_fixed_ext(exynos5420_fixed_rate_ext_clks, 7841609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_rate_ext_clks), 7851609027fSChander Kashyap ext_clk_match); 786c898c6b7SYadwinder Singh Brar samsung_clk_register_pll(exynos5420_plls, ARRAY_SIZE(exynos5420_plls), 787c898c6b7SYadwinder Singh Brar reg_base); 7881609027fSChander Kashyap samsung_clk_register_fixed_rate(exynos5420_fixed_rate_clks, 7891609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_rate_clks)); 7901609027fSChander Kashyap samsung_clk_register_fixed_factor(exynos5420_fixed_factor_clks, 7911609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_factor_clks)); 7921609027fSChander Kashyap samsung_clk_register_mux(exynos5420_mux_clks, 7931609027fSChander Kashyap ARRAY_SIZE(exynos5420_mux_clks)); 7941609027fSChander Kashyap samsung_clk_register_div(exynos5420_div_clks, 7951609027fSChander Kashyap ARRAY_SIZE(exynos5420_div_clks)); 7961609027fSChander Kashyap samsung_clk_register_gate(exynos5420_gate_clks, 7971609027fSChander Kashyap ARRAY_SIZE(exynos5420_gate_clks)); 7981609027fSChander Kashyap } 7991609027fSChander Kashyap CLK_OF_DECLARE(exynos5420_clk, "samsung,exynos5420-clock", exynos5420_clk_init); 800