11609027fSChander Kashyap /* 21609027fSChander Kashyap * Copyright (c) 2013 Samsung Electronics Co., Ltd. 31609027fSChander Kashyap * Authors: Thomas Abraham <thomas.ab@samsung.com> 41609027fSChander Kashyap * Chander Kashyap <k.chander@samsung.com> 51609027fSChander Kashyap * 61609027fSChander Kashyap * This program is free software; you can redistribute it and/or modify 71609027fSChander Kashyap * it under the terms of the GNU General Public License version 2 as 81609027fSChander Kashyap * published by the Free Software Foundation. 91609027fSChander Kashyap * 101609027fSChander Kashyap * Common Clock Framework support for Exynos5420 SoC. 111609027fSChander Kashyap */ 121609027fSChander Kashyap 13cba9d2faSAndrzej Hajda #include <dt-bindings/clock/exynos5420.h> 146f1ed07aSStephen Boyd #include <linux/slab.h> 151609027fSChander Kashyap #include <linux/clk-provider.h> 161609027fSChander Kashyap #include <linux/of.h> 171609027fSChander Kashyap #include <linux/of_address.h> 18388c7885STomasz Figa #include <linux/syscore_ops.h> 191609027fSChander Kashyap 201609027fSChander Kashyap #include "clk.h" 211609027fSChander Kashyap 22c898c6b7SYadwinder Singh Brar #define APLL_LOCK 0x0 23c898c6b7SYadwinder Singh Brar #define APLL_CON0 0x100 241609027fSChander Kashyap #define SRC_CPU 0x200 251609027fSChander Kashyap #define DIV_CPU0 0x500 261609027fSChander Kashyap #define DIV_CPU1 0x504 271609027fSChander Kashyap #define GATE_BUS_CPU 0x700 281609027fSChander Kashyap #define GATE_SCLK_CPU 0x800 2977342432SShaik Ameer Basha #define CLKOUT_CMU_CPU 0xa00 30e9d52956SVikas Sajjan #define SRC_MASK_CPERI 0x4300 315b73721bSNaveen Krishna Chatradhi #define GATE_IP_G2D 0x8800 32c898c6b7SYadwinder Singh Brar #define CPLL_LOCK 0x10020 33c898c6b7SYadwinder Singh Brar #define DPLL_LOCK 0x10030 34c898c6b7SYadwinder Singh Brar #define EPLL_LOCK 0x10040 35c898c6b7SYadwinder Singh Brar #define RPLL_LOCK 0x10050 36c898c6b7SYadwinder Singh Brar #define IPLL_LOCK 0x10060 37c898c6b7SYadwinder Singh Brar #define SPLL_LOCK 0x10070 3853cb6342SSachin Kamat #define VPLL_LOCK 0x10080 39c898c6b7SYadwinder Singh Brar #define MPLL_LOCK 0x10090 40c898c6b7SYadwinder Singh Brar #define CPLL_CON0 0x10120 41c898c6b7SYadwinder Singh Brar #define DPLL_CON0 0x10128 42c898c6b7SYadwinder Singh Brar #define EPLL_CON0 0x10130 4377342432SShaik Ameer Basha #define EPLL_CON1 0x10134 4477342432SShaik Ameer Basha #define EPLL_CON2 0x10138 45c898c6b7SYadwinder Singh Brar #define RPLL_CON0 0x10140 4677342432SShaik Ameer Basha #define RPLL_CON1 0x10144 4777342432SShaik Ameer Basha #define RPLL_CON2 0x10148 48c898c6b7SYadwinder Singh Brar #define IPLL_CON0 0x10150 49c898c6b7SYadwinder Singh Brar #define SPLL_CON0 0x10160 50c898c6b7SYadwinder Singh Brar #define VPLL_CON0 0x10170 51c898c6b7SYadwinder Singh Brar #define MPLL_CON0 0x10180 521609027fSChander Kashyap #define SRC_TOP0 0x10200 531609027fSChander Kashyap #define SRC_TOP1 0x10204 541609027fSChander Kashyap #define SRC_TOP2 0x10208 551609027fSChander Kashyap #define SRC_TOP3 0x1020c 561609027fSChander Kashyap #define SRC_TOP4 0x10210 571609027fSChander Kashyap #define SRC_TOP5 0x10214 581609027fSChander Kashyap #define SRC_TOP6 0x10218 591609027fSChander Kashyap #define SRC_TOP7 0x1021c 606520e968SAlim Akhtar #define SRC_TOP8 0x10220 /* 5800 specific */ 616520e968SAlim Akhtar #define SRC_TOP9 0x10224 /* 5800 specific */ 621609027fSChander Kashyap #define SRC_DISP10 0x1022c 631609027fSChander Kashyap #define SRC_MAU 0x10240 641609027fSChander Kashyap #define SRC_FSYS 0x10244 651609027fSChander Kashyap #define SRC_PERIC0 0x10250 661609027fSChander Kashyap #define SRC_PERIC1 0x10254 673a767b35SShaik Ameer Basha #define SRC_ISP 0x10270 686520e968SAlim Akhtar #define SRC_CAM 0x10274 /* 5800 specific */ 691609027fSChander Kashyap #define SRC_TOP10 0x10280 701609027fSChander Kashyap #define SRC_TOP11 0x10284 711609027fSChander Kashyap #define SRC_TOP12 0x10288 726520e968SAlim Akhtar #define SRC_TOP13 0x1028c /* 5800 specific */ 73e9d52956SVikas Sajjan #define SRC_MASK_TOP0 0x10300 74e9d52956SVikas Sajjan #define SRC_MASK_TOP1 0x10304 75424b673aSShaik Ameer Basha #define SRC_MASK_TOP2 0x10308 7631116a64SShaik Ameer Basha #define SRC_MASK_TOP7 0x1031c 771609027fSChander Kashyap #define SRC_MASK_DISP10 0x1032c 7831116a64SShaik Ameer Basha #define SRC_MASK_MAU 0x10334 791609027fSChander Kashyap #define SRC_MASK_FSYS 0x10340 801609027fSChander Kashyap #define SRC_MASK_PERIC0 0x10350 811609027fSChander Kashyap #define SRC_MASK_PERIC1 0x10354 82e9d52956SVikas Sajjan #define SRC_MASK_ISP 0x10370 831609027fSChander Kashyap #define DIV_TOP0 0x10500 841609027fSChander Kashyap #define DIV_TOP1 0x10504 851609027fSChander Kashyap #define DIV_TOP2 0x10508 866520e968SAlim Akhtar #define DIV_TOP8 0x10520 /* 5800 specific */ 876520e968SAlim Akhtar #define DIV_TOP9 0x10524 /* 5800 specific */ 881609027fSChander Kashyap #define DIV_DISP10 0x1052c 891609027fSChander Kashyap #define DIV_MAU 0x10544 901609027fSChander Kashyap #define DIV_FSYS0 0x10548 911609027fSChander Kashyap #define DIV_FSYS1 0x1054c 921609027fSChander Kashyap #define DIV_FSYS2 0x10550 931609027fSChander Kashyap #define DIV_PERIC0 0x10558 941609027fSChander Kashyap #define DIV_PERIC1 0x1055c 951609027fSChander Kashyap #define DIV_PERIC2 0x10560 961609027fSChander Kashyap #define DIV_PERIC3 0x10564 971609027fSChander Kashyap #define DIV_PERIC4 0x10568 986520e968SAlim Akhtar #define DIV_CAM 0x10574 /* 5800 specific */ 993a767b35SShaik Ameer Basha #define SCLK_DIV_ISP0 0x10580 1003a767b35SShaik Ameer Basha #define SCLK_DIV_ISP1 0x10584 10102932381SShaik Ameer Basha #define DIV2_RATIO0 0x10590 1021d87db4dSShaik Ameer Basha #define DIV4_RATIO 0x105a0 1031609027fSChander Kashyap #define GATE_BUS_TOP 0x10700 104e9d52956SVikas Sajjan #define GATE_BUS_DISP1 0x10728 1050a22c306SShaik Ameer Basha #define GATE_BUS_GEN 0x1073c 1061609027fSChander Kashyap #define GATE_BUS_FSYS0 0x10740 1076b5ae463SShaik Ameer Basha #define GATE_BUS_FSYS2 0x10748 1081609027fSChander Kashyap #define GATE_BUS_PERIC 0x10750 1091609027fSChander Kashyap #define GATE_BUS_PERIC1 0x10754 1101609027fSChander Kashyap #define GATE_BUS_PERIS0 0x10760 1111609027fSChander Kashyap #define GATE_BUS_PERIS1 0x10764 1126575fa76SShaik Ameer Basha #define GATE_BUS_NOC 0x10770 1133a767b35SShaik Ameer Basha #define GATE_TOP_SCLK_ISP 0x10870 1141609027fSChander Kashyap #define GATE_IP_GSCL0 0x10910 1151609027fSChander Kashyap #define GATE_IP_GSCL1 0x10920 1166520e968SAlim Akhtar #define GATE_IP_CAM 0x10924 /* 5800 specific */ 1171609027fSChander Kashyap #define GATE_IP_MFC 0x1092c 1181609027fSChander Kashyap #define GATE_IP_DISP1 0x10928 1191609027fSChander Kashyap #define GATE_IP_G3D 0x10930 1201609027fSChander Kashyap #define GATE_IP_GEN 0x10934 1216b5ae463SShaik Ameer Basha #define GATE_IP_FSYS 0x10944 122faec151bSShaik Ameer Basha #define GATE_IP_PERIC 0x10950 1230a22c306SShaik Ameer Basha #define GATE_IP_PERIS 0x10960 1241609027fSChander Kashyap #define GATE_IP_MSCL 0x10970 1251609027fSChander Kashyap #define GATE_TOP_SCLK_GSCL 0x10820 1261609027fSChander Kashyap #define GATE_TOP_SCLK_DISP1 0x10828 1271609027fSChander Kashyap #define GATE_TOP_SCLK_MAU 0x1083c 1281609027fSChander Kashyap #define GATE_TOP_SCLK_FSYS 0x10840 1291609027fSChander Kashyap #define GATE_TOP_SCLK_PERIC 0x10850 130424b673aSShaik Ameer Basha #define TOP_SPARE2 0x10b08 131c898c6b7SYadwinder Singh Brar #define BPLL_LOCK 0x20010 132c898c6b7SYadwinder Singh Brar #define BPLL_CON0 0x20110 133c898c6b7SYadwinder Singh Brar #define KPLL_LOCK 0x28000 134c898c6b7SYadwinder Singh Brar #define KPLL_CON0 0x28100 1351609027fSChander Kashyap #define SRC_KFC 0x28200 1361609027fSChander Kashyap #define DIV_KFC0 0x28500 1371609027fSChander Kashyap 1386520e968SAlim Akhtar /* Exynos5x SoC type */ 1396520e968SAlim Akhtar enum exynos5x_soc { 1406520e968SAlim Akhtar EXYNOS5420, 1416520e968SAlim Akhtar EXYNOS5800, 1426520e968SAlim Akhtar }; 1436520e968SAlim Akhtar 144c898c6b7SYadwinder Singh Brar /* list of PLLs */ 1456520e968SAlim Akhtar enum exynos5x_plls { 146c898c6b7SYadwinder Singh Brar apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, 147c898c6b7SYadwinder Singh Brar bpll, kpll, 148c898c6b7SYadwinder Singh Brar nr_plls /* number of PLLs */ 149c898c6b7SYadwinder Singh Brar }; 150c898c6b7SYadwinder Singh Brar 151388c7885STomasz Figa static void __iomem *reg_base; 1526520e968SAlim Akhtar static enum exynos5x_soc exynos5x_soc; 153388c7885STomasz Figa 154388c7885STomasz Figa #ifdef CONFIG_PM_SLEEP 1556520e968SAlim Akhtar static struct samsung_clk_reg_dump *exynos5x_save; 1566520e968SAlim Akhtar static struct samsung_clk_reg_dump *exynos5800_save; 157388c7885STomasz Figa 1581609027fSChander Kashyap /* 1591609027fSChander Kashyap * list of controller registers to be saved and restored during a 1601609027fSChander Kashyap * suspend/resume cycle. 1611609027fSChander Kashyap */ 1626520e968SAlim Akhtar static unsigned long exynos5x_clk_regs[] __initdata = { 1631609027fSChander Kashyap SRC_CPU, 1641609027fSChander Kashyap DIV_CPU0, 1651609027fSChander Kashyap DIV_CPU1, 1661609027fSChander Kashyap GATE_BUS_CPU, 1671609027fSChander Kashyap GATE_SCLK_CPU, 16877342432SShaik Ameer Basha CLKOUT_CMU_CPU, 16977342432SShaik Ameer Basha EPLL_CON0, 17077342432SShaik Ameer Basha EPLL_CON1, 17177342432SShaik Ameer Basha EPLL_CON2, 17277342432SShaik Ameer Basha RPLL_CON0, 17377342432SShaik Ameer Basha RPLL_CON1, 17477342432SShaik Ameer Basha RPLL_CON2, 1751609027fSChander Kashyap SRC_TOP0, 1761609027fSChander Kashyap SRC_TOP1, 1771609027fSChander Kashyap SRC_TOP2, 1781609027fSChander Kashyap SRC_TOP3, 1791609027fSChander Kashyap SRC_TOP4, 1801609027fSChander Kashyap SRC_TOP5, 1811609027fSChander Kashyap SRC_TOP6, 1821609027fSChander Kashyap SRC_TOP7, 1831609027fSChander Kashyap SRC_DISP10, 1841609027fSChander Kashyap SRC_MAU, 1851609027fSChander Kashyap SRC_FSYS, 1861609027fSChander Kashyap SRC_PERIC0, 1871609027fSChander Kashyap SRC_PERIC1, 1881609027fSChander Kashyap SRC_TOP10, 1891609027fSChander Kashyap SRC_TOP11, 1901609027fSChander Kashyap SRC_TOP12, 191424b673aSShaik Ameer Basha SRC_MASK_TOP2, 19231116a64SShaik Ameer Basha SRC_MASK_TOP7, 1931609027fSChander Kashyap SRC_MASK_DISP10, 1941609027fSChander Kashyap SRC_MASK_FSYS, 1951609027fSChander Kashyap SRC_MASK_PERIC0, 1961609027fSChander Kashyap SRC_MASK_PERIC1, 197e9d52956SVikas Sajjan SRC_MASK_TOP0, 198e9d52956SVikas Sajjan SRC_MASK_TOP1, 199e9d52956SVikas Sajjan SRC_MASK_MAU, 200e9d52956SVikas Sajjan SRC_MASK_ISP, 2013a767b35SShaik Ameer Basha SRC_ISP, 2021609027fSChander Kashyap DIV_TOP0, 2031609027fSChander Kashyap DIV_TOP1, 2041609027fSChander Kashyap DIV_TOP2, 2051609027fSChander Kashyap DIV_DISP10, 2061609027fSChander Kashyap DIV_MAU, 2071609027fSChander Kashyap DIV_FSYS0, 2081609027fSChander Kashyap DIV_FSYS1, 2091609027fSChander Kashyap DIV_FSYS2, 2101609027fSChander Kashyap DIV_PERIC0, 2111609027fSChander Kashyap DIV_PERIC1, 2121609027fSChander Kashyap DIV_PERIC2, 2131609027fSChander Kashyap DIV_PERIC3, 2141609027fSChander Kashyap DIV_PERIC4, 2153a767b35SShaik Ameer Basha SCLK_DIV_ISP0, 2163a767b35SShaik Ameer Basha SCLK_DIV_ISP1, 21702932381SShaik Ameer Basha DIV2_RATIO0, 2181d87db4dSShaik Ameer Basha DIV4_RATIO, 219e9d52956SVikas Sajjan GATE_BUS_DISP1, 2201609027fSChander Kashyap GATE_BUS_TOP, 2210a22c306SShaik Ameer Basha GATE_BUS_GEN, 2221609027fSChander Kashyap GATE_BUS_FSYS0, 2236b5ae463SShaik Ameer Basha GATE_BUS_FSYS2, 2241609027fSChander Kashyap GATE_BUS_PERIC, 2251609027fSChander Kashyap GATE_BUS_PERIC1, 2261609027fSChander Kashyap GATE_BUS_PERIS0, 2271609027fSChander Kashyap GATE_BUS_PERIS1, 2286575fa76SShaik Ameer Basha GATE_BUS_NOC, 2293a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 2301609027fSChander Kashyap GATE_IP_GSCL0, 2311609027fSChander Kashyap GATE_IP_GSCL1, 2321609027fSChander Kashyap GATE_IP_MFC, 2331609027fSChander Kashyap GATE_IP_DISP1, 2341609027fSChander Kashyap GATE_IP_G3D, 2351609027fSChander Kashyap GATE_IP_GEN, 2366b5ae463SShaik Ameer Basha GATE_IP_FSYS, 237faec151bSShaik Ameer Basha GATE_IP_PERIC, 2380a22c306SShaik Ameer Basha GATE_IP_PERIS, 2391609027fSChander Kashyap GATE_IP_MSCL, 2401609027fSChander Kashyap GATE_TOP_SCLK_GSCL, 2411609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 2421609027fSChander Kashyap GATE_TOP_SCLK_MAU, 2431609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 2441609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 245424b673aSShaik Ameer Basha TOP_SPARE2, 2461609027fSChander Kashyap SRC_KFC, 2471609027fSChander Kashyap DIV_KFC0, 2481609027fSChander Kashyap }; 2491609027fSChander Kashyap 2506520e968SAlim Akhtar static unsigned long exynos5800_clk_regs[] __initdata = { 2516520e968SAlim Akhtar SRC_TOP8, 2526520e968SAlim Akhtar SRC_TOP9, 2536520e968SAlim Akhtar SRC_CAM, 2546520e968SAlim Akhtar SRC_TOP1, 2556520e968SAlim Akhtar DIV_TOP8, 2566520e968SAlim Akhtar DIV_TOP9, 2576520e968SAlim Akhtar DIV_CAM, 2586520e968SAlim Akhtar GATE_IP_CAM, 2596520e968SAlim Akhtar }; 2606520e968SAlim Akhtar 261e9d52956SVikas Sajjan static const struct samsung_clk_reg_dump exynos5420_set_clksrc[] = { 262e9d52956SVikas Sajjan { .offset = SRC_MASK_CPERI, .value = 0xffffffff, }, 263e9d52956SVikas Sajjan { .offset = SRC_MASK_TOP0, .value = 0x11111111, }, 264e9d52956SVikas Sajjan { .offset = SRC_MASK_TOP1, .value = 0x11101111, }, 265e9d52956SVikas Sajjan { .offset = SRC_MASK_TOP2, .value = 0x11111110, }, 266e9d52956SVikas Sajjan { .offset = SRC_MASK_TOP7, .value = 0x00111100, }, 267e9d52956SVikas Sajjan { .offset = SRC_MASK_DISP10, .value = 0x11111110, }, 268e9d52956SVikas Sajjan { .offset = SRC_MASK_MAU, .value = 0x10000000, }, 269e9d52956SVikas Sajjan { .offset = SRC_MASK_FSYS, .value = 0x11111110, }, 270e9d52956SVikas Sajjan { .offset = SRC_MASK_PERIC0, .value = 0x11111110, }, 271e9d52956SVikas Sajjan { .offset = SRC_MASK_PERIC1, .value = 0x11111100, }, 272e9d52956SVikas Sajjan { .offset = SRC_MASK_ISP, .value = 0x11111000, }, 27397372e5aSJavier Martinez Canillas { .offset = GATE_BUS_TOP, .value = 0xffffffff, }, 274e9d52956SVikas Sajjan { .offset = GATE_BUS_DISP1, .value = 0xffffffff, }, 275e9d52956SVikas Sajjan { .offset = GATE_IP_PERIC, .value = 0xffffffff, }, 276e9d52956SVikas Sajjan }; 277e9d52956SVikas Sajjan 278388c7885STomasz Figa static int exynos5420_clk_suspend(void) 279388c7885STomasz Figa { 2806520e968SAlim Akhtar samsung_clk_save(reg_base, exynos5x_save, 2816520e968SAlim Akhtar ARRAY_SIZE(exynos5x_clk_regs)); 2826520e968SAlim Akhtar 2836520e968SAlim Akhtar if (exynos5x_soc == EXYNOS5800) 2846520e968SAlim Akhtar samsung_clk_save(reg_base, exynos5800_save, 2856520e968SAlim Akhtar ARRAY_SIZE(exynos5800_clk_regs)); 286388c7885STomasz Figa 287e9d52956SVikas Sajjan samsung_clk_restore(reg_base, exynos5420_set_clksrc, 288e9d52956SVikas Sajjan ARRAY_SIZE(exynos5420_set_clksrc)); 289e9d52956SVikas Sajjan 290388c7885STomasz Figa return 0; 291388c7885STomasz Figa } 292388c7885STomasz Figa 293388c7885STomasz Figa static void exynos5420_clk_resume(void) 294388c7885STomasz Figa { 2956520e968SAlim Akhtar samsung_clk_restore(reg_base, exynos5x_save, 2966520e968SAlim Akhtar ARRAY_SIZE(exynos5x_clk_regs)); 2976520e968SAlim Akhtar 2986520e968SAlim Akhtar if (exynos5x_soc == EXYNOS5800) 2996520e968SAlim Akhtar samsung_clk_restore(reg_base, exynos5800_save, 3006520e968SAlim Akhtar ARRAY_SIZE(exynos5800_clk_regs)); 301388c7885STomasz Figa } 302388c7885STomasz Figa 303388c7885STomasz Figa static struct syscore_ops exynos5420_clk_syscore_ops = { 304388c7885STomasz Figa .suspend = exynos5420_clk_suspend, 305388c7885STomasz Figa .resume = exynos5420_clk_resume, 306388c7885STomasz Figa }; 307388c7885STomasz Figa 308388c7885STomasz Figa static void exynos5420_clk_sleep_init(void) 309388c7885STomasz Figa { 3106520e968SAlim Akhtar exynos5x_save = samsung_clk_alloc_reg_dump(exynos5x_clk_regs, 3116520e968SAlim Akhtar ARRAY_SIZE(exynos5x_clk_regs)); 3126520e968SAlim Akhtar if (!exynos5x_save) { 313388c7885STomasz Figa pr_warn("%s: failed to allocate sleep save data, no sleep support!\n", 314388c7885STomasz Figa __func__); 315388c7885STomasz Figa return; 316388c7885STomasz Figa } 317388c7885STomasz Figa 3186520e968SAlim Akhtar if (exynos5x_soc == EXYNOS5800) { 3196520e968SAlim Akhtar exynos5800_save = 3206520e968SAlim Akhtar samsung_clk_alloc_reg_dump(exynos5800_clk_regs, 3216520e968SAlim Akhtar ARRAY_SIZE(exynos5800_clk_regs)); 3226520e968SAlim Akhtar if (!exynos5800_save) 3236520e968SAlim Akhtar goto err_soc; 3246520e968SAlim Akhtar } 3256520e968SAlim Akhtar 326388c7885STomasz Figa register_syscore_ops(&exynos5420_clk_syscore_ops); 3276520e968SAlim Akhtar return; 3286520e968SAlim Akhtar err_soc: 3296520e968SAlim Akhtar kfree(exynos5x_save); 3306520e968SAlim Akhtar pr_warn("%s: failed to allocate sleep save data, no sleep support!\n", 3316520e968SAlim Akhtar __func__); 3326520e968SAlim Akhtar return; 333388c7885STomasz Figa } 334388c7885STomasz Figa #else 335388c7885STomasz Figa static void exynos5420_clk_sleep_init(void) {} 336388c7885STomasz Figa #endif 337388c7885STomasz Figa 3381609027fSChander Kashyap /* list of all parent clocks */ 339dbd713bbSShaik Ameer Basha PNAME(mout_mspll_cpu_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 340dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll"}; 341dbd713bbSShaik Ameer Basha PNAME(mout_cpu_p) = {"mout_apll" , "mout_mspll_cpu"}; 342dbd713bbSShaik Ameer Basha PNAME(mout_kfc_p) = {"mout_kpll" , "mout_mspll_kfc"}; 343dbd713bbSShaik Ameer Basha PNAME(mout_apll_p) = {"fin_pll", "fout_apll"}; 344dbd713bbSShaik Ameer Basha PNAME(mout_bpll_p) = {"fin_pll", "fout_bpll"}; 345dbd713bbSShaik Ameer Basha PNAME(mout_cpll_p) = {"fin_pll", "fout_cpll"}; 346dbd713bbSShaik Ameer Basha PNAME(mout_dpll_p) = {"fin_pll", "fout_dpll"}; 347dbd713bbSShaik Ameer Basha PNAME(mout_epll_p) = {"fin_pll", "fout_epll"}; 348dbd713bbSShaik Ameer Basha PNAME(mout_ipll_p) = {"fin_pll", "fout_ipll"}; 349dbd713bbSShaik Ameer Basha PNAME(mout_kpll_p) = {"fin_pll", "fout_kpll"}; 350dbd713bbSShaik Ameer Basha PNAME(mout_mpll_p) = {"fin_pll", "fout_mpll"}; 351dbd713bbSShaik Ameer Basha PNAME(mout_rpll_p) = {"fin_pll", "fout_rpll"}; 352dbd713bbSShaik Ameer Basha PNAME(mout_spll_p) = {"fin_pll", "fout_spll"}; 353dbd713bbSShaik Ameer Basha PNAME(mout_vpll_p) = {"fin_pll", "fout_vpll"}; 3541609027fSChander Kashyap 355dbd713bbSShaik Ameer Basha PNAME(mout_group1_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 356dbd713bbSShaik Ameer Basha "mout_sclk_mpll"}; 357dbd713bbSShaik Ameer Basha PNAME(mout_group2_p) = {"fin_pll", "mout_sclk_cpll", 358dbd713bbSShaik Ameer Basha "mout_sclk_dpll", "mout_sclk_mpll", "mout_sclk_spll", 359dbd713bbSShaik Ameer Basha "mout_sclk_ipll", "mout_sclk_epll", "mout_sclk_rpll"}; 360dbd713bbSShaik Ameer Basha PNAME(mout_group3_p) = {"mout_sclk_rpll", "mout_sclk_spll"}; 361dbd713bbSShaik Ameer Basha PNAME(mout_group4_p) = {"mout_sclk_ipll", "mout_sclk_dpll", "mout_sclk_mpll"}; 362dbd713bbSShaik Ameer Basha PNAME(mout_group5_p) = {"mout_sclk_vpll", "mout_sclk_dpll"}; 3631609027fSChander Kashyap 364424b673aSShaik Ameer Basha PNAME(mout_fimd1_final_p) = {"mout_fimd1", "mout_fimd1_opt"}; 365dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk66_p) = {"dout_aclk66", "mout_sclk_spll"}; 366faec151bSShaik Ameer Basha PNAME(mout_user_aclk66_peric_p) = { "fin_pll", "mout_sw_aclk66"}; 367b31ca2a0SShaik Ameer Basha PNAME(mout_user_pclk66_gpio_p) = {"mout_sw_aclk66", "ff_sw_aclk66"}; 3681609027fSChander Kashyap 369dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_fsys_p) = {"dout_aclk200_fsys", "mout_sclk_spll"}; 3706b5ae463SShaik Ameer Basha PNAME(mout_sw_pclk200_fsys_p) = {"dout_pclk200_fsys", "mout_sclk_spll"}; 3716b5ae463SShaik Ameer Basha PNAME(mout_user_pclk200_fsys_p) = {"fin_pll", "mout_sw_pclk200_fsys"}; 372dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk200_fsys_p) = {"fin_pll", "mout_sw_aclk200_fsys"}; 3731609027fSChander Kashyap 374dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_fsys2_p) = {"dout_aclk200_fsys2", "mout_sclk_spll"}; 375dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk200_fsys2_p) = {"fin_pll", "mout_sw_aclk200_fsys2"}; 3766575fa76SShaik Ameer Basha PNAME(mout_sw_aclk100_noc_p) = {"dout_aclk100_noc", "mout_sclk_spll"}; 3776575fa76SShaik Ameer Basha PNAME(mout_user_aclk100_noc_p) = {"fin_pll", "mout_sw_aclk100_noc"}; 3786575fa76SShaik Ameer Basha 3796575fa76SShaik Ameer Basha PNAME(mout_sw_aclk400_wcore_p) = {"dout_aclk400_wcore", "mout_sclk_spll"}; 3806575fa76SShaik Ameer Basha PNAME(mout_aclk400_wcore_bpll_p) = {"mout_aclk400_wcore", "sclk_bpll"}; 3816575fa76SShaik Ameer Basha PNAME(mout_user_aclk400_wcore_p) = {"fin_pll", "mout_sw_aclk400_wcore"}; 3826575fa76SShaik Ameer Basha 3833a767b35SShaik Ameer Basha PNAME(mout_sw_aclk400_isp_p) = {"dout_aclk400_isp", "mout_sclk_spll"}; 3843a767b35SShaik Ameer Basha PNAME(mout_user_aclk400_isp_p) = {"fin_pll", "mout_sw_aclk400_isp"}; 3853a767b35SShaik Ameer Basha 3863a767b35SShaik Ameer Basha PNAME(mout_sw_aclk333_432_isp0_p) = {"dout_aclk333_432_isp0", 3873a767b35SShaik Ameer Basha "mout_sclk_spll"}; 3883a767b35SShaik Ameer Basha PNAME(mout_user_aclk333_432_isp0_p) = {"fin_pll", "mout_sw_aclk333_432_isp0"}; 3893a767b35SShaik Ameer Basha 3903a767b35SShaik Ameer Basha PNAME(mout_sw_aclk333_432_isp_p) = {"dout_aclk333_432_isp", "mout_sclk_spll"}; 3913a767b35SShaik Ameer Basha PNAME(mout_user_aclk333_432_isp_p) = {"fin_pll", "mout_sw_aclk333_432_isp"}; 3921609027fSChander Kashyap 393dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_p) = {"dout_aclk200", "mout_sclk_spll"}; 394424b673aSShaik Ameer Basha PNAME(mout_user_aclk200_disp1_p) = {"fin_pll", "mout_sw_aclk200"}; 3951609027fSChander Kashyap 396dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk400_mscl_p) = {"dout_aclk400_mscl", "mout_sclk_spll"}; 397dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk400_mscl_p) = {"fin_pll", "mout_sw_aclk400_mscl"}; 3981609027fSChander Kashyap 399dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_p) = {"dout_aclk333", "mout_sclk_spll"}; 400dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_p) = {"fin_pll", "mout_sw_aclk333"}; 4011609027fSChander Kashyap 402dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk166_p) = {"dout_aclk166", "mout_sclk_spll"}; 403dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk166_p) = {"fin_pll", "mout_sw_aclk166"}; 4041609027fSChander Kashyap 405dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk266_p) = {"dout_aclk266", "mout_sclk_spll"}; 406dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk266_p) = {"fin_pll", "mout_sw_aclk266"}; 4073a767b35SShaik Ameer Basha PNAME(mout_user_aclk266_isp_p) = {"fin_pll", "mout_sw_aclk266"}; 4081609027fSChander Kashyap 409dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_432_gscl_p) = {"dout_aclk333_432_gscl", "mout_sclk_spll"}; 410dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_432_gscl_p) = {"fin_pll", "mout_sw_aclk333_432_gscl"}; 4111609027fSChander Kashyap 412dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_gscl_p) = {"dout_aclk300_gscl", "mout_sclk_spll"}; 413dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_gscl_p) = {"fin_pll", "mout_sw_aclk300_gscl"}; 4141609027fSChander Kashyap 415dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_disp1_p) = {"dout_aclk300_disp1", "mout_sclk_spll"}; 416424b673aSShaik Ameer Basha PNAME(mout_sw_aclk400_disp1_p) = {"dout_aclk400_disp1", "mout_sclk_spll"}; 417dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_disp1_p) = {"fin_pll", "mout_sw_aclk300_disp1"}; 418424b673aSShaik Ameer Basha PNAME(mout_user_aclk400_disp1_p) = {"fin_pll", "mout_sw_aclk400_disp1"}; 4191609027fSChander Kashyap 420dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_jpeg_p) = {"dout_aclk300_jpeg", "mout_sclk_spll"}; 421dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_jpeg_p) = {"fin_pll", "mout_sw_aclk300_jpeg"}; 4221609027fSChander Kashyap 423dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk_g3d_p) = {"dout_aclk_g3d", "mout_sclk_spll"}; 424dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk_g3d_p) = {"fin_pll", "mout_sw_aclk_g3d"}; 4251609027fSChander Kashyap 426dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk266_g2d_p) = {"dout_aclk266_g2d", "mout_sclk_spll"}; 427dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk266_g2d_p) = {"fin_pll", "mout_sw_aclk266_g2d"}; 4281609027fSChander Kashyap 429dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_g2d_p) = {"dout_aclk333_g2d", "mout_sclk_spll"}; 430dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_g2d_p) = {"fin_pll", "mout_sw_aclk333_g2d"}; 4311609027fSChander Kashyap 432dbd713bbSShaik Ameer Basha PNAME(mout_audio0_p) = {"fin_pll", "cdclk0", "mout_sclk_dpll", 433dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 434dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 435dbd713bbSShaik Ameer Basha PNAME(mout_audio1_p) = {"fin_pll", "cdclk1", "mout_sclk_dpll", 436dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 437dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 438dbd713bbSShaik Ameer Basha PNAME(mout_audio2_p) = {"fin_pll", "cdclk2", "mout_sclk_dpll", 439dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 440dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 441dbd713bbSShaik Ameer Basha PNAME(mout_spdif_p) = {"fin_pll", "dout_audio0", "dout_audio1", 442dbd713bbSShaik Ameer Basha "dout_audio2", "spdif_extclk", "mout_sclk_ipll", 443dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 444dbd713bbSShaik Ameer Basha PNAME(mout_hdmi_p) = {"dout_hdmi_pixel", "sclk_hdmiphy"}; 445dbd713bbSShaik Ameer Basha PNAME(mout_maudio0_p) = {"fin_pll", "maudio_clk", "mout_sclk_dpll", 446dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 447dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 44831116a64SShaik Ameer Basha PNAME(mout_mau_epll_clk_p) = {"mout_sclk_epll", "mout_sclk_dpll", 44931116a64SShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll"}; 4506520e968SAlim Akhtar /* List of parents specific to exynos5800 */ 4516520e968SAlim Akhtar PNAME(mout_epll2_5800_p) = { "mout_sclk_epll", "ff_dout_epll2" }; 4526520e968SAlim Akhtar PNAME(mout_group1_5800_p) = { "mout_sclk_cpll", "mout_sclk_dpll", 4536520e968SAlim Akhtar "mout_sclk_mpll", "ff_dout_spll2" }; 4546520e968SAlim Akhtar PNAME(mout_group2_5800_p) = { "mout_sclk_cpll", "mout_sclk_dpll", 4556520e968SAlim Akhtar "mout_sclk_mpll", "ff_dout_spll2", 4566520e968SAlim Akhtar "mout_epll2", "mout_sclk_ipll" }; 4576520e968SAlim Akhtar PNAME(mout_group3_5800_p) = { "mout_sclk_cpll", "mout_sclk_dpll", 4586520e968SAlim Akhtar "mout_sclk_mpll", "ff_dout_spll2", 4596520e968SAlim Akhtar "mout_epll2" }; 4606520e968SAlim Akhtar PNAME(mout_group5_5800_p) = { "mout_sclk_cpll", "mout_sclk_dpll", 4616520e968SAlim Akhtar "mout_sclk_mpll", "mout_sclk_spll" }; 4626520e968SAlim Akhtar PNAME(mout_group6_5800_p) = { "mout_sclk_ipll", "mout_sclk_dpll", 4636520e968SAlim Akhtar "mout_sclk_mpll", "ff_dout_spll2" }; 4646520e968SAlim Akhtar PNAME(mout_group7_5800_p) = { "mout_sclk_cpll", "mout_sclk_dpll", 4656520e968SAlim Akhtar "mout_sclk_mpll", "mout_sclk_spll", 4666520e968SAlim Akhtar "mout_epll2", "mout_sclk_ipll" }; 4676520e968SAlim Akhtar PNAME(mout_mau_epll_clk_5800_p) = { "mout_sclk_epll", "mout_sclk_dpll", 4686520e968SAlim Akhtar "mout_sclk_mpll", 4696520e968SAlim Akhtar "ff_dout_spll2" }; 4706520e968SAlim Akhtar PNAME(mout_group8_5800_p) = { "dout_aclk432_scaler", "dout_sclk_sw" }; 4716520e968SAlim Akhtar PNAME(mout_group9_5800_p) = { "dout_osc_div", "mout_sw_aclk432_scaler" }; 4726520e968SAlim Akhtar PNAME(mout_group10_5800_p) = { "dout_aclk432_cam", "dout_sclk_sw" }; 4736520e968SAlim Akhtar PNAME(mout_group11_5800_p) = { "dout_osc_div", "mout_sw_aclk432_cam" }; 4746520e968SAlim Akhtar PNAME(mout_group12_5800_p) = { "dout_aclkfl1_550_cam", "dout_sclk_sw" }; 4756520e968SAlim Akhtar PNAME(mout_group13_5800_p) = { "dout_osc_div", "mout_sw_aclkfl1_550_cam" }; 4766520e968SAlim Akhtar PNAME(mout_group14_5800_p) = { "dout_aclk550_cam", "dout_sclk_sw" }; 4776520e968SAlim Akhtar PNAME(mout_group15_5800_p) = { "dout_osc_div", "mout_sw_aclk550_cam" }; 4781609027fSChander Kashyap 4791609027fSChander Kashyap /* fixed rate clocks generated outside the soc */ 4806520e968SAlim Akhtar static struct samsung_fixed_rate_clock 4816520e968SAlim Akhtar exynos5x_fixed_rate_ext_clks[] __initdata = { 482cba9d2faSAndrzej Hajda FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0), 4831609027fSChander Kashyap }; 4841609027fSChander Kashyap 4851609027fSChander Kashyap /* fixed rate clocks generated inside the soc */ 4866520e968SAlim Akhtar static struct samsung_fixed_rate_clock exynos5x_fixed_rate_clks[] __initdata = { 487cba9d2faSAndrzej Hajda FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), 488cba9d2faSAndrzej Hajda FRATE(0, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000), 489cba9d2faSAndrzej Hajda FRATE(0, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000), 490cba9d2faSAndrzej Hajda FRATE(0, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000), 491cba9d2faSAndrzej Hajda FRATE(0, "sclk_usbh20_scan_clk", NULL, CLK_IS_ROOT, 480000000), 4921609027fSChander Kashyap }; 4931609027fSChander Kashyap 4946520e968SAlim Akhtar static struct samsung_fixed_factor_clock 4956520e968SAlim Akhtar exynos5x_fixed_factor_clks[] __initdata = { 496b31ca2a0SShaik Ameer Basha FFACTOR(0, "ff_hsic_12m", "fin_pll", 1, 2, 0), 497b31ca2a0SShaik Ameer Basha FFACTOR(0, "ff_sw_aclk66", "mout_sw_aclk66", 1, 2, 0), 4981609027fSChander Kashyap }; 4991609027fSChander Kashyap 5006520e968SAlim Akhtar static struct samsung_fixed_factor_clock 5016520e968SAlim Akhtar exynos5800_fixed_factor_clks[] __initdata = { 5026520e968SAlim Akhtar FFACTOR(0, "ff_dout_epll2", "mout_sclk_epll", 1, 2, 0), 5036520e968SAlim Akhtar FFACTOR(0, "ff_dout_spll2", "mout_sclk_spll", 1, 2, 0), 5046520e968SAlim Akhtar }; 5056520e968SAlim Akhtar 5066b8f9eabSKrzysztof Kozlowski static struct samsung_mux_clock exynos5800_mux_clks[] __initdata = { 5076520e968SAlim Akhtar MUX(0, "mout_aclk400_isp", mout_group3_5800_p, SRC_TOP0, 0, 3), 5086520e968SAlim Akhtar MUX(0, "mout_aclk400_mscl", mout_group3_5800_p, SRC_TOP0, 4, 3), 5096520e968SAlim Akhtar MUX(0, "mout_aclk400_wcore", mout_group2_5800_p, SRC_TOP0, 16, 3), 5106520e968SAlim Akhtar MUX(0, "mout_aclk100_noc", mout_group1_5800_p, SRC_TOP0, 20, 2), 5116520e968SAlim Akhtar 5126520e968SAlim Akhtar MUX(0, "mout_aclk333_432_gscl", mout_group6_5800_p, SRC_TOP1, 0, 2), 5136520e968SAlim Akhtar MUX(0, "mout_aclk333_432_isp", mout_group6_5800_p, SRC_TOP1, 4, 2), 5146520e968SAlim Akhtar MUX(0, "mout_aclk333_432_isp0", mout_group6_5800_p, SRC_TOP1, 12, 2), 5156520e968SAlim Akhtar MUX(0, "mout_aclk266", mout_group5_5800_p, SRC_TOP1, 20, 2), 5166520e968SAlim Akhtar MUX(0, "mout_aclk333", mout_group1_5800_p, SRC_TOP1, 28, 2), 5176520e968SAlim Akhtar 5186520e968SAlim Akhtar MUX(0, "mout_aclk400_disp1", mout_group7_5800_p, SRC_TOP2, 4, 3), 5196520e968SAlim Akhtar MUX(0, "mout_aclk333_g2d", mout_group5_5800_p, SRC_TOP2, 8, 2), 5206520e968SAlim Akhtar MUX(0, "mout_aclk266_g2d", mout_group5_5800_p, SRC_TOP2, 12, 2), 5216520e968SAlim Akhtar MUX(0, "mout_aclk300_jpeg", mout_group5_5800_p, SRC_TOP2, 20, 2), 5226520e968SAlim Akhtar MUX(0, "mout_aclk300_disp1", mout_group5_5800_p, SRC_TOP2, 24, 2), 5236520e968SAlim Akhtar MUX(0, "mout_aclk300_gscl", mout_group5_5800_p, SRC_TOP2, 28, 2), 5246520e968SAlim Akhtar 5256520e968SAlim Akhtar MUX(0, "mout_mau_epll_clk", mout_mau_epll_clk_5800_p, SRC_TOP7, 5266520e968SAlim Akhtar 20, 2), 5276520e968SAlim Akhtar MUX(0, "sclk_bpll", mout_bpll_p, SRC_TOP7, 24, 1), 5286520e968SAlim Akhtar MUX(0, "mout_epll2", mout_epll2_5800_p, SRC_TOP7, 28, 1), 5296520e968SAlim Akhtar 5306520e968SAlim Akhtar MUX(0, "mout_aclk550_cam", mout_group3_5800_p, SRC_TOP8, 16, 3), 5316520e968SAlim Akhtar MUX(0, "mout_aclkfl1_550_cam", mout_group3_5800_p, SRC_TOP8, 20, 3), 5326520e968SAlim Akhtar MUX(0, "mout_aclk432_cam", mout_group6_5800_p, SRC_TOP8, 24, 2), 5336520e968SAlim Akhtar MUX(0, "mout_aclk432_scaler", mout_group6_5800_p, SRC_TOP8, 28, 2), 5346520e968SAlim Akhtar 5356520e968SAlim Akhtar MUX(0, "mout_user_aclk550_cam", mout_group15_5800_p, 5366520e968SAlim Akhtar SRC_TOP9, 16, 1), 5376520e968SAlim Akhtar MUX(0, "mout_user_aclkfl1_550_cam", mout_group13_5800_p, 5386520e968SAlim Akhtar SRC_TOP9, 20, 1), 5396520e968SAlim Akhtar MUX(0, "mout_user_aclk432_cam", mout_group11_5800_p, 5406520e968SAlim Akhtar SRC_TOP9, 24, 1), 5416520e968SAlim Akhtar MUX(0, "mout_user_aclk432_scaler", mout_group9_5800_p, 5426520e968SAlim Akhtar SRC_TOP9, 28, 1), 5436520e968SAlim Akhtar 5446520e968SAlim Akhtar MUX(0, "mout_sw_aclk550_cam", mout_group14_5800_p, SRC_TOP13, 16, 1), 5456520e968SAlim Akhtar MUX(0, "mout_sw_aclkfl1_550_cam", mout_group12_5800_p, 5466520e968SAlim Akhtar SRC_TOP13, 20, 1), 5476520e968SAlim Akhtar MUX(0, "mout_sw_aclk432_cam", mout_group10_5800_p, 5486520e968SAlim Akhtar SRC_TOP13, 24, 1), 5496520e968SAlim Akhtar MUX(0, "mout_sw_aclk432_scaler", mout_group8_5800_p, 5506520e968SAlim Akhtar SRC_TOP13, 28, 1), 5516520e968SAlim Akhtar 5526520e968SAlim Akhtar MUX(0, "mout_fimd1", mout_group2_p, SRC_DISP10, 4, 3), 5536520e968SAlim Akhtar }; 5546520e968SAlim Akhtar 5556b8f9eabSKrzysztof Kozlowski static struct samsung_div_clock exynos5800_div_clks[] __initdata = { 5566520e968SAlim Akhtar DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore", DIV_TOP0, 16, 3), 5576520e968SAlim Akhtar 5586520e968SAlim Akhtar DIV(0, "dout_aclk550_cam", "mout_aclk550_cam", 5596520e968SAlim Akhtar DIV_TOP8, 16, 3), 5606520e968SAlim Akhtar DIV(0, "dout_aclkfl1_550_cam", "mout_aclkfl1_550_cam", 5616520e968SAlim Akhtar DIV_TOP8, 20, 3), 5626520e968SAlim Akhtar DIV(0, "dout_aclk432_cam", "mout_aclk432_cam", 5636520e968SAlim Akhtar DIV_TOP8, 24, 3), 5646520e968SAlim Akhtar DIV(0, "dout_aclk432_scaler", "mout_aclk432_scaler", 5656520e968SAlim Akhtar DIV_TOP8, 28, 3), 5666520e968SAlim Akhtar 5676520e968SAlim Akhtar DIV(0, "dout_osc_div", "fin_pll", DIV_TOP9, 20, 3), 5686520e968SAlim Akhtar DIV(0, "dout_sclk_sw", "sclk_spll", DIV_TOP9, 24, 6), 5696520e968SAlim Akhtar }; 5706520e968SAlim Akhtar 5716b8f9eabSKrzysztof Kozlowski static struct samsung_gate_clock exynos5800_gate_clks[] __initdata = { 5726520e968SAlim Akhtar GATE(CLK_ACLK550_CAM, "aclk550_cam", "mout_user_aclk550_cam", 5736520e968SAlim Akhtar GATE_BUS_TOP, 24, 0, 0), 5746520e968SAlim Akhtar GATE(CLK_ACLK432_SCALER, "aclk432_scaler", "mout_user_aclk432_scaler", 5756520e968SAlim Akhtar GATE_BUS_TOP, 27, 0, 0), 5766520e968SAlim Akhtar }; 5776520e968SAlim Akhtar 5786b8f9eabSKrzysztof Kozlowski static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = { 5796520e968SAlim Akhtar MUX(0, "sclk_bpll", mout_bpll_p, TOP_SPARE2, 0, 1), 5806520e968SAlim Akhtar MUX(0, "mout_aclk400_wcore_bpll", mout_aclk400_wcore_bpll_p, 5816520e968SAlim Akhtar TOP_SPARE2, 4, 1), 5826520e968SAlim Akhtar 5836520e968SAlim Akhtar MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2), 5846520e968SAlim Akhtar MUX_A(0, "mout_aclk400_mscl", mout_group1_p, 5856520e968SAlim Akhtar SRC_TOP0, 4, 2, "aclk400_mscl"), 5866520e968SAlim Akhtar MUX(0, "mout_aclk400_wcore", mout_group1_p, SRC_TOP0, 16, 2), 5876520e968SAlim Akhtar MUX(0, "mout_aclk100_noc", mout_group1_p, SRC_TOP0, 20, 2), 5886520e968SAlim Akhtar 5896520e968SAlim Akhtar MUX(0, "mout_aclk333_432_gscl", mout_group4_p, SRC_TOP1, 0, 2), 5906520e968SAlim Akhtar MUX(0, "mout_aclk333_432_isp", mout_group4_p, 5916520e968SAlim Akhtar SRC_TOP1, 4, 2), 5926520e968SAlim Akhtar MUX(0, "mout_aclk333_432_isp0", mout_group4_p, SRC_TOP1, 12, 2), 5936520e968SAlim Akhtar MUX(0, "mout_aclk266", mout_group1_p, SRC_TOP1, 20, 2), 5946520e968SAlim Akhtar MUX(0, "mout_aclk333", mout_group1_p, SRC_TOP1, 28, 2), 5956520e968SAlim Akhtar 5966520e968SAlim Akhtar MUX(0, "mout_aclk400_disp1", mout_group1_p, SRC_TOP2, 4, 2), 5976520e968SAlim Akhtar MUX(0, "mout_aclk333_g2d", mout_group1_p, SRC_TOP2, 8, 2), 5986520e968SAlim Akhtar MUX(0, "mout_aclk266_g2d", mout_group1_p, SRC_TOP2, 12, 2), 5996520e968SAlim Akhtar MUX(0, "mout_aclk300_jpeg", mout_group1_p, SRC_TOP2, 20, 2), 6006520e968SAlim Akhtar MUX(0, "mout_aclk300_disp1", mout_group1_p, SRC_TOP2, 24, 2), 6016520e968SAlim Akhtar MUX(0, "mout_aclk300_gscl", mout_group1_p, SRC_TOP2, 28, 2), 6026520e968SAlim Akhtar 6036520e968SAlim Akhtar MUX(0, "mout_mau_epll_clk", mout_mau_epll_clk_p, SRC_TOP7, 20, 2), 6046520e968SAlim Akhtar 6056520e968SAlim Akhtar MUX(0, "mout_fimd1", mout_group3_p, SRC_DISP10, 4, 1), 6066520e968SAlim Akhtar }; 6076520e968SAlim Akhtar 6086b8f9eabSKrzysztof Kozlowski static struct samsung_div_clock exynos5420_div_clks[] __initdata = { 6096520e968SAlim Akhtar DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore_bpll", 6106520e968SAlim Akhtar DIV_TOP0, 16, 3), 6116520e968SAlim Akhtar }; 6126520e968SAlim Akhtar 6136520e968SAlim Akhtar static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = { 614b31ca2a0SShaik Ameer Basha MUX(0, "mout_user_pclk66_gpio", mout_user_pclk66_gpio_p, 615b31ca2a0SShaik Ameer Basha SRC_TOP7, 4, 1), 616dbd713bbSShaik Ameer Basha MUX(0, "mout_mspll_kfc", mout_mspll_cpu_p, SRC_TOP7, 8, 2), 617dbd713bbSShaik Ameer Basha MUX(0, "mout_mspll_cpu", mout_mspll_cpu_p, SRC_TOP7, 12, 2), 61831116a64SShaik Ameer Basha 619dbd713bbSShaik Ameer Basha MUX(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1), 620dbd713bbSShaik Ameer Basha MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), 621dbd713bbSShaik Ameer Basha MUX(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1), 622dbd713bbSShaik Ameer Basha MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1), 6231609027fSChander Kashyap 624dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2), 625dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200_fsys2", mout_group1_p, SRC_TOP0, 12, 2), 6266b5ae463SShaik Ameer Basha MUX(0, "mout_pclk200_fsys", mout_group1_p, SRC_TOP0, 24, 2), 627dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200_fsys", mout_group1_p, SRC_TOP0, 28, 2), 6281609027fSChander Kashyap 629dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk66", mout_group1_p, SRC_TOP1, 8, 2), 630dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk166", mout_group1_p, SRC_TOP1, 24, 2), 6311609027fSChander Kashyap 632dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk_g3d", mout_group5_p, SRC_TOP2, 16, 1), 6331609027fSChander Kashyap 6343a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk400_isp", mout_user_aclk400_isp_p, 6353a767b35SShaik Ameer Basha SRC_TOP3, 0, 1), 636dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk400_mscl", mout_user_aclk400_mscl_p, 6371609027fSChander Kashyap SRC_TOP3, 4, 1), 63888560100SJavier Martinez Canillas MUX(CLK_MOUT_USER_ACLK200_DISP1, "mout_user_aclk200_disp1", 63988560100SJavier Martinez Canillas mout_user_aclk200_disp1_p, SRC_TOP3, 8, 1), 640dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk200_fsys2", mout_user_aclk200_fsys2_p, 6411609027fSChander Kashyap SRC_TOP3, 12, 1), 6426575fa76SShaik Ameer Basha MUX(0, "mout_user_aclk400_wcore", mout_user_aclk400_wcore_p, 6436575fa76SShaik Ameer Basha SRC_TOP3, 16, 1), 6446575fa76SShaik Ameer Basha MUX(0, "mout_user_aclk100_noc", mout_user_aclk100_noc_p, 6456575fa76SShaik Ameer Basha SRC_TOP3, 20, 1), 6466b5ae463SShaik Ameer Basha MUX(0, "mout_user_pclk200_fsys", mout_user_pclk200_fsys_p, 6476b5ae463SShaik Ameer Basha SRC_TOP3, 24, 1), 648dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk200_fsys", mout_user_aclk200_fsys_p, 6491609027fSChander Kashyap SRC_TOP3, 28, 1), 6501609027fSChander Kashyap 651dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk333_432_gscl", mout_user_aclk333_432_gscl_p, 6521609027fSChander Kashyap SRC_TOP4, 0, 1), 6533a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk333_432_isp", mout_user_aclk333_432_isp_p, 6543a767b35SShaik Ameer Basha SRC_TOP4, 4, 1), 655faec151bSShaik Ameer Basha MUX(0, "mout_user_aclk66_peric", mout_user_aclk66_peric_p, 656faec151bSShaik Ameer Basha SRC_TOP4, 8, 1), 6573a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk333_432_isp0", mout_user_aclk333_432_isp0_p, 6583a767b35SShaik Ameer Basha SRC_TOP4, 12, 1), 6593a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk266_isp", mout_user_aclk266_isp_p, 6603a767b35SShaik Ameer Basha SRC_TOP4, 16, 1), 661dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk266", mout_user_aclk266_p, SRC_TOP4, 20, 1), 662dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk166", mout_user_aclk166_p, SRC_TOP4, 24, 1), 663c0fb262bSArun Kumar K MUX(CLK_MOUT_USER_ACLK333, "mout_user_aclk333", mout_user_aclk333_p, 664c0fb262bSArun Kumar K SRC_TOP4, 28, 1), 6651609027fSChander Kashyap 66688560100SJavier Martinez Canillas MUX(CLK_MOUT_USER_ACLK400_DISP1, "mout_user_aclk400_disp1", 66788560100SJavier Martinez Canillas mout_user_aclk400_disp1_p, SRC_TOP5, 0, 1), 668faec151bSShaik Ameer Basha MUX(0, "mout_user_aclk66_psgen", mout_user_aclk66_peric_p, 669faec151bSShaik Ameer Basha SRC_TOP5, 4, 1), 6703fac5941SShaik Ameer Basha MUX(0, "mout_user_aclk333_g2d", mout_user_aclk333_g2d_p, 6713fac5941SShaik Ameer Basha SRC_TOP5, 8, 1), 6723fac5941SShaik Ameer Basha MUX(0, "mout_user_aclk266_g2d", mout_user_aclk266_g2d_p, 6733fac5941SShaik Ameer Basha SRC_TOP5, 12, 1), 6743fac5941SShaik Ameer Basha MUX(CLK_MOUT_G3D, "mout_user_aclk_g3d", mout_user_aclk_g3d_p, 6753fac5941SShaik Ameer Basha SRC_TOP5, 16, 1), 676dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_jpeg", mout_user_aclk300_jpeg_p, 6771609027fSChander Kashyap SRC_TOP5, 20, 1), 67888560100SJavier Martinez Canillas MUX(CLK_MOUT_USER_ACLK300_DISP1, "mout_user_aclk300_disp1", 67988560100SJavier Martinez Canillas mout_user_aclk300_disp1_p, SRC_TOP5, 24, 1), 680c0feb268SMarek Szyprowski MUX(CLK_MOUT_USER_ACLK300_GSCL, "mout_user_aclk300_gscl", 681c0feb268SMarek Szyprowski mout_user_aclk300_gscl_p, SRC_TOP5, 28, 1), 6821609027fSChander Kashyap 683dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_mpll", mout_mpll_p, SRC_TOP6, 0, 1), 684dbd713bbSShaik Ameer Basha MUX(CLK_MOUT_VPLL, "mout_sclk_vpll", mout_vpll_p, SRC_TOP6, 4, 1), 685dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_spll", mout_spll_p, SRC_TOP6, 8, 1), 686dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_ipll", mout_ipll_p, SRC_TOP6, 12, 1), 687dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_rpll", mout_rpll_p, SRC_TOP6, 16, 1), 688dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_epll", mout_epll_p, SRC_TOP6, 20, 1), 689dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_dpll", mout_dpll_p, SRC_TOP6, 24, 1), 690dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_cpll", mout_cpll_p, SRC_TOP6, 28, 1), 6911609027fSChander Kashyap 6923a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk400_isp", mout_sw_aclk400_isp_p, 6933a767b35SShaik Ameer Basha SRC_TOP10, 0, 1), 694dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk400_mscl", mout_sw_aclk400_mscl_p, 695dbd713bbSShaik Ameer Basha SRC_TOP10, 4, 1), 69688560100SJavier Martinez Canillas MUX(CLK_MOUT_SW_ACLK200, "mout_sw_aclk200", mout_sw_aclk200_p, 69788560100SJavier Martinez Canillas SRC_TOP10, 8, 1), 698dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200_fsys2", mout_sw_aclk200_fsys2_p, 6991609027fSChander Kashyap SRC_TOP10, 12, 1), 7006575fa76SShaik Ameer Basha MUX(0, "mout_sw_aclk400_wcore", mout_sw_aclk400_wcore_p, 7016575fa76SShaik Ameer Basha SRC_TOP10, 16, 1), 7026575fa76SShaik Ameer Basha MUX(0, "mout_sw_aclk100_noc", mout_sw_aclk100_noc_p, 7036575fa76SShaik Ameer Basha SRC_TOP10, 20, 1), 7046b5ae463SShaik Ameer Basha MUX(0, "mout_sw_pclk200_fsys", mout_sw_pclk200_fsys_p, 7056b5ae463SShaik Ameer Basha SRC_TOP10, 24, 1), 706dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200_fsys", mout_sw_aclk200_fsys_p, 707dbd713bbSShaik Ameer Basha SRC_TOP10, 28, 1), 7083a767b35SShaik Ameer Basha 709dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_gscl", mout_sw_aclk333_432_gscl_p, 7101609027fSChander Kashyap SRC_TOP11, 0, 1), 7113a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_isp", mout_sw_aclk333_432_isp_p, 7123a767b35SShaik Ameer Basha SRC_TOP11, 4, 1), 713dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk66", mout_sw_aclk66_p, SRC_TOP11, 8, 1), 7143a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_isp0", mout_sw_aclk333_432_isp0_p, 7153a767b35SShaik Ameer Basha SRC_TOP11, 12, 1), 716dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk266", mout_sw_aclk266_p, SRC_TOP11, 20, 1), 717dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk166", mout_sw_aclk166_p, SRC_TOP11, 24, 1), 718c0fb262bSArun Kumar K MUX(CLK_MOUT_SW_ACLK333, "mout_sw_aclk333", mout_sw_aclk333_p, 719c0fb262bSArun Kumar K SRC_TOP11, 28, 1), 7201609027fSChander Kashyap 72188560100SJavier Martinez Canillas MUX(CLK_MOUT_SW_ACLK400, "mout_sw_aclk400_disp1", 72288560100SJavier Martinez Canillas mout_sw_aclk400_disp1_p, SRC_TOP12, 4, 1), 723dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333_g2d", mout_sw_aclk333_g2d_p, 724dbd713bbSShaik Ameer Basha SRC_TOP12, 8, 1), 725dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk266_g2d", mout_sw_aclk266_g2d_p, 726dbd713bbSShaik Ameer Basha SRC_TOP12, 12, 1), 727dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk_g3d", mout_sw_aclk_g3d_p, SRC_TOP12, 16, 1), 728dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_jpeg", mout_sw_aclk300_jpeg_p, 729dbd713bbSShaik Ameer Basha SRC_TOP12, 20, 1), 73088560100SJavier Martinez Canillas MUX(CLK_MOUT_SW_ACLK300, "mout_sw_aclk300_disp1", 73188560100SJavier Martinez Canillas mout_sw_aclk300_disp1_p, SRC_TOP12, 24, 1), 732c0feb268SMarek Szyprowski MUX(CLK_MOUT_SW_ACLK300_GSCL, "mout_sw_aclk300_gscl", 733c0feb268SMarek Szyprowski mout_sw_aclk300_gscl_p, SRC_TOP12, 28, 1), 7341609027fSChander Kashyap 7351609027fSChander Kashyap /* DISP1 Block */ 736dbd713bbSShaik Ameer Basha MUX(0, "mout_mipi1", mout_group2_p, SRC_DISP10, 16, 3), 737dbd713bbSShaik Ameer Basha MUX(0, "mout_dp1", mout_group2_p, SRC_DISP10, 20, 3), 738dbd713bbSShaik Ameer Basha MUX(0, "mout_pixel", mout_group2_p, SRC_DISP10, 24, 3), 739dbd713bbSShaik Ameer Basha MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_DISP10, 28, 1), 740424b673aSShaik Ameer Basha MUX(0, "mout_fimd1_opt", mout_group2_p, SRC_DISP10, 8, 3), 7416575fa76SShaik Ameer Basha 742424b673aSShaik Ameer Basha MUX(0, "mout_fimd1_final", mout_fimd1_final_p, TOP_SPARE2, 8, 1), 7431609027fSChander Kashyap 7441609027fSChander Kashyap /* MAU Block */ 74531116a64SShaik Ameer Basha MUX(CLK_MOUT_MAUDIO0, "mout_maudio0", mout_maudio0_p, SRC_MAU, 28, 3), 7461609027fSChander Kashyap 7471609027fSChander Kashyap /* FSYS Block */ 748dbd713bbSShaik Ameer Basha MUX(0, "mout_usbd301", mout_group2_p, SRC_FSYS, 4, 3), 749dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc0", mout_group2_p, SRC_FSYS, 8, 3), 750dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc1", mout_group2_p, SRC_FSYS, 12, 3), 751dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc2", mout_group2_p, SRC_FSYS, 16, 3), 752dbd713bbSShaik Ameer Basha MUX(0, "mout_usbd300", mout_group2_p, SRC_FSYS, 20, 3), 753dbd713bbSShaik Ameer Basha MUX(0, "mout_unipro", mout_group2_p, SRC_FSYS, 24, 3), 7546b5ae463SShaik Ameer Basha MUX(0, "mout_mphy_refclk", mout_group2_p, SRC_FSYS, 28, 3), 7551609027fSChander Kashyap 7561609027fSChander Kashyap /* PERIC Block */ 757dbd713bbSShaik Ameer Basha MUX(0, "mout_uart0", mout_group2_p, SRC_PERIC0, 4, 3), 758dbd713bbSShaik Ameer Basha MUX(0, "mout_uart1", mout_group2_p, SRC_PERIC0, 8, 3), 759dbd713bbSShaik Ameer Basha MUX(0, "mout_uart2", mout_group2_p, SRC_PERIC0, 12, 3), 760dbd713bbSShaik Ameer Basha MUX(0, "mout_uart3", mout_group2_p, SRC_PERIC0, 16, 3), 761dbd713bbSShaik Ameer Basha MUX(0, "mout_pwm", mout_group2_p, SRC_PERIC0, 24, 3), 762dbd713bbSShaik Ameer Basha MUX(0, "mout_spdif", mout_spdif_p, SRC_PERIC0, 28, 3), 763dbd713bbSShaik Ameer Basha MUX(0, "mout_audio0", mout_audio0_p, SRC_PERIC1, 8, 3), 764dbd713bbSShaik Ameer Basha MUX(0, "mout_audio1", mout_audio1_p, SRC_PERIC1, 12, 3), 765dbd713bbSShaik Ameer Basha MUX(0, "mout_audio2", mout_audio2_p, SRC_PERIC1, 16, 3), 766dbd713bbSShaik Ameer Basha MUX(0, "mout_spi0", mout_group2_p, SRC_PERIC1, 20, 3), 767dbd713bbSShaik Ameer Basha MUX(0, "mout_spi1", mout_group2_p, SRC_PERIC1, 24, 3), 768dbd713bbSShaik Ameer Basha MUX(0, "mout_spi2", mout_group2_p, SRC_PERIC1, 28, 3), 7693a767b35SShaik Ameer Basha 7703a767b35SShaik Ameer Basha /* ISP Block */ 7713a767b35SShaik Ameer Basha MUX(0, "mout_pwm_isp", mout_group2_p, SRC_ISP, 24, 3), 7723a767b35SShaik Ameer Basha MUX(0, "mout_uart_isp", mout_group2_p, SRC_ISP, 20, 3), 7733a767b35SShaik Ameer Basha MUX(0, "mout_spi0_isp", mout_group2_p, SRC_ISP, 12, 3), 7743a767b35SShaik Ameer Basha MUX(0, "mout_spi1_isp", mout_group2_p, SRC_ISP, 16, 3), 7753a767b35SShaik Ameer Basha MUX(0, "mout_isp_sensor", mout_group2_p, SRC_ISP, 28, 3), 7761609027fSChander Kashyap }; 7771609027fSChander Kashyap 7786520e968SAlim Akhtar static struct samsung_div_clock exynos5x_div_clks[] __initdata = { 779cba9d2faSAndrzej Hajda DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3), 780cba9d2faSAndrzej Hajda DIV(0, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3), 781cba9d2faSAndrzej Hajda DIV(0, "armclk2", "div_arm", DIV_CPU0, 28, 3), 782dbd713bbSShaik Ameer Basha DIV(0, "div_kfc", "mout_kfc", DIV_KFC0, 0, 3), 783cba9d2faSAndrzej Hajda DIV(0, "sclk_kpll", "mout_kpll", DIV_KFC0, 24, 3), 7841609027fSChander Kashyap 7853a767b35SShaik Ameer Basha DIV(0, "dout_aclk400_isp", "mout_aclk400_isp", DIV_TOP0, 0, 3), 786cba9d2faSAndrzej Hajda DIV(0, "dout_aclk400_mscl", "mout_aclk400_mscl", DIV_TOP0, 4, 3), 787cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200", "mout_aclk200", DIV_TOP0, 8, 3), 788cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200_fsys2", "mout_aclk200_fsys2", DIV_TOP0, 12, 3), 7896575fa76SShaik Ameer Basha DIV(0, "dout_aclk100_noc", "mout_aclk100_noc", DIV_TOP0, 20, 3), 790cba9d2faSAndrzej Hajda DIV(0, "dout_pclk200_fsys", "mout_pclk200_fsys", DIV_TOP0, 24, 3), 791cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200_fsys", "mout_aclk200_fsys", DIV_TOP0, 28, 3), 7921609027fSChander Kashyap 793cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333_432_gscl", "mout_aclk333_432_gscl", 7941609027fSChander Kashyap DIV_TOP1, 0, 3), 7953a767b35SShaik Ameer Basha DIV(0, "dout_aclk333_432_isp", "mout_aclk333_432_isp", 7963a767b35SShaik Ameer Basha DIV_TOP1, 4, 3), 797cba9d2faSAndrzej Hajda DIV(0, "dout_aclk66", "mout_aclk66", DIV_TOP1, 8, 6), 7983a767b35SShaik Ameer Basha DIV(0, "dout_aclk333_432_isp0", "mout_aclk333_432_isp0", 7993a767b35SShaik Ameer Basha DIV_TOP1, 16, 3), 800cba9d2faSAndrzej Hajda DIV(0, "dout_aclk266", "mout_aclk266", DIV_TOP1, 20, 3), 801cba9d2faSAndrzej Hajda DIV(0, "dout_aclk166", "mout_aclk166", DIV_TOP1, 24, 3), 802cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333", "mout_aclk333", DIV_TOP1, 28, 3), 8031609027fSChander Kashyap 804cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333_g2d", "mout_aclk333_g2d", DIV_TOP2, 8, 3), 805cba9d2faSAndrzej Hajda DIV(0, "dout_aclk266_g2d", "mout_aclk266_g2d", DIV_TOP2, 12, 3), 806cba9d2faSAndrzej Hajda DIV(0, "dout_aclk_g3d", "mout_aclk_g3d", DIV_TOP2, 16, 3), 807cba9d2faSAndrzej Hajda DIV(0, "dout_aclk300_jpeg", "mout_aclk300_jpeg", DIV_TOP2, 20, 3), 808424b673aSShaik Ameer Basha DIV(0, "dout_aclk300_disp1", "mout_aclk300_disp1", DIV_TOP2, 24, 3), 809cba9d2faSAndrzej Hajda DIV(0, "dout_aclk300_gscl", "mout_aclk300_gscl", DIV_TOP2, 28, 3), 8101609027fSChander Kashyap 8111609027fSChander Kashyap /* DISP1 Block */ 812424b673aSShaik Ameer Basha DIV(0, "dout_fimd1", "mout_fimd1_final", DIV_DISP10, 0, 4), 813cba9d2faSAndrzej Hajda DIV(0, "dout_mipi1", "mout_mipi1", DIV_DISP10, 16, 8), 814cba9d2faSAndrzej Hajda DIV(0, "dout_dp1", "mout_dp1", DIV_DISP10, 24, 4), 815cba9d2faSAndrzej Hajda DIV(CLK_DOUT_PIXEL, "dout_hdmi_pixel", "mout_pixel", DIV_DISP10, 28, 4), 816424b673aSShaik Ameer Basha DIV(0, "dout_disp1_blk", "aclk200_disp1", DIV2_RATIO0, 16, 2), 817424b673aSShaik Ameer Basha DIV(0, "dout_aclk400_disp1", "mout_aclk400_disp1", DIV_TOP2, 4, 3), 8181609027fSChander Kashyap 8191609027fSChander Kashyap /* Audio Block */ 820cba9d2faSAndrzej Hajda DIV(0, "dout_maudio0", "mout_maudio0", DIV_MAU, 20, 4), 821cba9d2faSAndrzej Hajda DIV(0, "dout_maupcm0", "dout_maudio0", DIV_MAU, 24, 8), 8221609027fSChander Kashyap 8231609027fSChander Kashyap /* USB3.0 */ 824cba9d2faSAndrzej Hajda DIV(0, "dout_usbphy301", "mout_usbd301", DIV_FSYS0, 12, 4), 825cba9d2faSAndrzej Hajda DIV(0, "dout_usbphy300", "mout_usbd300", DIV_FSYS0, 16, 4), 826cba9d2faSAndrzej Hajda DIV(0, "dout_usbd301", "mout_usbd301", DIV_FSYS0, 20, 4), 827cba9d2faSAndrzej Hajda DIV(0, "dout_usbd300", "mout_usbd300", DIV_FSYS0, 24, 4), 8281609027fSChander Kashyap 8291609027fSChander Kashyap /* MMC */ 830cba9d2faSAndrzej Hajda DIV(0, "dout_mmc0", "mout_mmc0", DIV_FSYS1, 0, 10), 831cba9d2faSAndrzej Hajda DIV(0, "dout_mmc1", "mout_mmc1", DIV_FSYS1, 10, 10), 832cba9d2faSAndrzej Hajda DIV(0, "dout_mmc2", "mout_mmc2", DIV_FSYS1, 20, 10), 8331609027fSChander Kashyap 834cba9d2faSAndrzej Hajda DIV(0, "dout_unipro", "mout_unipro", DIV_FSYS2, 24, 8), 8356b5ae463SShaik Ameer Basha DIV(0, "dout_mphy_refclk", "mout_mphy_refclk", DIV_FSYS2, 16, 8), 8361609027fSChander Kashyap 8371609027fSChander Kashyap /* UART and PWM */ 838cba9d2faSAndrzej Hajda DIV(0, "dout_uart0", "mout_uart0", DIV_PERIC0, 8, 4), 839cba9d2faSAndrzej Hajda DIV(0, "dout_uart1", "mout_uart1", DIV_PERIC0, 12, 4), 840cba9d2faSAndrzej Hajda DIV(0, "dout_uart2", "mout_uart2", DIV_PERIC0, 16, 4), 841cba9d2faSAndrzej Hajda DIV(0, "dout_uart3", "mout_uart3", DIV_PERIC0, 20, 4), 842cba9d2faSAndrzej Hajda DIV(0, "dout_pwm", "mout_pwm", DIV_PERIC0, 28, 4), 8431609027fSChander Kashyap 8441609027fSChander Kashyap /* SPI */ 845cba9d2faSAndrzej Hajda DIV(0, "dout_spi0", "mout_spi0", DIV_PERIC1, 20, 4), 846cba9d2faSAndrzej Hajda DIV(0, "dout_spi1", "mout_spi1", DIV_PERIC1, 24, 4), 847cba9d2faSAndrzej Hajda DIV(0, "dout_spi2", "mout_spi2", DIV_PERIC1, 28, 4), 8481609027fSChander Kashyap 8491d87db4dSShaik Ameer Basha /* Mfc Block */ 8501d87db4dSShaik Ameer Basha DIV(0, "dout_mfc_blk", "mout_user_aclk333", DIV4_RATIO, 0, 2), 8511d87db4dSShaik Ameer Basha 8521609027fSChander Kashyap /* PCM */ 853cba9d2faSAndrzej Hajda DIV(0, "dout_pcm1", "dout_audio1", DIV_PERIC2, 16, 8), 854cba9d2faSAndrzej Hajda DIV(0, "dout_pcm2", "dout_audio2", DIV_PERIC2, 24, 8), 8551609027fSChander Kashyap 8561609027fSChander Kashyap /* Audio - I2S */ 857cba9d2faSAndrzej Hajda DIV(0, "dout_i2s1", "dout_audio1", DIV_PERIC3, 6, 6), 858cba9d2faSAndrzej Hajda DIV(0, "dout_i2s2", "dout_audio2", DIV_PERIC3, 12, 6), 859cba9d2faSAndrzej Hajda DIV(0, "dout_audio0", "mout_audio0", DIV_PERIC3, 20, 4), 860cba9d2faSAndrzej Hajda DIV(0, "dout_audio1", "mout_audio1", DIV_PERIC3, 24, 4), 861cba9d2faSAndrzej Hajda DIV(0, "dout_audio2", "mout_audio2", DIV_PERIC3, 28, 4), 8621609027fSChander Kashyap 8631609027fSChander Kashyap /* SPI Pre-Ratio */ 864faec151bSShaik Ameer Basha DIV(0, "dout_spi0_pre", "dout_spi0", DIV_PERIC4, 8, 8), 865faec151bSShaik Ameer Basha DIV(0, "dout_spi1_pre", "dout_spi1", DIV_PERIC4, 16, 8), 866faec151bSShaik Ameer Basha DIV(0, "dout_spi2_pre", "dout_spi2", DIV_PERIC4, 24, 8), 8673a767b35SShaik Ameer Basha 86802932381SShaik Ameer Basha /* GSCL Block */ 86902932381SShaik Ameer Basha DIV(0, "dout_gscl_blk_300", "mout_user_aclk300_gscl", 87002932381SShaik Ameer Basha DIV2_RATIO0, 4, 2), 87102932381SShaik Ameer Basha DIV(0, "dout_gscl_blk_333", "aclk333_432_gscl", DIV2_RATIO0, 6, 2), 87202932381SShaik Ameer Basha 8734549d93dSShaik Ameer Basha /* MSCL Block */ 8744549d93dSShaik Ameer Basha DIV(0, "dout_mscl_blk", "aclk400_mscl", DIV2_RATIO0, 28, 2), 8754549d93dSShaik Ameer Basha 8760a22c306SShaik Ameer Basha /* PSGEN */ 8770a22c306SShaik Ameer Basha DIV(0, "dout_gen_blk", "mout_user_aclk266", DIV2_RATIO0, 8, 1), 8780a22c306SShaik Ameer Basha DIV(0, "dout_jpg_blk", "aclk166", DIV2_RATIO0, 20, 1), 8790a22c306SShaik Ameer Basha 8803a767b35SShaik Ameer Basha /* ISP Block */ 8813a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor0", "mout_isp_sensor", SCLK_DIV_ISP0, 8, 8), 8823a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor1", "mout_isp_sensor", SCLK_DIV_ISP0, 16, 8), 8833a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor2", "mout_isp_sensor", SCLK_DIV_ISP0, 24, 8), 8843a767b35SShaik Ameer Basha DIV(0, "dout_pwm_isp", "mout_pwm_isp", SCLK_DIV_ISP1, 28, 4), 8853a767b35SShaik Ameer Basha DIV(0, "dout_uart_isp", "mout_uart_isp", SCLK_DIV_ISP1, 24, 4), 8863a767b35SShaik Ameer Basha DIV(0, "dout_spi0_isp", "mout_spi0_isp", SCLK_DIV_ISP1, 16, 4), 8873a767b35SShaik Ameer Basha DIV(0, "dout_spi1_isp", "mout_spi1_isp", SCLK_DIV_ISP1, 20, 4), 8883a767b35SShaik Ameer Basha DIV_F(0, "dout_spi0_isp_pre", "dout_spi0_isp", SCLK_DIV_ISP1, 0, 8, 8893a767b35SShaik Ameer Basha CLK_SET_RATE_PARENT, 0), 8903a767b35SShaik Ameer Basha DIV_F(0, "dout_spi1_isp_pre", "dout_spi1_isp", SCLK_DIV_ISP1, 8, 8, 8913a767b35SShaik Ameer Basha CLK_SET_RATE_PARENT, 0), 8921609027fSChander Kashyap }; 8931609027fSChander Kashyap 8946520e968SAlim Akhtar static struct samsung_gate_clock exynos5x_gate_clks[] __initdata = { 8955b73721bSNaveen Krishna Chatradhi /* G2D */ 8963fac5941SShaik Ameer Basha GATE(CLK_MDMA0, "mdma0", "aclk266_g2d", GATE_IP_G2D, 1, 0, 0), 8975b73721bSNaveen Krishna Chatradhi GATE(CLK_SSS, "sss", "aclk266_g2d", GATE_IP_G2D, 2, 0, 0), 8983fac5941SShaik Ameer Basha GATE(CLK_G2D, "g2d", "aclk333_g2d", GATE_IP_G2D, 3, 0, 0), 8993fac5941SShaik Ameer Basha GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "aclk266_g2d", GATE_IP_G2D, 5, 0, 0), 9003fac5941SShaik Ameer Basha GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk333_g2d", GATE_IP_G2D, 7, 0, 0), 9015b73721bSNaveen Krishna Chatradhi 9021609027fSChander Kashyap GATE(0, "aclk200_fsys", "mout_user_aclk200_fsys", 9031609027fSChander Kashyap GATE_BUS_FSYS0, 9, CLK_IGNORE_UNUSED, 0), 9041609027fSChander Kashyap GATE(0, "aclk200_fsys2", "mout_user_aclk200_fsys2", 9051609027fSChander Kashyap GATE_BUS_FSYS0, 10, CLK_IGNORE_UNUSED, 0), 9061609027fSChander Kashyap 9071609027fSChander Kashyap GATE(0, "aclk333_g2d", "mout_user_aclk333_g2d", 9081609027fSChander Kashyap GATE_BUS_TOP, 0, CLK_IGNORE_UNUSED, 0), 9091609027fSChander Kashyap GATE(0, "aclk266_g2d", "mout_user_aclk266_g2d", 9101609027fSChander Kashyap GATE_BUS_TOP, 1, CLK_IGNORE_UNUSED, 0), 9111609027fSChander Kashyap GATE(0, "aclk300_jpeg", "mout_user_aclk300_jpeg", 9121609027fSChander Kashyap GATE_BUS_TOP, 4, CLK_IGNORE_UNUSED, 0), 9133a767b35SShaik Ameer Basha GATE(0, "aclk333_432_isp0", "mout_user_aclk333_432_isp0", 9143a767b35SShaik Ameer Basha GATE_BUS_TOP, 5, 0, 0), 9151609027fSChander Kashyap GATE(0, "aclk300_gscl", "mout_user_aclk300_gscl", 9161609027fSChander Kashyap GATE_BUS_TOP, 6, CLK_IGNORE_UNUSED, 0), 9171609027fSChander Kashyap GATE(0, "aclk333_432_gscl", "mout_user_aclk333_432_gscl", 9181609027fSChander Kashyap GATE_BUS_TOP, 7, CLK_IGNORE_UNUSED, 0), 9193a767b35SShaik Ameer Basha GATE(0, "aclk333_432_isp", "mout_user_aclk333_432_isp", 9203a767b35SShaik Ameer Basha GATE_BUS_TOP, 8, 0, 0), 921b31ca2a0SShaik Ameer Basha GATE(CLK_PCLK66_GPIO, "pclk66_gpio", "mout_user_pclk66_gpio", 9221609027fSChander Kashyap GATE_BUS_TOP, 9, CLK_IGNORE_UNUSED, 0), 923faec151bSShaik Ameer Basha GATE(0, "aclk66_psgen", "mout_user_aclk66_psgen", 9241609027fSChander Kashyap GATE_BUS_TOP, 10, CLK_IGNORE_UNUSED, 0), 9253a767b35SShaik Ameer Basha GATE(0, "aclk266_isp", "mout_user_aclk266_isp", 9263a767b35SShaik Ameer Basha GATE_BUS_TOP, 13, 0, 0), 9271609027fSChander Kashyap GATE(0, "aclk166", "mout_user_aclk166", 9281609027fSChander Kashyap GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), 9291609027fSChander Kashyap GATE(0, "aclk333", "mout_aclk333", 9301609027fSChander Kashyap GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), 9313a767b35SShaik Ameer Basha GATE(0, "aclk400_isp", "mout_user_aclk400_isp", 9323a767b35SShaik Ameer Basha GATE_BUS_TOP, 16, 0, 0), 93302932381SShaik Ameer Basha GATE(0, "aclk400_mscl", "mout_user_aclk400_mscl", 93402932381SShaik Ameer Basha GATE_BUS_TOP, 17, 0, 0), 935424b673aSShaik Ameer Basha GATE(0, "aclk200_disp1", "mout_user_aclk200_disp1", 936424b673aSShaik Ameer Basha GATE_BUS_TOP, 18, 0, 0), 937b31ca2a0SShaik Ameer Basha GATE(CLK_SCLK_MPHY_IXTAL24, "sclk_mphy_ixtal24", "mphy_refclk_ixtal24", 938b31ca2a0SShaik Ameer Basha GATE_BUS_TOP, 28, 0, 0), 939b31ca2a0SShaik Ameer Basha GATE(CLK_SCLK_HSIC_12M, "sclk_hsic_12m", "ff_hsic_12m", 940b31ca2a0SShaik Ameer Basha GATE_BUS_TOP, 29, 0, 0), 941424b673aSShaik Ameer Basha 942424b673aSShaik Ameer Basha GATE(0, "aclk300_disp1", "mout_user_aclk300_disp1", 943424b673aSShaik Ameer Basha SRC_MASK_TOP2, 24, 0, 0), 9441609027fSChander Kashyap 94531116a64SShaik Ameer Basha GATE(CLK_MAU_EPLL, "mau_epll", "mout_mau_epll_clk", 94631116a64SShaik Ameer Basha SRC_MASK_TOP7, 20, 0, 0), 94731116a64SShaik Ameer Basha 9481609027fSChander Kashyap /* sclk */ 949cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART0, "sclk_uart0", "dout_uart0", 9501609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 0, CLK_SET_RATE_PARENT, 0), 951cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART1, "sclk_uart1", "dout_uart1", 9521609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 1, CLK_SET_RATE_PARENT, 0), 953cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_uart2", 9541609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 2, CLK_SET_RATE_PARENT, 0), 955cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART3, "sclk_uart3", "dout_uart3", 9561609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 3, CLK_SET_RATE_PARENT, 0), 957faec151bSShaik Ameer Basha GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_spi0_pre", 9581609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 6, CLK_SET_RATE_PARENT, 0), 959faec151bSShaik Ameer Basha GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_spi1_pre", 9601609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 7, CLK_SET_RATE_PARENT, 0), 961faec151bSShaik Ameer Basha GATE(CLK_SCLK_SPI2, "sclk_spi2", "dout_spi2_pre", 9621609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 8, CLK_SET_RATE_PARENT, 0), 963cba9d2faSAndrzej Hajda GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif", 9641609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 9, CLK_SET_RATE_PARENT, 0), 965cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PWM, "sclk_pwm", "dout_pwm", 9661609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0), 967cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PCM1, "sclk_pcm1", "dout_pcm1", 9681609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 15, CLK_SET_RATE_PARENT, 0), 969cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PCM2, "sclk_pcm2", "dout_pcm2", 9701609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 16, CLK_SET_RATE_PARENT, 0), 971cba9d2faSAndrzej Hajda GATE(CLK_SCLK_I2S1, "sclk_i2s1", "dout_i2s1", 9721609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 17, CLK_SET_RATE_PARENT, 0), 973cba9d2faSAndrzej Hajda GATE(CLK_SCLK_I2S2, "sclk_i2s2", "dout_i2s2", 9741609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 18, CLK_SET_RATE_PARENT, 0), 9751609027fSChander Kashyap 976cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_mmc0", 9771609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 0, CLK_SET_RATE_PARENT, 0), 978cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_mmc1", 9791609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 1, CLK_SET_RATE_PARENT, 0), 980cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_mmc2", 9811609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 2, CLK_SET_RATE_PARENT, 0), 982cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBPHY301, "sclk_usbphy301", "dout_usbphy301", 9831609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 7, CLK_SET_RATE_PARENT, 0), 984cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBPHY300, "sclk_usbphy300", "dout_usbphy300", 9851609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 8, CLK_SET_RATE_PARENT, 0), 986cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBD300, "sclk_usbd300", "dout_usbd300", 9871609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 9, CLK_SET_RATE_PARENT, 0), 988cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBD301, "sclk_usbd301", "dout_usbd301", 9891609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 10, CLK_SET_RATE_PARENT, 0), 9901609027fSChander Kashyap 9911609027fSChander Kashyap /* Display */ 992cba9d2faSAndrzej Hajda GATE(CLK_SCLK_FIMD1, "sclk_fimd1", "dout_fimd1", 9931609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 0, CLK_SET_RATE_PARENT, 0), 994cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MIPI1, "sclk_mipi1", "dout_mipi1", 9951609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 3, CLK_SET_RATE_PARENT, 0), 996cba9d2faSAndrzej Hajda GATE(CLK_SCLK_HDMI, "sclk_hdmi", "mout_hdmi", 997424b673aSShaik Ameer Basha GATE_TOP_SCLK_DISP1, 9, 0, 0), 998cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PIXEL, "sclk_pixel", "dout_hdmi_pixel", 9991609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 10, CLK_SET_RATE_PARENT, 0), 1000cba9d2faSAndrzej Hajda GATE(CLK_SCLK_DP1, "sclk_dp1", "dout_dp1", 10011609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 20, CLK_SET_RATE_PARENT, 0), 10021609027fSChander Kashyap 10031609027fSChander Kashyap /* Maudio Block */ 1004cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MAUDIO0, "sclk_maudio0", "dout_maudio0", 10051609027fSChander Kashyap GATE_TOP_SCLK_MAU, 0, CLK_SET_RATE_PARENT, 0), 1006cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MAUPCM0, "sclk_maupcm0", "dout_maupcm0", 10071609027fSChander Kashyap GATE_TOP_SCLK_MAU, 1, CLK_SET_RATE_PARENT, 0), 10086b5ae463SShaik Ameer Basha 10096b5ae463SShaik Ameer Basha /* FSYS Block */ 1010cba9d2faSAndrzej Hajda GATE(CLK_TSI, "tsi", "aclk200_fsys", GATE_BUS_FSYS0, 0, 0, 0), 1011cba9d2faSAndrzej Hajda GATE(CLK_PDMA0, "pdma0", "aclk200_fsys", GATE_BUS_FSYS0, 1, 0, 0), 1012cba9d2faSAndrzej Hajda GATE(CLK_PDMA1, "pdma1", "aclk200_fsys", GATE_BUS_FSYS0, 2, 0, 0), 1013cba9d2faSAndrzej Hajda GATE(CLK_UFS, "ufs", "aclk200_fsys2", GATE_BUS_FSYS0, 3, 0, 0), 10146b5ae463SShaik Ameer Basha GATE(CLK_RTIC, "rtic", "aclk200_fsys", GATE_IP_FSYS, 9, 0, 0), 10156b5ae463SShaik Ameer Basha GATE(CLK_MMC0, "mmc0", "aclk200_fsys2", GATE_IP_FSYS, 12, 0, 0), 10166b5ae463SShaik Ameer Basha GATE(CLK_MMC1, "mmc1", "aclk200_fsys2", GATE_IP_FSYS, 13, 0, 0), 10176b5ae463SShaik Ameer Basha GATE(CLK_MMC2, "mmc2", "aclk200_fsys2", GATE_IP_FSYS, 14, 0, 0), 1018cba9d2faSAndrzej Hajda GATE(CLK_SROMC, "sromc", "aclk200_fsys2", 10196b5ae463SShaik Ameer Basha GATE_IP_FSYS, 17, CLK_IGNORE_UNUSED, 0), 10206b5ae463SShaik Ameer Basha GATE(CLK_USBH20, "usbh20", "aclk200_fsys", GATE_IP_FSYS, 18, 0, 0), 10216b5ae463SShaik Ameer Basha GATE(CLK_USBD300, "usbd300", "aclk200_fsys", GATE_IP_FSYS, 19, 0, 0), 10226b5ae463SShaik Ameer Basha GATE(CLK_USBD301, "usbd301", "aclk200_fsys", GATE_IP_FSYS, 20, 0, 0), 10236b5ae463SShaik Ameer Basha GATE(CLK_SCLK_UNIPRO, "sclk_unipro", "dout_unipro", 10246b5ae463SShaik Ameer Basha SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0), 10251609027fSChander Kashyap 1026faec151bSShaik Ameer Basha /* PERIC Block */ 102744ff0254SDoug Anderson GATE(CLK_UART0, "uart0", "mout_user_aclk66_peric", 102844ff0254SDoug Anderson GATE_IP_PERIC, 0, 0, 0), 102944ff0254SDoug Anderson GATE(CLK_UART1, "uart1", "mout_user_aclk66_peric", 103044ff0254SDoug Anderson GATE_IP_PERIC, 1, 0, 0), 103144ff0254SDoug Anderson GATE(CLK_UART2, "uart2", "mout_user_aclk66_peric", 103244ff0254SDoug Anderson GATE_IP_PERIC, 2, 0, 0), 103344ff0254SDoug Anderson GATE(CLK_UART3, "uart3", "mout_user_aclk66_peric", 103444ff0254SDoug Anderson GATE_IP_PERIC, 3, 0, 0), 103544ff0254SDoug Anderson GATE(CLK_I2C0, "i2c0", "mout_user_aclk66_peric", 103644ff0254SDoug Anderson GATE_IP_PERIC, 6, 0, 0), 103744ff0254SDoug Anderson GATE(CLK_I2C1, "i2c1", "mout_user_aclk66_peric", 103844ff0254SDoug Anderson GATE_IP_PERIC, 7, 0, 0), 103944ff0254SDoug Anderson GATE(CLK_I2C2, "i2c2", "mout_user_aclk66_peric", 104044ff0254SDoug Anderson GATE_IP_PERIC, 8, 0, 0), 104144ff0254SDoug Anderson GATE(CLK_I2C3, "i2c3", "mout_user_aclk66_peric", 104244ff0254SDoug Anderson GATE_IP_PERIC, 9, 0, 0), 104344ff0254SDoug Anderson GATE(CLK_USI0, "usi0", "mout_user_aclk66_peric", 104444ff0254SDoug Anderson GATE_IP_PERIC, 10, 0, 0), 104544ff0254SDoug Anderson GATE(CLK_USI1, "usi1", "mout_user_aclk66_peric", 104644ff0254SDoug Anderson GATE_IP_PERIC, 11, 0, 0), 104744ff0254SDoug Anderson GATE(CLK_USI2, "usi2", "mout_user_aclk66_peric", 104844ff0254SDoug Anderson GATE_IP_PERIC, 12, 0, 0), 104944ff0254SDoug Anderson GATE(CLK_USI3, "usi3", "mout_user_aclk66_peric", 105044ff0254SDoug Anderson GATE_IP_PERIC, 13, 0, 0), 105144ff0254SDoug Anderson GATE(CLK_I2C_HDMI, "i2c_hdmi", "mout_user_aclk66_peric", 105244ff0254SDoug Anderson GATE_IP_PERIC, 14, 0, 0), 105344ff0254SDoug Anderson GATE(CLK_TSADC, "tsadc", "mout_user_aclk66_peric", 105444ff0254SDoug Anderson GATE_IP_PERIC, 15, 0, 0), 105544ff0254SDoug Anderson GATE(CLK_SPI0, "spi0", "mout_user_aclk66_peric", 105644ff0254SDoug Anderson GATE_IP_PERIC, 16, 0, 0), 105744ff0254SDoug Anderson GATE(CLK_SPI1, "spi1", "mout_user_aclk66_peric", 105844ff0254SDoug Anderson GATE_IP_PERIC, 17, 0, 0), 105944ff0254SDoug Anderson GATE(CLK_SPI2, "spi2", "mout_user_aclk66_peric", 106044ff0254SDoug Anderson GATE_IP_PERIC, 18, 0, 0), 106144ff0254SDoug Anderson GATE(CLK_I2S1, "i2s1", "mout_user_aclk66_peric", 106244ff0254SDoug Anderson GATE_IP_PERIC, 20, 0, 0), 106344ff0254SDoug Anderson GATE(CLK_I2S2, "i2s2", "mout_user_aclk66_peric", 106444ff0254SDoug Anderson GATE_IP_PERIC, 21, 0, 0), 106544ff0254SDoug Anderson GATE(CLK_PCM1, "pcm1", "mout_user_aclk66_peric", 106644ff0254SDoug Anderson GATE_IP_PERIC, 22, 0, 0), 106744ff0254SDoug Anderson GATE(CLK_PCM2, "pcm2", "mout_user_aclk66_peric", 106844ff0254SDoug Anderson GATE_IP_PERIC, 23, 0, 0), 106944ff0254SDoug Anderson GATE(CLK_PWM, "pwm", "mout_user_aclk66_peric", 107044ff0254SDoug Anderson GATE_IP_PERIC, 24, 0, 0), 107144ff0254SDoug Anderson GATE(CLK_SPDIF, "spdif", "mout_user_aclk66_peric", 107244ff0254SDoug Anderson GATE_IP_PERIC, 26, 0, 0), 107344ff0254SDoug Anderson GATE(CLK_USI4, "usi4", "mout_user_aclk66_peric", 107444ff0254SDoug Anderson GATE_IP_PERIC, 28, 0, 0), 107544ff0254SDoug Anderson GATE(CLK_USI5, "usi5", "mout_user_aclk66_peric", 107644ff0254SDoug Anderson GATE_IP_PERIC, 30, 0, 0), 107744ff0254SDoug Anderson GATE(CLK_USI6, "usi6", "mout_user_aclk66_peric", 107844ff0254SDoug Anderson GATE_IP_PERIC, 31, 0, 0), 10791609027fSChander Kashyap 108044ff0254SDoug Anderson GATE(CLK_KEYIF, "keyif", "mout_user_aclk66_peric", 108144ff0254SDoug Anderson GATE_BUS_PERIC, 22, 0, 0), 10821609027fSChander Kashyap 10830a22c306SShaik Ameer Basha /* PERIS Block */ 1084cba9d2faSAndrzej Hajda GATE(CLK_CHIPID, "chipid", "aclk66_psgen", 10850a22c306SShaik Ameer Basha GATE_IP_PERIS, 0, CLK_IGNORE_UNUSED, 0), 1086cba9d2faSAndrzej Hajda GATE(CLK_SYSREG, "sysreg", "aclk66_psgen", 10870a22c306SShaik Ameer Basha GATE_IP_PERIS, 1, CLK_IGNORE_UNUSED, 0), 10880a22c306SShaik Ameer Basha GATE(CLK_TZPC0, "tzpc0", "aclk66_psgen", GATE_IP_PERIS, 6, 0, 0), 10890a22c306SShaik Ameer Basha GATE(CLK_TZPC1, "tzpc1", "aclk66_psgen", GATE_IP_PERIS, 7, 0, 0), 10900a22c306SShaik Ameer Basha GATE(CLK_TZPC2, "tzpc2", "aclk66_psgen", GATE_IP_PERIS, 8, 0, 0), 10910a22c306SShaik Ameer Basha GATE(CLK_TZPC3, "tzpc3", "aclk66_psgen", GATE_IP_PERIS, 9, 0, 0), 10920a22c306SShaik Ameer Basha GATE(CLK_TZPC4, "tzpc4", "aclk66_psgen", GATE_IP_PERIS, 10, 0, 0), 10930a22c306SShaik Ameer Basha GATE(CLK_TZPC5, "tzpc5", "aclk66_psgen", GATE_IP_PERIS, 11, 0, 0), 10940a22c306SShaik Ameer Basha GATE(CLK_TZPC6, "tzpc6", "aclk66_psgen", GATE_IP_PERIS, 12, 0, 0), 10950a22c306SShaik Ameer Basha GATE(CLK_TZPC7, "tzpc7", "aclk66_psgen", GATE_IP_PERIS, 13, 0, 0), 10960a22c306SShaik Ameer Basha GATE(CLK_TZPC8, "tzpc8", "aclk66_psgen", GATE_IP_PERIS, 14, 0, 0), 10970a22c306SShaik Ameer Basha GATE(CLK_TZPC9, "tzpc9", "aclk66_psgen", GATE_IP_PERIS, 15, 0, 0), 10980a22c306SShaik Ameer Basha GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk66_psgen", GATE_IP_PERIS, 16, 0, 0), 10990a22c306SShaik Ameer Basha GATE(CLK_MCT, "mct", "aclk66_psgen", GATE_IP_PERIS, 18, 0, 0), 11000a22c306SShaik Ameer Basha GATE(CLK_WDT, "wdt", "aclk66_psgen", GATE_IP_PERIS, 19, 0, 0), 11010a22c306SShaik Ameer Basha GATE(CLK_RTC, "rtc", "aclk66_psgen", GATE_IP_PERIS, 20, 0, 0), 11020a22c306SShaik Ameer Basha GATE(CLK_TMU, "tmu", "aclk66_psgen", GATE_IP_PERIS, 21, 0, 0), 11030a22c306SShaik Ameer Basha GATE(CLK_TMU_GPU, "tmu_gpu", "aclk66_psgen", GATE_IP_PERIS, 22, 0, 0), 11041609027fSChander Kashyap 1105cba9d2faSAndrzej Hajda GATE(CLK_SECKEY, "seckey", "aclk66_psgen", GATE_BUS_PERIS1, 1, 0, 0), 11060a22c306SShaik Ameer Basha 11070a22c306SShaik Ameer Basha /* GEN Block */ 11080a22c306SShaik Ameer Basha GATE(CLK_ROTATOR, "rotator", "mout_user_aclk266", GATE_IP_GEN, 1, 0, 0), 11090a22c306SShaik Ameer Basha GATE(CLK_JPEG, "jpeg", "aclk300_jpeg", GATE_IP_GEN, 2, 0, 0), 11100a22c306SShaik Ameer Basha GATE(CLK_JPEG2, "jpeg2", "aclk300_jpeg", GATE_IP_GEN, 3, 0, 0), 11110a22c306SShaik Ameer Basha GATE(CLK_MDMA1, "mdma1", "mout_user_aclk266", GATE_IP_GEN, 4, 0, 0), 11120a22c306SShaik Ameer Basha GATE(CLK_TOP_RTC, "top_rtc", "aclk66_psgen", GATE_IP_GEN, 5, 0, 0), 11130a22c306SShaik Ameer Basha GATE(CLK_SMMU_ROTATOR, "smmu_rotator", "dout_gen_blk", 11140a22c306SShaik Ameer Basha GATE_IP_GEN, 6, 0, 0), 11150a22c306SShaik Ameer Basha GATE(CLK_SMMU_JPEG, "smmu_jpeg", "dout_jpg_blk", GATE_IP_GEN, 7, 0, 0), 11160a22c306SShaik Ameer Basha GATE(CLK_SMMU_MDMA1, "smmu_mdma1", "dout_gen_blk", 11170a22c306SShaik Ameer Basha GATE_IP_GEN, 9, 0, 0), 11180a22c306SShaik Ameer Basha 11190a22c306SShaik Ameer Basha /* GATE_IP_GEN doesn't list gates for smmu_jpeg2 and mc */ 11200a22c306SShaik Ameer Basha GATE(CLK_SMMU_JPEG2, "smmu_jpeg2", "dout_jpg_blk", 11210a22c306SShaik Ameer Basha GATE_BUS_GEN, 28, 0, 0), 11220a22c306SShaik Ameer Basha GATE(CLK_MC, "mc", "aclk66_psgen", GATE_BUS_GEN, 12, 0, 0), 11231609027fSChander Kashyap 112402932381SShaik Ameer Basha /* GSCL Block */ 112502932381SShaik Ameer Basha GATE(CLK_SCLK_GSCL_WA, "sclk_gscl_wa", "mout_user_aclk333_432_gscl", 112602932381SShaik Ameer Basha GATE_TOP_SCLK_GSCL, 6, 0, 0), 112702932381SShaik Ameer Basha GATE(CLK_SCLK_GSCL_WB, "sclk_gscl_wb", "mout_user_aclk333_432_gscl", 112802932381SShaik Ameer Basha GATE_TOP_SCLK_GSCL, 7, 0, 0), 112902932381SShaik Ameer Basha 1130cba9d2faSAndrzej Hajda GATE(CLK_GSCL0, "gscl0", "aclk300_gscl", GATE_IP_GSCL0, 0, 0, 0), 1131cba9d2faSAndrzej Hajda GATE(CLK_GSCL1, "gscl1", "aclk300_gscl", GATE_IP_GSCL0, 1, 0, 0), 113202932381SShaik Ameer Basha GATE(CLK_FIMC_3AA, "fimc_3aa", "aclk333_432_gscl", 113302932381SShaik Ameer Basha GATE_IP_GSCL0, 4, 0, 0), 113402932381SShaik Ameer Basha GATE(CLK_FIMC_LITE0, "fimc_lite0", "aclk333_432_gscl", 113502932381SShaik Ameer Basha GATE_IP_GSCL0, 5, 0, 0), 113602932381SShaik Ameer Basha GATE(CLK_FIMC_LITE1, "fimc_lite1", "aclk333_432_gscl", 113702932381SShaik Ameer Basha GATE_IP_GSCL0, 6, 0, 0), 11381609027fSChander Kashyap 113902932381SShaik Ameer Basha GATE(CLK_SMMU_3AA, "smmu_3aa", "dout_gscl_blk_333", 114002932381SShaik Ameer Basha GATE_IP_GSCL1, 2, 0, 0), 114102932381SShaik Ameer Basha GATE(CLK_SMMU_FIMCL0, "smmu_fimcl0", "dout_gscl_blk_333", 11421609027fSChander Kashyap GATE_IP_GSCL1, 3, 0, 0), 114302932381SShaik Ameer Basha GATE(CLK_SMMU_FIMCL1, "smmu_fimcl1", "dout_gscl_blk_333", 11441609027fSChander Kashyap GATE_IP_GSCL1, 4, 0, 0), 114502932381SShaik Ameer Basha GATE(CLK_SMMU_GSCL0, "smmu_gscl0", "dout_gscl_blk_300", 114602932381SShaik Ameer Basha GATE_IP_GSCL1, 6, 0, 0), 114702932381SShaik Ameer Basha GATE(CLK_SMMU_GSCL1, "smmu_gscl1", "dout_gscl_blk_300", 114802932381SShaik Ameer Basha GATE_IP_GSCL1, 7, 0, 0), 114902932381SShaik Ameer Basha GATE(CLK_GSCL_WA, "gscl_wa", "sclk_gscl_wa", GATE_IP_GSCL1, 12, 0, 0), 115002932381SShaik Ameer Basha GATE(CLK_GSCL_WB, "gscl_wb", "sclk_gscl_wb", GATE_IP_GSCL1, 13, 0, 0), 115102932381SShaik Ameer Basha GATE(CLK_SMMU_FIMCL3, "smmu_fimcl3,", "dout_gscl_blk_333", 11521609027fSChander Kashyap GATE_IP_GSCL1, 16, 0, 0), 1153cba9d2faSAndrzej Hajda GATE(CLK_FIMC_LITE3, "fimc_lite3", "aclk333_432_gscl", 11541609027fSChander Kashyap GATE_IP_GSCL1, 17, 0, 0), 11551609027fSChander Kashyap 115602932381SShaik Ameer Basha /* MSCL Block */ 115702932381SShaik Ameer Basha GATE(CLK_MSCL0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0), 115802932381SShaik Ameer Basha GATE(CLK_MSCL1, "mscl1", "aclk400_mscl", GATE_IP_MSCL, 1, 0, 0), 115902932381SShaik Ameer Basha GATE(CLK_MSCL2, "mscl2", "aclk400_mscl", GATE_IP_MSCL, 2, 0, 0), 11604549d93dSShaik Ameer Basha GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "dout_mscl_blk", 116102932381SShaik Ameer Basha GATE_IP_MSCL, 8, 0, 0), 11624549d93dSShaik Ameer Basha GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "dout_mscl_blk", 116302932381SShaik Ameer Basha GATE_IP_MSCL, 9, 0, 0), 11644549d93dSShaik Ameer Basha GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "dout_mscl_blk", 116502932381SShaik Ameer Basha GATE_IP_MSCL, 10, 0, 0), 116602932381SShaik Ameer Basha 1167cba9d2faSAndrzej Hajda GATE(CLK_FIMD1, "fimd1", "aclk300_disp1", GATE_IP_DISP1, 0, 0, 0), 1168cba9d2faSAndrzej Hajda GATE(CLK_DSIM1, "dsim1", "aclk200_disp1", GATE_IP_DISP1, 3, 0, 0), 1169cba9d2faSAndrzej Hajda GATE(CLK_DP1, "dp1", "aclk200_disp1", GATE_IP_DISP1, 4, 0, 0), 1170424b673aSShaik Ameer Basha GATE(CLK_MIXER, "mixer", "aclk200_disp1", GATE_IP_DISP1, 5, 0, 0), 1171cba9d2faSAndrzej Hajda GATE(CLK_HDMI, "hdmi", "aclk200_disp1", GATE_IP_DISP1, 6, 0, 0), 1172424b673aSShaik Ameer Basha GATE(CLK_SMMU_FIMD1M0, "smmu_fimd1m0", "dout_disp1_blk", 1173424b673aSShaik Ameer Basha GATE_IP_DISP1, 7, 0, 0), 1174424b673aSShaik Ameer Basha GATE(CLK_SMMU_FIMD1M1, "smmu_fimd1m1", "dout_disp1_blk", 1175424b673aSShaik Ameer Basha GATE_IP_DISP1, 8, 0, 0), 1176424b673aSShaik Ameer Basha GATE(CLK_SMMU_MIXER, "smmu_mixer", "aclk200_disp1", 1177424b673aSShaik Ameer Basha GATE_IP_DISP1, 9, 0, 0), 11781609027fSChander Kashyap 11793a767b35SShaik Ameer Basha /* ISP */ 11803a767b35SShaik Ameer Basha GATE(CLK_SCLK_UART_ISP, "sclk_uart_isp", "dout_uart_isp", 11813a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 0, CLK_SET_RATE_PARENT, 0), 11823a767b35SShaik Ameer Basha GATE(CLK_SCLK_SPI0_ISP, "sclk_spi0_isp", "dout_spi0_isp_pre", 11833a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 1, CLK_SET_RATE_PARENT, 0), 11843a767b35SShaik Ameer Basha GATE(CLK_SCLK_SPI1_ISP, "sclk_spi1_isp", "dout_spi1_isp_pre", 11853a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 2, CLK_SET_RATE_PARENT, 0), 11863a767b35SShaik Ameer Basha GATE(CLK_SCLK_PWM_ISP, "sclk_pwm_isp", "dout_pwm_isp", 11873a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 3, CLK_SET_RATE_PARENT, 0), 11883a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR0, "sclk_isp_sensor0", "dout_isp_sensor0", 11893a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 4, CLK_SET_RATE_PARENT, 0), 11903a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR1, "sclk_isp_sensor1", "dout_isp_sensor1", 11913a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 8, CLK_SET_RATE_PARENT, 0), 11923a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR2, "sclk_isp_sensor2", "dout_isp_sensor2", 11933a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 12, CLK_SET_RATE_PARENT, 0), 11943a767b35SShaik Ameer Basha 1195cba9d2faSAndrzej Hajda GATE(CLK_MFC, "mfc", "aclk333", GATE_IP_MFC, 0, 0, 0), 11961d87db4dSShaik Ameer Basha GATE(CLK_SMMU_MFCL, "smmu_mfcl", "dout_mfc_blk", GATE_IP_MFC, 1, 0, 0), 11971d87db4dSShaik Ameer Basha GATE(CLK_SMMU_MFCR, "smmu_mfcr", "dout_mfc_blk", GATE_IP_MFC, 2, 0, 0), 11981609027fSChander Kashyap 11993fac5941SShaik Ameer Basha GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0), 12001609027fSChander Kashyap }; 12011609027fSChander Kashyap 1202ca5b4029SThomas Abraham static const struct samsung_pll_rate_table exynos5420_pll2550x_24mhz_tbl[] = { 1203ca5b4029SThomas Abraham PLL_35XX_RATE(2000000000, 250, 3, 0), 1204ca5b4029SThomas Abraham PLL_35XX_RATE(1900000000, 475, 6, 0), 1205ca5b4029SThomas Abraham PLL_35XX_RATE(1800000000, 225, 3, 0), 1206ca5b4029SThomas Abraham PLL_35XX_RATE(1700000000, 425, 6, 0), 1207ca5b4029SThomas Abraham PLL_35XX_RATE(1600000000, 200, 3, 0), 1208ca5b4029SThomas Abraham PLL_35XX_RATE(1500000000, 250, 4, 0), 1209ca5b4029SThomas Abraham PLL_35XX_RATE(1400000000, 175, 3, 0), 1210ca5b4029SThomas Abraham PLL_35XX_RATE(1300000000, 325, 6, 0), 1211ca5b4029SThomas Abraham PLL_35XX_RATE(1200000000, 200, 2, 1), 1212ca5b4029SThomas Abraham PLL_35XX_RATE(1100000000, 275, 3, 1), 1213ca5b4029SThomas Abraham PLL_35XX_RATE(1000000000, 250, 3, 1), 1214ca5b4029SThomas Abraham PLL_35XX_RATE(900000000, 150, 2, 1), 1215ca5b4029SThomas Abraham PLL_35XX_RATE(800000000, 200, 3, 1), 1216ca5b4029SThomas Abraham PLL_35XX_RATE(700000000, 175, 3, 1), 1217ca5b4029SThomas Abraham PLL_35XX_RATE(600000000, 200, 2, 2), 1218ca5b4029SThomas Abraham PLL_35XX_RATE(500000000, 250, 3, 2), 1219ca5b4029SThomas Abraham PLL_35XX_RATE(400000000, 200, 3, 2), 1220ca5b4029SThomas Abraham PLL_35XX_RATE(300000000, 200, 2, 3), 1221ca5b4029SThomas Abraham PLL_35XX_RATE(200000000, 200, 3, 3), 1222ca5b4029SThomas Abraham }; 1223ca5b4029SThomas Abraham 12246520e968SAlim Akhtar static struct samsung_pll_clock exynos5x_plls[nr_plls] __initdata = { 1225cba9d2faSAndrzej Hajda [apll] = PLL(pll_2550, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK, 12263ff6e0d8SYadwinder Singh Brar APLL_CON0, NULL), 1227cba9d2faSAndrzej Hajda [cpll] = PLL(pll_2550, CLK_FOUT_CPLL, "fout_cpll", "fin_pll", CPLL_LOCK, 1228cdf64eeeSChander Kashyap CPLL_CON0, NULL), 1229cba9d2faSAndrzej Hajda [dpll] = PLL(pll_2550, CLK_FOUT_DPLL, "fout_dpll", "fin_pll", DPLL_LOCK, 12303ff6e0d8SYadwinder Singh Brar DPLL_CON0, NULL), 1231cba9d2faSAndrzej Hajda [epll] = PLL(pll_2650, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK, 12323ff6e0d8SYadwinder Singh Brar EPLL_CON0, NULL), 1233cba9d2faSAndrzej Hajda [rpll] = PLL(pll_2650, CLK_FOUT_RPLL, "fout_rpll", "fin_pll", RPLL_LOCK, 12343ff6e0d8SYadwinder Singh Brar RPLL_CON0, NULL), 1235cba9d2faSAndrzej Hajda [ipll] = PLL(pll_2550, CLK_FOUT_IPLL, "fout_ipll", "fin_pll", IPLL_LOCK, 12363ff6e0d8SYadwinder Singh Brar IPLL_CON0, NULL), 1237cba9d2faSAndrzej Hajda [spll] = PLL(pll_2550, CLK_FOUT_SPLL, "fout_spll", "fin_pll", SPLL_LOCK, 12383ff6e0d8SYadwinder Singh Brar SPLL_CON0, NULL), 1239cba9d2faSAndrzej Hajda [vpll] = PLL(pll_2550, CLK_FOUT_VPLL, "fout_vpll", "fin_pll", VPLL_LOCK, 12403ff6e0d8SYadwinder Singh Brar VPLL_CON0, NULL), 1241cba9d2faSAndrzej Hajda [mpll] = PLL(pll_2550, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK, 12423ff6e0d8SYadwinder Singh Brar MPLL_CON0, NULL), 1243cba9d2faSAndrzej Hajda [bpll] = PLL(pll_2550, CLK_FOUT_BPLL, "fout_bpll", "fin_pll", BPLL_LOCK, 12443ff6e0d8SYadwinder Singh Brar BPLL_CON0, NULL), 1245cba9d2faSAndrzej Hajda [kpll] = PLL(pll_2550, CLK_FOUT_KPLL, "fout_kpll", "fin_pll", KPLL_LOCK, 12463ff6e0d8SYadwinder Singh Brar KPLL_CON0, NULL), 1247c898c6b7SYadwinder Singh Brar }; 1248c898c6b7SYadwinder Singh Brar 1249305cfab0SKrzysztof Kozlowski static const struct of_device_id ext_clk_match[] __initconst = { 12501609027fSChander Kashyap { .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, }, 12511609027fSChander Kashyap { }, 12521609027fSChander Kashyap }; 12531609027fSChander Kashyap 12541609027fSChander Kashyap /* register exynos5420 clocks */ 12556520e968SAlim Akhtar static void __init exynos5x_clk_init(struct device_node *np, 12566520e968SAlim Akhtar enum exynos5x_soc soc) 12571609027fSChander Kashyap { 1258976face4SRahul Sharma struct samsung_clk_provider *ctx; 1259976face4SRahul Sharma 12601609027fSChander Kashyap if (np) { 12611609027fSChander Kashyap reg_base = of_iomap(np, 0); 12621609027fSChander Kashyap if (!reg_base) 12631609027fSChander Kashyap panic("%s: failed to map registers\n", __func__); 12641609027fSChander Kashyap } else { 12651609027fSChander Kashyap panic("%s: unable to determine soc\n", __func__); 12661609027fSChander Kashyap } 12671609027fSChander Kashyap 12686520e968SAlim Akhtar exynos5x_soc = soc; 12696520e968SAlim Akhtar 1270976face4SRahul Sharma ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS); 1271976face4SRahul Sharma if (!ctx) 1272976face4SRahul Sharma panic("%s: unable to allocate context.\n", __func__); 1273976face4SRahul Sharma 12746520e968SAlim Akhtar samsung_clk_of_register_fixed_ext(ctx, exynos5x_fixed_rate_ext_clks, 12756520e968SAlim Akhtar ARRAY_SIZE(exynos5x_fixed_rate_ext_clks), 12761609027fSChander Kashyap ext_clk_match); 1277ca5b4029SThomas Abraham 1278ca5b4029SThomas Abraham if (_get_rate("fin_pll") == 24 * MHZ) { 1279ca5b4029SThomas Abraham exynos5x_plls[apll].rate_table = exynos5420_pll2550x_24mhz_tbl; 1280ca5b4029SThomas Abraham exynos5x_plls[kpll].rate_table = exynos5420_pll2550x_24mhz_tbl; 1281ca5b4029SThomas Abraham } 1282ca5b4029SThomas Abraham 12836520e968SAlim Akhtar samsung_clk_register_pll(ctx, exynos5x_plls, ARRAY_SIZE(exynos5x_plls), 1284c898c6b7SYadwinder Singh Brar reg_base); 12856520e968SAlim Akhtar samsung_clk_register_fixed_rate(ctx, exynos5x_fixed_rate_clks, 12866520e968SAlim Akhtar ARRAY_SIZE(exynos5x_fixed_rate_clks)); 12876520e968SAlim Akhtar samsung_clk_register_fixed_factor(ctx, exynos5x_fixed_factor_clks, 12886520e968SAlim Akhtar ARRAY_SIZE(exynos5x_fixed_factor_clks)); 12896520e968SAlim Akhtar samsung_clk_register_mux(ctx, exynos5x_mux_clks, 12906520e968SAlim Akhtar ARRAY_SIZE(exynos5x_mux_clks)); 12916520e968SAlim Akhtar samsung_clk_register_div(ctx, exynos5x_div_clks, 12926520e968SAlim Akhtar ARRAY_SIZE(exynos5x_div_clks)); 12936520e968SAlim Akhtar samsung_clk_register_gate(ctx, exynos5x_gate_clks, 12946520e968SAlim Akhtar ARRAY_SIZE(exynos5x_gate_clks)); 12956520e968SAlim Akhtar 12966520e968SAlim Akhtar if (soc == EXYNOS5420) { 1297976face4SRahul Sharma samsung_clk_register_mux(ctx, exynos5420_mux_clks, 12981609027fSChander Kashyap ARRAY_SIZE(exynos5420_mux_clks)); 1299976face4SRahul Sharma samsung_clk_register_div(ctx, exynos5420_div_clks, 13001609027fSChander Kashyap ARRAY_SIZE(exynos5420_div_clks)); 13016520e968SAlim Akhtar } else { 13026520e968SAlim Akhtar samsung_clk_register_fixed_factor( 13036520e968SAlim Akhtar ctx, exynos5800_fixed_factor_clks, 13046520e968SAlim Akhtar ARRAY_SIZE(exynos5800_fixed_factor_clks)); 13056520e968SAlim Akhtar samsung_clk_register_mux(ctx, exynos5800_mux_clks, 13066520e968SAlim Akhtar ARRAY_SIZE(exynos5800_mux_clks)); 13076520e968SAlim Akhtar samsung_clk_register_div(ctx, exynos5800_div_clks, 13086520e968SAlim Akhtar ARRAY_SIZE(exynos5800_div_clks)); 13096520e968SAlim Akhtar samsung_clk_register_gate(ctx, exynos5800_gate_clks, 13106520e968SAlim Akhtar ARRAY_SIZE(exynos5800_gate_clks)); 13116520e968SAlim Akhtar } 1312388c7885STomasz Figa 1313388c7885STomasz Figa exynos5420_clk_sleep_init(); 1314d5e136a2SSylwester Nawrocki 1315d5e136a2SSylwester Nawrocki samsung_clk_of_add_provider(np, ctx); 13161609027fSChander Kashyap } 13176520e968SAlim Akhtar 13186520e968SAlim Akhtar static void __init exynos5420_clk_init(struct device_node *np) 13196520e968SAlim Akhtar { 13206520e968SAlim Akhtar exynos5x_clk_init(np, EXYNOS5420); 13216520e968SAlim Akhtar } 13221609027fSChander Kashyap CLK_OF_DECLARE(exynos5420_clk, "samsung,exynos5420-clock", exynos5420_clk_init); 13236520e968SAlim Akhtar 13246520e968SAlim Akhtar static void __init exynos5800_clk_init(struct device_node *np) 13256520e968SAlim Akhtar { 13266520e968SAlim Akhtar exynos5x_clk_init(np, EXYNOS5800); 13276520e968SAlim Akhtar } 13286520e968SAlim Akhtar CLK_OF_DECLARE(exynos5800_clk, "samsung,exynos5800-clock", exynos5800_clk_init); 1329