11609027fSChander Kashyap /* 21609027fSChander Kashyap * Copyright (c) 2013 Samsung Electronics Co., Ltd. 31609027fSChander Kashyap * Authors: Thomas Abraham <thomas.ab@samsung.com> 41609027fSChander Kashyap * Chander Kashyap <k.chander@samsung.com> 51609027fSChander Kashyap * 61609027fSChander Kashyap * This program is free software; you can redistribute it and/or modify 71609027fSChander Kashyap * it under the terms of the GNU General Public License version 2 as 81609027fSChander Kashyap * published by the Free Software Foundation. 91609027fSChander Kashyap * 101609027fSChander Kashyap * Common Clock Framework support for Exynos5420 SoC. 111609027fSChander Kashyap */ 121609027fSChander Kashyap 13cba9d2faSAndrzej Hajda #include <dt-bindings/clock/exynos5420.h> 141609027fSChander Kashyap #include <linux/clk.h> 151609027fSChander Kashyap #include <linux/clkdev.h> 161609027fSChander Kashyap #include <linux/clk-provider.h> 171609027fSChander Kashyap #include <linux/of.h> 181609027fSChander Kashyap #include <linux/of_address.h> 19388c7885STomasz Figa #include <linux/syscore_ops.h> 201609027fSChander Kashyap 211609027fSChander Kashyap #include "clk.h" 221609027fSChander Kashyap 23c898c6b7SYadwinder Singh Brar #define APLL_LOCK 0x0 24c898c6b7SYadwinder Singh Brar #define APLL_CON0 0x100 251609027fSChander Kashyap #define SRC_CPU 0x200 261609027fSChander Kashyap #define DIV_CPU0 0x500 271609027fSChander Kashyap #define DIV_CPU1 0x504 281609027fSChander Kashyap #define GATE_BUS_CPU 0x700 291609027fSChander Kashyap #define GATE_SCLK_CPU 0x800 305b73721bSNaveen Krishna Chatradhi #define GATE_IP_G2D 0x8800 31c898c6b7SYadwinder Singh Brar #define CPLL_LOCK 0x10020 32c898c6b7SYadwinder Singh Brar #define DPLL_LOCK 0x10030 33c898c6b7SYadwinder Singh Brar #define EPLL_LOCK 0x10040 34c898c6b7SYadwinder Singh Brar #define RPLL_LOCK 0x10050 35c898c6b7SYadwinder Singh Brar #define IPLL_LOCK 0x10060 36c898c6b7SYadwinder Singh Brar #define SPLL_LOCK 0x10070 3753cb6342SSachin Kamat #define VPLL_LOCK 0x10080 38c898c6b7SYadwinder Singh Brar #define MPLL_LOCK 0x10090 39c898c6b7SYadwinder Singh Brar #define CPLL_CON0 0x10120 40c898c6b7SYadwinder Singh Brar #define DPLL_CON0 0x10128 41c898c6b7SYadwinder Singh Brar #define EPLL_CON0 0x10130 42c898c6b7SYadwinder Singh Brar #define RPLL_CON0 0x10140 43c898c6b7SYadwinder Singh Brar #define IPLL_CON0 0x10150 44c898c6b7SYadwinder Singh Brar #define SPLL_CON0 0x10160 45c898c6b7SYadwinder Singh Brar #define VPLL_CON0 0x10170 46c898c6b7SYadwinder Singh Brar #define MPLL_CON0 0x10180 471609027fSChander Kashyap #define SRC_TOP0 0x10200 481609027fSChander Kashyap #define SRC_TOP1 0x10204 491609027fSChander Kashyap #define SRC_TOP2 0x10208 501609027fSChander Kashyap #define SRC_TOP3 0x1020c 511609027fSChander Kashyap #define SRC_TOP4 0x10210 521609027fSChander Kashyap #define SRC_TOP5 0x10214 531609027fSChander Kashyap #define SRC_TOP6 0x10218 541609027fSChander Kashyap #define SRC_TOP7 0x1021c 551609027fSChander Kashyap #define SRC_DISP10 0x1022c 561609027fSChander Kashyap #define SRC_MAU 0x10240 571609027fSChander Kashyap #define SRC_FSYS 0x10244 581609027fSChander Kashyap #define SRC_PERIC0 0x10250 591609027fSChander Kashyap #define SRC_PERIC1 0x10254 603a767b35SShaik Ameer Basha #define SRC_ISP 0x10270 611609027fSChander Kashyap #define SRC_TOP10 0x10280 621609027fSChander Kashyap #define SRC_TOP11 0x10284 631609027fSChander Kashyap #define SRC_TOP12 0x10288 64424b673aSShaik Ameer Basha #define SRC_MASK_TOP2 0x10308 6531116a64SShaik Ameer Basha #define SRC_MASK_TOP7 0x1031c 661609027fSChander Kashyap #define SRC_MASK_DISP10 0x1032c 6731116a64SShaik Ameer Basha #define SRC_MASK_MAU 0x10334 681609027fSChander Kashyap #define SRC_MASK_FSYS 0x10340 691609027fSChander Kashyap #define SRC_MASK_PERIC0 0x10350 701609027fSChander Kashyap #define SRC_MASK_PERIC1 0x10354 711609027fSChander Kashyap #define DIV_TOP0 0x10500 721609027fSChander Kashyap #define DIV_TOP1 0x10504 731609027fSChander Kashyap #define DIV_TOP2 0x10508 741609027fSChander Kashyap #define DIV_DISP10 0x1052c 751609027fSChander Kashyap #define DIV_MAU 0x10544 761609027fSChander Kashyap #define DIV_FSYS0 0x10548 771609027fSChander Kashyap #define DIV_FSYS1 0x1054c 781609027fSChander Kashyap #define DIV_FSYS2 0x10550 791609027fSChander Kashyap #define DIV_PERIC0 0x10558 801609027fSChander Kashyap #define DIV_PERIC1 0x1055c 811609027fSChander Kashyap #define DIV_PERIC2 0x10560 821609027fSChander Kashyap #define DIV_PERIC3 0x10564 831609027fSChander Kashyap #define DIV_PERIC4 0x10568 843a767b35SShaik Ameer Basha #define SCLK_DIV_ISP0 0x10580 853a767b35SShaik Ameer Basha #define SCLK_DIV_ISP1 0x10584 8602932381SShaik Ameer Basha #define DIV2_RATIO0 0x10590 871d87db4dSShaik Ameer Basha #define DIV4_RATIO 0x105a0 881609027fSChander Kashyap #define GATE_BUS_TOP 0x10700 890a22c306SShaik Ameer Basha #define GATE_BUS_GEN 0x1073c 901609027fSChander Kashyap #define GATE_BUS_FSYS0 0x10740 916b5ae463SShaik Ameer Basha #define GATE_BUS_FSYS2 0x10748 921609027fSChander Kashyap #define GATE_BUS_PERIC 0x10750 931609027fSChander Kashyap #define GATE_BUS_PERIC1 0x10754 941609027fSChander Kashyap #define GATE_BUS_PERIS0 0x10760 951609027fSChander Kashyap #define GATE_BUS_PERIS1 0x10764 966575fa76SShaik Ameer Basha #define GATE_BUS_NOC 0x10770 973a767b35SShaik Ameer Basha #define GATE_TOP_SCLK_ISP 0x10870 981609027fSChander Kashyap #define GATE_IP_GSCL0 0x10910 991609027fSChander Kashyap #define GATE_IP_GSCL1 0x10920 1001609027fSChander Kashyap #define GATE_IP_MFC 0x1092c 1011609027fSChander Kashyap #define GATE_IP_DISP1 0x10928 1021609027fSChander Kashyap #define GATE_IP_G3D 0x10930 1031609027fSChander Kashyap #define GATE_IP_GEN 0x10934 1046b5ae463SShaik Ameer Basha #define GATE_IP_FSYS 0x10944 105faec151bSShaik Ameer Basha #define GATE_IP_PERIC 0x10950 1060a22c306SShaik Ameer Basha #define GATE_IP_PERIS 0x10960 1071609027fSChander Kashyap #define GATE_IP_MSCL 0x10970 1081609027fSChander Kashyap #define GATE_TOP_SCLK_GSCL 0x10820 1091609027fSChander Kashyap #define GATE_TOP_SCLK_DISP1 0x10828 1101609027fSChander Kashyap #define GATE_TOP_SCLK_MAU 0x1083c 1111609027fSChander Kashyap #define GATE_TOP_SCLK_FSYS 0x10840 1121609027fSChander Kashyap #define GATE_TOP_SCLK_PERIC 0x10850 113424b673aSShaik Ameer Basha #define TOP_SPARE2 0x10b08 114c898c6b7SYadwinder Singh Brar #define BPLL_LOCK 0x20010 115c898c6b7SYadwinder Singh Brar #define BPLL_CON0 0x20110 116c898c6b7SYadwinder Singh Brar #define KPLL_LOCK 0x28000 117c898c6b7SYadwinder Singh Brar #define KPLL_CON0 0x28100 1181609027fSChander Kashyap #define SRC_KFC 0x28200 1191609027fSChander Kashyap #define DIV_KFC0 0x28500 1201609027fSChander Kashyap 121c898c6b7SYadwinder Singh Brar /* list of PLLs */ 122c898c6b7SYadwinder Singh Brar enum exynos5420_plls { 123c898c6b7SYadwinder Singh Brar apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, 124c898c6b7SYadwinder Singh Brar bpll, kpll, 125c898c6b7SYadwinder Singh Brar nr_plls /* number of PLLs */ 126c898c6b7SYadwinder Singh Brar }; 127c898c6b7SYadwinder Singh Brar 128388c7885STomasz Figa static void __iomem *reg_base; 129388c7885STomasz Figa 130388c7885STomasz Figa #ifdef CONFIG_PM_SLEEP 131388c7885STomasz Figa static struct samsung_clk_reg_dump *exynos5420_save; 132388c7885STomasz Figa 1331609027fSChander Kashyap /* 1341609027fSChander Kashyap * list of controller registers to be saved and restored during a 1351609027fSChander Kashyap * suspend/resume cycle. 1361609027fSChander Kashyap */ 137202e5ae9SSachin Kamat static unsigned long exynos5420_clk_regs[] __initdata = { 1381609027fSChander Kashyap SRC_CPU, 1391609027fSChander Kashyap DIV_CPU0, 1401609027fSChander Kashyap DIV_CPU1, 1411609027fSChander Kashyap GATE_BUS_CPU, 1421609027fSChander Kashyap GATE_SCLK_CPU, 1431609027fSChander Kashyap SRC_TOP0, 1441609027fSChander Kashyap SRC_TOP1, 1451609027fSChander Kashyap SRC_TOP2, 1461609027fSChander Kashyap SRC_TOP3, 1471609027fSChander Kashyap SRC_TOP4, 1481609027fSChander Kashyap SRC_TOP5, 1491609027fSChander Kashyap SRC_TOP6, 1501609027fSChander Kashyap SRC_TOP7, 1511609027fSChander Kashyap SRC_DISP10, 1521609027fSChander Kashyap SRC_MAU, 1531609027fSChander Kashyap SRC_FSYS, 1541609027fSChander Kashyap SRC_PERIC0, 1551609027fSChander Kashyap SRC_PERIC1, 1561609027fSChander Kashyap SRC_TOP10, 1571609027fSChander Kashyap SRC_TOP11, 1581609027fSChander Kashyap SRC_TOP12, 159424b673aSShaik Ameer Basha SRC_MASK_TOP2, 16031116a64SShaik Ameer Basha SRC_MASK_TOP7, 1611609027fSChander Kashyap SRC_MASK_DISP10, 1621609027fSChander Kashyap SRC_MASK_FSYS, 1631609027fSChander Kashyap SRC_MASK_PERIC0, 1641609027fSChander Kashyap SRC_MASK_PERIC1, 1653a767b35SShaik Ameer Basha SRC_ISP, 1661609027fSChander Kashyap DIV_TOP0, 1671609027fSChander Kashyap DIV_TOP1, 1681609027fSChander Kashyap DIV_TOP2, 1691609027fSChander Kashyap DIV_DISP10, 1701609027fSChander Kashyap DIV_MAU, 1711609027fSChander Kashyap DIV_FSYS0, 1721609027fSChander Kashyap DIV_FSYS1, 1731609027fSChander Kashyap DIV_FSYS2, 1741609027fSChander Kashyap DIV_PERIC0, 1751609027fSChander Kashyap DIV_PERIC1, 1761609027fSChander Kashyap DIV_PERIC2, 1771609027fSChander Kashyap DIV_PERIC3, 1781609027fSChander Kashyap DIV_PERIC4, 1793a767b35SShaik Ameer Basha SCLK_DIV_ISP0, 1803a767b35SShaik Ameer Basha SCLK_DIV_ISP1, 18102932381SShaik Ameer Basha DIV2_RATIO0, 1821d87db4dSShaik Ameer Basha DIV4_RATIO, 1831609027fSChander Kashyap GATE_BUS_TOP, 1840a22c306SShaik Ameer Basha GATE_BUS_GEN, 1851609027fSChander Kashyap GATE_BUS_FSYS0, 1866b5ae463SShaik Ameer Basha GATE_BUS_FSYS2, 1871609027fSChander Kashyap GATE_BUS_PERIC, 1881609027fSChander Kashyap GATE_BUS_PERIC1, 1891609027fSChander Kashyap GATE_BUS_PERIS0, 1901609027fSChander Kashyap GATE_BUS_PERIS1, 1916575fa76SShaik Ameer Basha GATE_BUS_NOC, 1923a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 1931609027fSChander Kashyap GATE_IP_GSCL0, 1941609027fSChander Kashyap GATE_IP_GSCL1, 1951609027fSChander Kashyap GATE_IP_MFC, 1961609027fSChander Kashyap GATE_IP_DISP1, 1971609027fSChander Kashyap GATE_IP_G3D, 1981609027fSChander Kashyap GATE_IP_GEN, 1996b5ae463SShaik Ameer Basha GATE_IP_FSYS, 200faec151bSShaik Ameer Basha GATE_IP_PERIC, 2010a22c306SShaik Ameer Basha GATE_IP_PERIS, 2021609027fSChander Kashyap GATE_IP_MSCL, 2031609027fSChander Kashyap GATE_TOP_SCLK_GSCL, 2041609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 2051609027fSChander Kashyap GATE_TOP_SCLK_MAU, 2061609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 2071609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 208424b673aSShaik Ameer Basha TOP_SPARE2, 2091609027fSChander Kashyap SRC_KFC, 2101609027fSChander Kashyap DIV_KFC0, 2111609027fSChander Kashyap }; 2121609027fSChander Kashyap 213388c7885STomasz Figa static int exynos5420_clk_suspend(void) 214388c7885STomasz Figa { 215388c7885STomasz Figa samsung_clk_save(reg_base, exynos5420_save, 216388c7885STomasz Figa ARRAY_SIZE(exynos5420_clk_regs)); 217388c7885STomasz Figa 218388c7885STomasz Figa return 0; 219388c7885STomasz Figa } 220388c7885STomasz Figa 221388c7885STomasz Figa static void exynos5420_clk_resume(void) 222388c7885STomasz Figa { 223388c7885STomasz Figa samsung_clk_restore(reg_base, exynos5420_save, 224388c7885STomasz Figa ARRAY_SIZE(exynos5420_clk_regs)); 225388c7885STomasz Figa } 226388c7885STomasz Figa 227388c7885STomasz Figa static struct syscore_ops exynos5420_clk_syscore_ops = { 228388c7885STomasz Figa .suspend = exynos5420_clk_suspend, 229388c7885STomasz Figa .resume = exynos5420_clk_resume, 230388c7885STomasz Figa }; 231388c7885STomasz Figa 232388c7885STomasz Figa static void exynos5420_clk_sleep_init(void) 233388c7885STomasz Figa { 234388c7885STomasz Figa exynos5420_save = samsung_clk_alloc_reg_dump(exynos5420_clk_regs, 235388c7885STomasz Figa ARRAY_SIZE(exynos5420_clk_regs)); 236388c7885STomasz Figa if (!exynos5420_save) { 237388c7885STomasz Figa pr_warn("%s: failed to allocate sleep save data, no sleep support!\n", 238388c7885STomasz Figa __func__); 239388c7885STomasz Figa return; 240388c7885STomasz Figa } 241388c7885STomasz Figa 242388c7885STomasz Figa register_syscore_ops(&exynos5420_clk_syscore_ops); 243388c7885STomasz Figa } 244388c7885STomasz Figa #else 245388c7885STomasz Figa static void exynos5420_clk_sleep_init(void) {} 246388c7885STomasz Figa #endif 247388c7885STomasz Figa 2481609027fSChander Kashyap /* list of all parent clocks */ 249dbd713bbSShaik Ameer Basha PNAME(mout_mspll_cpu_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 250dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll"}; 251dbd713bbSShaik Ameer Basha PNAME(mout_cpu_p) = {"mout_apll" , "mout_mspll_cpu"}; 252dbd713bbSShaik Ameer Basha PNAME(mout_kfc_p) = {"mout_kpll" , "mout_mspll_kfc"}; 253dbd713bbSShaik Ameer Basha PNAME(mout_apll_p) = {"fin_pll", "fout_apll"}; 254dbd713bbSShaik Ameer Basha PNAME(mout_bpll_p) = {"fin_pll", "fout_bpll"}; 255dbd713bbSShaik Ameer Basha PNAME(mout_cpll_p) = {"fin_pll", "fout_cpll"}; 256dbd713bbSShaik Ameer Basha PNAME(mout_dpll_p) = {"fin_pll", "fout_dpll"}; 257dbd713bbSShaik Ameer Basha PNAME(mout_epll_p) = {"fin_pll", "fout_epll"}; 258dbd713bbSShaik Ameer Basha PNAME(mout_ipll_p) = {"fin_pll", "fout_ipll"}; 259dbd713bbSShaik Ameer Basha PNAME(mout_kpll_p) = {"fin_pll", "fout_kpll"}; 260dbd713bbSShaik Ameer Basha PNAME(mout_mpll_p) = {"fin_pll", "fout_mpll"}; 261dbd713bbSShaik Ameer Basha PNAME(mout_rpll_p) = {"fin_pll", "fout_rpll"}; 262dbd713bbSShaik Ameer Basha PNAME(mout_spll_p) = {"fin_pll", "fout_spll"}; 263dbd713bbSShaik Ameer Basha PNAME(mout_vpll_p) = {"fin_pll", "fout_vpll"}; 2641609027fSChander Kashyap 265dbd713bbSShaik Ameer Basha PNAME(mout_group1_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 266dbd713bbSShaik Ameer Basha "mout_sclk_mpll"}; 267dbd713bbSShaik Ameer Basha PNAME(mout_group2_p) = {"fin_pll", "mout_sclk_cpll", 268dbd713bbSShaik Ameer Basha "mout_sclk_dpll", "mout_sclk_mpll", "mout_sclk_spll", 269dbd713bbSShaik Ameer Basha "mout_sclk_ipll", "mout_sclk_epll", "mout_sclk_rpll"}; 270dbd713bbSShaik Ameer Basha PNAME(mout_group3_p) = {"mout_sclk_rpll", "mout_sclk_spll"}; 271dbd713bbSShaik Ameer Basha PNAME(mout_group4_p) = {"mout_sclk_ipll", "mout_sclk_dpll", "mout_sclk_mpll"}; 272dbd713bbSShaik Ameer Basha PNAME(mout_group5_p) = {"mout_sclk_vpll", "mout_sclk_dpll"}; 2731609027fSChander Kashyap 274424b673aSShaik Ameer Basha PNAME(mout_fimd1_final_p) = {"mout_fimd1", "mout_fimd1_opt"}; 275dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk66_p) = {"dout_aclk66", "mout_sclk_spll"}; 276faec151bSShaik Ameer Basha PNAME(mout_user_aclk66_peric_p) = { "fin_pll", "mout_sw_aclk66"}; 277b31ca2a0SShaik Ameer Basha PNAME(mout_user_pclk66_gpio_p) = {"mout_sw_aclk66", "ff_sw_aclk66"}; 2781609027fSChander Kashyap 279dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_fsys_p) = {"dout_aclk200_fsys", "mout_sclk_spll"}; 2806b5ae463SShaik Ameer Basha PNAME(mout_sw_pclk200_fsys_p) = {"dout_pclk200_fsys", "mout_sclk_spll"}; 2816b5ae463SShaik Ameer Basha PNAME(mout_user_pclk200_fsys_p) = {"fin_pll", "mout_sw_pclk200_fsys"}; 282dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk200_fsys_p) = {"fin_pll", "mout_sw_aclk200_fsys"}; 2831609027fSChander Kashyap 284dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_fsys2_p) = {"dout_aclk200_fsys2", "mout_sclk_spll"}; 285dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk200_fsys2_p) = {"fin_pll", "mout_sw_aclk200_fsys2"}; 2866575fa76SShaik Ameer Basha PNAME(mout_sw_aclk100_noc_p) = {"dout_aclk100_noc", "mout_sclk_spll"}; 2876575fa76SShaik Ameer Basha PNAME(mout_user_aclk100_noc_p) = {"fin_pll", "mout_sw_aclk100_noc"}; 2886575fa76SShaik Ameer Basha 2896575fa76SShaik Ameer Basha PNAME(mout_sw_aclk400_wcore_p) = {"dout_aclk400_wcore", "mout_sclk_spll"}; 2906575fa76SShaik Ameer Basha PNAME(mout_aclk400_wcore_bpll_p) = {"mout_aclk400_wcore", "sclk_bpll"}; 2916575fa76SShaik Ameer Basha PNAME(mout_user_aclk400_wcore_p) = {"fin_pll", "mout_sw_aclk400_wcore"}; 2926575fa76SShaik Ameer Basha 2933a767b35SShaik Ameer Basha PNAME(mout_sw_aclk400_isp_p) = {"dout_aclk400_isp", "mout_sclk_spll"}; 2943a767b35SShaik Ameer Basha PNAME(mout_user_aclk400_isp_p) = {"fin_pll", "mout_sw_aclk400_isp"}; 2953a767b35SShaik Ameer Basha 2963a767b35SShaik Ameer Basha PNAME(mout_sw_aclk333_432_isp0_p) = {"dout_aclk333_432_isp0", 2973a767b35SShaik Ameer Basha "mout_sclk_spll"}; 2983a767b35SShaik Ameer Basha PNAME(mout_user_aclk333_432_isp0_p) = {"fin_pll", "mout_sw_aclk333_432_isp0"}; 2993a767b35SShaik Ameer Basha 3003a767b35SShaik Ameer Basha PNAME(mout_sw_aclk333_432_isp_p) = {"dout_aclk333_432_isp", "mout_sclk_spll"}; 3013a767b35SShaik Ameer Basha PNAME(mout_user_aclk333_432_isp_p) = {"fin_pll", "mout_sw_aclk333_432_isp"}; 3021609027fSChander Kashyap 303dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_p) = {"dout_aclk200", "mout_sclk_spll"}; 304424b673aSShaik Ameer Basha PNAME(mout_user_aclk200_disp1_p) = {"fin_pll", "mout_sw_aclk200"}; 3051609027fSChander Kashyap 306dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk400_mscl_p) = {"dout_aclk400_mscl", "mout_sclk_spll"}; 307dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk400_mscl_p) = {"fin_pll", "mout_sw_aclk400_mscl"}; 3081609027fSChander Kashyap 309dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_p) = {"dout_aclk333", "mout_sclk_spll"}; 310dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_p) = {"fin_pll", "mout_sw_aclk333"}; 3111609027fSChander Kashyap 312dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk166_p) = {"dout_aclk166", "mout_sclk_spll"}; 313dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk166_p) = {"fin_pll", "mout_sw_aclk166"}; 3141609027fSChander Kashyap 315dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk266_p) = {"dout_aclk266", "mout_sclk_spll"}; 316dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk266_p) = {"fin_pll", "mout_sw_aclk266"}; 3173a767b35SShaik Ameer Basha PNAME(mout_user_aclk266_isp_p) = {"fin_pll", "mout_sw_aclk266"}; 3181609027fSChander Kashyap 319dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_432_gscl_p) = {"dout_aclk333_432_gscl", "mout_sclk_spll"}; 320dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_432_gscl_p) = {"fin_pll", "mout_sw_aclk333_432_gscl"}; 3211609027fSChander Kashyap 322dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_gscl_p) = {"dout_aclk300_gscl", "mout_sclk_spll"}; 323dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_gscl_p) = {"fin_pll", "mout_sw_aclk300_gscl"}; 3241609027fSChander Kashyap 325dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_disp1_p) = {"dout_aclk300_disp1", "mout_sclk_spll"}; 326424b673aSShaik Ameer Basha PNAME(mout_sw_aclk400_disp1_p) = {"dout_aclk400_disp1", "mout_sclk_spll"}; 327dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_disp1_p) = {"fin_pll", "mout_sw_aclk300_disp1"}; 328424b673aSShaik Ameer Basha PNAME(mout_user_aclk400_disp1_p) = {"fin_pll", "mout_sw_aclk400_disp1"}; 3291609027fSChander Kashyap 330dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_jpeg_p) = {"dout_aclk300_jpeg", "mout_sclk_spll"}; 331dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_jpeg_p) = {"fin_pll", "mout_sw_aclk300_jpeg"}; 3321609027fSChander Kashyap 333dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk_g3d_p) = {"dout_aclk_g3d", "mout_sclk_spll"}; 334dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk_g3d_p) = {"fin_pll", "mout_sw_aclk_g3d"}; 3351609027fSChander Kashyap 336dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk266_g2d_p) = {"dout_aclk266_g2d", "mout_sclk_spll"}; 337dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk266_g2d_p) = {"fin_pll", "mout_sw_aclk266_g2d"}; 3381609027fSChander Kashyap 339dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_g2d_p) = {"dout_aclk333_g2d", "mout_sclk_spll"}; 340dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_g2d_p) = {"fin_pll", "mout_sw_aclk333_g2d"}; 3411609027fSChander Kashyap 342dbd713bbSShaik Ameer Basha PNAME(mout_audio0_p) = {"fin_pll", "cdclk0", "mout_sclk_dpll", 343dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 344dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 345dbd713bbSShaik Ameer Basha PNAME(mout_audio1_p) = {"fin_pll", "cdclk1", "mout_sclk_dpll", 346dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 347dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 348dbd713bbSShaik Ameer Basha PNAME(mout_audio2_p) = {"fin_pll", "cdclk2", "mout_sclk_dpll", 349dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 350dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 351dbd713bbSShaik Ameer Basha PNAME(mout_spdif_p) = {"fin_pll", "dout_audio0", "dout_audio1", 352dbd713bbSShaik Ameer Basha "dout_audio2", "spdif_extclk", "mout_sclk_ipll", 353dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 354dbd713bbSShaik Ameer Basha PNAME(mout_hdmi_p) = {"dout_hdmi_pixel", "sclk_hdmiphy"}; 355dbd713bbSShaik Ameer Basha PNAME(mout_maudio0_p) = {"fin_pll", "maudio_clk", "mout_sclk_dpll", 356dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 357dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 35831116a64SShaik Ameer Basha PNAME(mout_mau_epll_clk_p) = {"mout_sclk_epll", "mout_sclk_dpll", 35931116a64SShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll"}; 3601609027fSChander Kashyap 3611609027fSChander Kashyap /* fixed rate clocks generated outside the soc */ 362c7306229SSachin Kamat static struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[] __initdata = { 363cba9d2faSAndrzej Hajda FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0), 3641609027fSChander Kashyap }; 3651609027fSChander Kashyap 3661609027fSChander Kashyap /* fixed rate clocks generated inside the soc */ 367c7306229SSachin Kamat static struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[] __initdata = { 368cba9d2faSAndrzej Hajda FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), 369cba9d2faSAndrzej Hajda FRATE(0, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000), 370cba9d2faSAndrzej Hajda FRATE(0, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000), 371cba9d2faSAndrzej Hajda FRATE(0, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000), 372cba9d2faSAndrzej Hajda FRATE(0, "sclk_usbh20_scan_clk", NULL, CLK_IS_ROOT, 480000000), 3731609027fSChander Kashyap }; 3741609027fSChander Kashyap 375c7306229SSachin Kamat static struct samsung_fixed_factor_clock exynos5420_fixed_factor_clks[] __initdata = { 376b31ca2a0SShaik Ameer Basha FFACTOR(0, "ff_hsic_12m", "fin_pll", 1, 2, 0), 377b31ca2a0SShaik Ameer Basha FFACTOR(0, "ff_sw_aclk66", "mout_sw_aclk66", 1, 2, 0), 3781609027fSChander Kashyap }; 3791609027fSChander Kashyap 380c7306229SSachin Kamat static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = { 381b31ca2a0SShaik Ameer Basha MUX(0, "mout_user_pclk66_gpio", mout_user_pclk66_gpio_p, 382b31ca2a0SShaik Ameer Basha SRC_TOP7, 4, 1), 383dbd713bbSShaik Ameer Basha MUX(0, "mout_mspll_kfc", mout_mspll_cpu_p, SRC_TOP7, 8, 2), 384dbd713bbSShaik Ameer Basha MUX(0, "mout_mspll_cpu", mout_mspll_cpu_p, SRC_TOP7, 12, 2), 38531116a64SShaik Ameer Basha MUX(0, "mout_mau_epll_clk", mout_mau_epll_clk_p, SRC_TOP7, 20, 2), 38631116a64SShaik Ameer Basha 387dbd713bbSShaik Ameer Basha MUX(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1), 388dbd713bbSShaik Ameer Basha MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), 389dbd713bbSShaik Ameer Basha MUX(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1), 390dbd713bbSShaik Ameer Basha MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1), 3911609027fSChander Kashyap 39258ff8d03SShaik Ameer Basha MUX(0, "sclk_bpll", mout_bpll_p, TOP_SPARE2, 0, 1), 3931609027fSChander Kashyap 3943a767b35SShaik Ameer Basha MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2), 395dbd713bbSShaik Ameer Basha MUX_A(0, "mout_aclk400_mscl", mout_group1_p, 3961609027fSChander Kashyap SRC_TOP0, 4, 2, "aclk400_mscl"), 397dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2), 398dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200_fsys2", mout_group1_p, SRC_TOP0, 12, 2), 3996575fa76SShaik Ameer Basha MUX(0, "mout_aclk400_wcore", mout_group1_p, SRC_TOP0, 16, 2), 4006575fa76SShaik Ameer Basha MUX(0, "mout_aclk100_noc", mout_group1_p, SRC_TOP0, 20, 2), 4016b5ae463SShaik Ameer Basha MUX(0, "mout_pclk200_fsys", mout_group1_p, SRC_TOP0, 24, 2), 402dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200_fsys", mout_group1_p, SRC_TOP0, 28, 2), 4031609027fSChander Kashyap 404dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk333_432_gscl", mout_group4_p, SRC_TOP1, 0, 2), 4053a767b35SShaik Ameer Basha MUX(0, "mout_aclk333_432_isp", mout_group4_p, 4063a767b35SShaik Ameer Basha SRC_TOP1, 4, 2), 407dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk66", mout_group1_p, SRC_TOP1, 8, 2), 4083a767b35SShaik Ameer Basha MUX(0, "mout_aclk333_432_isp0", mout_group4_p, SRC_TOP1, 12, 2), 409dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk266", mout_group1_p, SRC_TOP1, 20, 2), 410dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk166", mout_group1_p, SRC_TOP1, 24, 2), 411dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk333", mout_group1_p, SRC_TOP1, 28, 2), 4121609027fSChander Kashyap 413424b673aSShaik Ameer Basha MUX(0, "mout_aclk400_disp1", mout_group1_p, SRC_TOP2, 4, 2), 414dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk333_g2d", mout_group1_p, SRC_TOP2, 8, 2), 415dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk266_g2d", mout_group1_p, SRC_TOP2, 12, 2), 416dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk_g3d", mout_group5_p, SRC_TOP2, 16, 1), 417dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk300_jpeg", mout_group1_p, SRC_TOP2, 20, 2), 418dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk300_disp1", mout_group1_p, SRC_TOP2, 24, 2), 419dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk300_gscl", mout_group1_p, SRC_TOP2, 28, 2), 4201609027fSChander Kashyap 4213a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk400_isp", mout_user_aclk400_isp_p, 4223a767b35SShaik Ameer Basha SRC_TOP3, 0, 1), 423dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk400_mscl", mout_user_aclk400_mscl_p, 4241609027fSChander Kashyap SRC_TOP3, 4, 1), 425424b673aSShaik Ameer Basha MUX(0, "mout_user_aclk200_disp1", mout_user_aclk200_disp1_p, 426424b673aSShaik Ameer Basha SRC_TOP3, 8, 1), 427dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk200_fsys2", mout_user_aclk200_fsys2_p, 4281609027fSChander Kashyap SRC_TOP3, 12, 1), 4296575fa76SShaik Ameer Basha MUX(0, "mout_user_aclk400_wcore", mout_user_aclk400_wcore_p, 4306575fa76SShaik Ameer Basha SRC_TOP3, 16, 1), 4316575fa76SShaik Ameer Basha MUX(0, "mout_user_aclk100_noc", mout_user_aclk100_noc_p, 4326575fa76SShaik Ameer Basha SRC_TOP3, 20, 1), 4336b5ae463SShaik Ameer Basha MUX(0, "mout_user_pclk200_fsys", mout_user_pclk200_fsys_p, 4346b5ae463SShaik Ameer Basha SRC_TOP3, 24, 1), 435dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk200_fsys", mout_user_aclk200_fsys_p, 4361609027fSChander Kashyap SRC_TOP3, 28, 1), 4371609027fSChander Kashyap 438dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk333_432_gscl", mout_user_aclk333_432_gscl_p, 4391609027fSChander Kashyap SRC_TOP4, 0, 1), 4403a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk333_432_isp", mout_user_aclk333_432_isp_p, 4413a767b35SShaik Ameer Basha SRC_TOP4, 4, 1), 442faec151bSShaik Ameer Basha MUX(0, "mout_user_aclk66_peric", mout_user_aclk66_peric_p, 443faec151bSShaik Ameer Basha SRC_TOP4, 8, 1), 4443a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk333_432_isp0", mout_user_aclk333_432_isp0_p, 4453a767b35SShaik Ameer Basha SRC_TOP4, 12, 1), 4463a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk266_isp", mout_user_aclk266_isp_p, 4473a767b35SShaik Ameer Basha SRC_TOP4, 16, 1), 448dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk266", mout_user_aclk266_p, SRC_TOP4, 20, 1), 449dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk166", mout_user_aclk166_p, SRC_TOP4, 24, 1), 450dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk333", mout_user_aclk333_p, SRC_TOP4, 28, 1), 4511609027fSChander Kashyap 452424b673aSShaik Ameer Basha MUX(0, "mout_user_aclk400_disp1", mout_user_aclk400_disp1_p, 453424b673aSShaik Ameer Basha SRC_TOP5, 0, 1), 454faec151bSShaik Ameer Basha MUX(0, "mout_user_aclk66_psgen", mout_user_aclk66_peric_p, 455faec151bSShaik Ameer Basha SRC_TOP5, 4, 1), 4563fac5941SShaik Ameer Basha MUX(0, "mout_user_aclk333_g2d", mout_user_aclk333_g2d_p, 4573fac5941SShaik Ameer Basha SRC_TOP5, 8, 1), 4583fac5941SShaik Ameer Basha MUX(0, "mout_user_aclk266_g2d", mout_user_aclk266_g2d_p, 4593fac5941SShaik Ameer Basha SRC_TOP5, 12, 1), 4603fac5941SShaik Ameer Basha MUX(CLK_MOUT_G3D, "mout_user_aclk_g3d", mout_user_aclk_g3d_p, 4613fac5941SShaik Ameer Basha SRC_TOP5, 16, 1), 462dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_jpeg", mout_user_aclk300_jpeg_p, 4631609027fSChander Kashyap SRC_TOP5, 20, 1), 464dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_disp1", mout_user_aclk300_disp1_p, 4651609027fSChander Kashyap SRC_TOP5, 24, 1), 466dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_gscl", mout_user_aclk300_gscl_p, 4671609027fSChander Kashyap SRC_TOP5, 28, 1), 4681609027fSChander Kashyap 469dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_mpll", mout_mpll_p, SRC_TOP6, 0, 1), 470dbd713bbSShaik Ameer Basha MUX(CLK_MOUT_VPLL, "mout_sclk_vpll", mout_vpll_p, SRC_TOP6, 4, 1), 471dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_spll", mout_spll_p, SRC_TOP6, 8, 1), 472dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_ipll", mout_ipll_p, SRC_TOP6, 12, 1), 473dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_rpll", mout_rpll_p, SRC_TOP6, 16, 1), 474dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_epll", mout_epll_p, SRC_TOP6, 20, 1), 475dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_dpll", mout_dpll_p, SRC_TOP6, 24, 1), 476dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_cpll", mout_cpll_p, SRC_TOP6, 28, 1), 4771609027fSChander Kashyap 4783a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk400_isp", mout_sw_aclk400_isp_p, 4793a767b35SShaik Ameer Basha SRC_TOP10, 0, 1), 480dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk400_mscl", mout_sw_aclk400_mscl_p, 481dbd713bbSShaik Ameer Basha SRC_TOP10, 4, 1), 482dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200", mout_sw_aclk200_p, SRC_TOP10, 8, 1), 483dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200_fsys2", mout_sw_aclk200_fsys2_p, 4841609027fSChander Kashyap SRC_TOP10, 12, 1), 4856575fa76SShaik Ameer Basha MUX(0, "mout_sw_aclk400_wcore", mout_sw_aclk400_wcore_p, 4866575fa76SShaik Ameer Basha SRC_TOP10, 16, 1), 4876575fa76SShaik Ameer Basha MUX(0, "mout_sw_aclk100_noc", mout_sw_aclk100_noc_p, 4886575fa76SShaik Ameer Basha SRC_TOP10, 20, 1), 4896b5ae463SShaik Ameer Basha MUX(0, "mout_sw_pclk200_fsys", mout_sw_pclk200_fsys_p, 4906b5ae463SShaik Ameer Basha SRC_TOP10, 24, 1), 491dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200_fsys", mout_sw_aclk200_fsys_p, 492dbd713bbSShaik Ameer Basha SRC_TOP10, 28, 1), 4933a767b35SShaik Ameer Basha 494dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_gscl", mout_sw_aclk333_432_gscl_p, 4951609027fSChander Kashyap SRC_TOP11, 0, 1), 4963a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_isp", mout_sw_aclk333_432_isp_p, 4973a767b35SShaik Ameer Basha SRC_TOP11, 4, 1), 498dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk66", mout_sw_aclk66_p, SRC_TOP11, 8, 1), 4993a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_isp0", mout_sw_aclk333_432_isp0_p, 5003a767b35SShaik Ameer Basha SRC_TOP11, 12, 1), 501dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk266", mout_sw_aclk266_p, SRC_TOP11, 20, 1), 502dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk166", mout_sw_aclk166_p, SRC_TOP11, 24, 1), 503dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333", mout_sw_aclk333_p, SRC_TOP11, 28, 1), 5041609027fSChander Kashyap 505424b673aSShaik Ameer Basha MUX(0, "mout_sw_aclk400_disp1", mout_sw_aclk400_disp1_p, 506424b673aSShaik Ameer Basha SRC_TOP12, 4, 1), 507dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333_g2d", mout_sw_aclk333_g2d_p, 508dbd713bbSShaik Ameer Basha SRC_TOP12, 8, 1), 509dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk266_g2d", mout_sw_aclk266_g2d_p, 510dbd713bbSShaik Ameer Basha SRC_TOP12, 12, 1), 511dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk_g3d", mout_sw_aclk_g3d_p, SRC_TOP12, 16, 1), 512dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_jpeg", mout_sw_aclk300_jpeg_p, 513dbd713bbSShaik Ameer Basha SRC_TOP12, 20, 1), 514dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_disp1", mout_sw_aclk300_disp1_p, 5151609027fSChander Kashyap SRC_TOP12, 24, 1), 516dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_gscl", mout_sw_aclk300_gscl_p, 517dbd713bbSShaik Ameer Basha SRC_TOP12, 28, 1), 5181609027fSChander Kashyap 5191609027fSChander Kashyap /* DISP1 Block */ 520dbd713bbSShaik Ameer Basha MUX(0, "mout_fimd1", mout_group3_p, SRC_DISP10, 4, 1), 521dbd713bbSShaik Ameer Basha MUX(0, "mout_mipi1", mout_group2_p, SRC_DISP10, 16, 3), 522dbd713bbSShaik Ameer Basha MUX(0, "mout_dp1", mout_group2_p, SRC_DISP10, 20, 3), 523dbd713bbSShaik Ameer Basha MUX(0, "mout_pixel", mout_group2_p, SRC_DISP10, 24, 3), 524dbd713bbSShaik Ameer Basha MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_DISP10, 28, 1), 525424b673aSShaik Ameer Basha MUX(0, "mout_fimd1_opt", mout_group2_p, SRC_DISP10, 8, 3), 5266575fa76SShaik Ameer Basha 5276575fa76SShaik Ameer Basha MUX(0, "mout_aclk400_wcore_bpll", mout_aclk400_wcore_bpll_p, 5286575fa76SShaik Ameer Basha TOP_SPARE2, 4, 1), 529424b673aSShaik Ameer Basha MUX(0, "mout_fimd1_final", mout_fimd1_final_p, TOP_SPARE2, 8, 1), 5301609027fSChander Kashyap 5311609027fSChander Kashyap /* MAU Block */ 53231116a64SShaik Ameer Basha MUX(CLK_MOUT_MAUDIO0, "mout_maudio0", mout_maudio0_p, SRC_MAU, 28, 3), 5331609027fSChander Kashyap 5341609027fSChander Kashyap /* FSYS Block */ 535dbd713bbSShaik Ameer Basha MUX(0, "mout_usbd301", mout_group2_p, SRC_FSYS, 4, 3), 536dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc0", mout_group2_p, SRC_FSYS, 8, 3), 537dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc1", mout_group2_p, SRC_FSYS, 12, 3), 538dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc2", mout_group2_p, SRC_FSYS, 16, 3), 539dbd713bbSShaik Ameer Basha MUX(0, "mout_usbd300", mout_group2_p, SRC_FSYS, 20, 3), 540dbd713bbSShaik Ameer Basha MUX(0, "mout_unipro", mout_group2_p, SRC_FSYS, 24, 3), 5416b5ae463SShaik Ameer Basha MUX(0, "mout_mphy_refclk", mout_group2_p, SRC_FSYS, 28, 3), 5421609027fSChander Kashyap 5431609027fSChander Kashyap /* PERIC Block */ 544dbd713bbSShaik Ameer Basha MUX(0, "mout_uart0", mout_group2_p, SRC_PERIC0, 4, 3), 545dbd713bbSShaik Ameer Basha MUX(0, "mout_uart1", mout_group2_p, SRC_PERIC0, 8, 3), 546dbd713bbSShaik Ameer Basha MUX(0, "mout_uart2", mout_group2_p, SRC_PERIC0, 12, 3), 547dbd713bbSShaik Ameer Basha MUX(0, "mout_uart3", mout_group2_p, SRC_PERIC0, 16, 3), 548dbd713bbSShaik Ameer Basha MUX(0, "mout_pwm", mout_group2_p, SRC_PERIC0, 24, 3), 549dbd713bbSShaik Ameer Basha MUX(0, "mout_spdif", mout_spdif_p, SRC_PERIC0, 28, 3), 550dbd713bbSShaik Ameer Basha MUX(0, "mout_audio0", mout_audio0_p, SRC_PERIC1, 8, 3), 551dbd713bbSShaik Ameer Basha MUX(0, "mout_audio1", mout_audio1_p, SRC_PERIC1, 12, 3), 552dbd713bbSShaik Ameer Basha MUX(0, "mout_audio2", mout_audio2_p, SRC_PERIC1, 16, 3), 553dbd713bbSShaik Ameer Basha MUX(0, "mout_spi0", mout_group2_p, SRC_PERIC1, 20, 3), 554dbd713bbSShaik Ameer Basha MUX(0, "mout_spi1", mout_group2_p, SRC_PERIC1, 24, 3), 555dbd713bbSShaik Ameer Basha MUX(0, "mout_spi2", mout_group2_p, SRC_PERIC1, 28, 3), 5563a767b35SShaik Ameer Basha 5573a767b35SShaik Ameer Basha /* ISP Block */ 5583a767b35SShaik Ameer Basha MUX(0, "mout_pwm_isp", mout_group2_p, SRC_ISP, 24, 3), 5593a767b35SShaik Ameer Basha MUX(0, "mout_uart_isp", mout_group2_p, SRC_ISP, 20, 3), 5603a767b35SShaik Ameer Basha MUX(0, "mout_spi0_isp", mout_group2_p, SRC_ISP, 12, 3), 5613a767b35SShaik Ameer Basha MUX(0, "mout_spi1_isp", mout_group2_p, SRC_ISP, 16, 3), 5623a767b35SShaik Ameer Basha MUX(0, "mout_isp_sensor", mout_group2_p, SRC_ISP, 28, 3), 5631609027fSChander Kashyap }; 5641609027fSChander Kashyap 565c7306229SSachin Kamat static struct samsung_div_clock exynos5420_div_clks[] __initdata = { 566cba9d2faSAndrzej Hajda DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3), 567cba9d2faSAndrzej Hajda DIV(0, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3), 568cba9d2faSAndrzej Hajda DIV(0, "armclk2", "div_arm", DIV_CPU0, 28, 3), 569dbd713bbSShaik Ameer Basha DIV(0, "div_kfc", "mout_kfc", DIV_KFC0, 0, 3), 570cba9d2faSAndrzej Hajda DIV(0, "sclk_kpll", "mout_kpll", DIV_KFC0, 24, 3), 5711609027fSChander Kashyap 5723a767b35SShaik Ameer Basha DIV(0, "dout_aclk400_isp", "mout_aclk400_isp", DIV_TOP0, 0, 3), 573cba9d2faSAndrzej Hajda DIV(0, "dout_aclk400_mscl", "mout_aclk400_mscl", DIV_TOP0, 4, 3), 574cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200", "mout_aclk200", DIV_TOP0, 8, 3), 575cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200_fsys2", "mout_aclk200_fsys2", DIV_TOP0, 12, 3), 5766575fa76SShaik Ameer Basha DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore_bpll", 5776575fa76SShaik Ameer Basha DIV_TOP0, 16, 3), 5786575fa76SShaik Ameer Basha DIV(0, "dout_aclk100_noc", "mout_aclk100_noc", DIV_TOP0, 20, 3), 579cba9d2faSAndrzej Hajda DIV(0, "dout_pclk200_fsys", "mout_pclk200_fsys", DIV_TOP0, 24, 3), 580cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200_fsys", "mout_aclk200_fsys", DIV_TOP0, 28, 3), 5811609027fSChander Kashyap 582cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333_432_gscl", "mout_aclk333_432_gscl", 5831609027fSChander Kashyap DIV_TOP1, 0, 3), 5843a767b35SShaik Ameer Basha DIV(0, "dout_aclk333_432_isp", "mout_aclk333_432_isp", 5853a767b35SShaik Ameer Basha DIV_TOP1, 4, 3), 586cba9d2faSAndrzej Hajda DIV(0, "dout_aclk66", "mout_aclk66", DIV_TOP1, 8, 6), 5873a767b35SShaik Ameer Basha DIV(0, "dout_aclk333_432_isp0", "mout_aclk333_432_isp0", 5883a767b35SShaik Ameer Basha DIV_TOP1, 16, 3), 589cba9d2faSAndrzej Hajda DIV(0, "dout_aclk266", "mout_aclk266", DIV_TOP1, 20, 3), 590cba9d2faSAndrzej Hajda DIV(0, "dout_aclk166", "mout_aclk166", DIV_TOP1, 24, 3), 591cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333", "mout_aclk333", DIV_TOP1, 28, 3), 5921609027fSChander Kashyap 593cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333_g2d", "mout_aclk333_g2d", DIV_TOP2, 8, 3), 594cba9d2faSAndrzej Hajda DIV(0, "dout_aclk266_g2d", "mout_aclk266_g2d", DIV_TOP2, 12, 3), 595cba9d2faSAndrzej Hajda DIV(0, "dout_aclk_g3d", "mout_aclk_g3d", DIV_TOP2, 16, 3), 596cba9d2faSAndrzej Hajda DIV(0, "dout_aclk300_jpeg", "mout_aclk300_jpeg", DIV_TOP2, 20, 3), 597424b673aSShaik Ameer Basha DIV(0, "dout_aclk300_disp1", "mout_aclk300_disp1", DIV_TOP2, 24, 3), 598cba9d2faSAndrzej Hajda DIV(0, "dout_aclk300_gscl", "mout_aclk300_gscl", DIV_TOP2, 28, 3), 5991609027fSChander Kashyap 6001609027fSChander Kashyap /* DISP1 Block */ 601424b673aSShaik Ameer Basha DIV(0, "dout_fimd1", "mout_fimd1_final", DIV_DISP10, 0, 4), 602cba9d2faSAndrzej Hajda DIV(0, "dout_mipi1", "mout_mipi1", DIV_DISP10, 16, 8), 603cba9d2faSAndrzej Hajda DIV(0, "dout_dp1", "mout_dp1", DIV_DISP10, 24, 4), 604cba9d2faSAndrzej Hajda DIV(CLK_DOUT_PIXEL, "dout_hdmi_pixel", "mout_pixel", DIV_DISP10, 28, 4), 605424b673aSShaik Ameer Basha DIV(0, "dout_disp1_blk", "aclk200_disp1", DIV2_RATIO0, 16, 2), 606424b673aSShaik Ameer Basha DIV(0, "dout_aclk400_disp1", "mout_aclk400_disp1", DIV_TOP2, 4, 3), 6071609027fSChander Kashyap 6081609027fSChander Kashyap /* Audio Block */ 609cba9d2faSAndrzej Hajda DIV(0, "dout_maudio0", "mout_maudio0", DIV_MAU, 20, 4), 610cba9d2faSAndrzej Hajda DIV(0, "dout_maupcm0", "dout_maudio0", DIV_MAU, 24, 8), 6111609027fSChander Kashyap 6121609027fSChander Kashyap /* USB3.0 */ 613cba9d2faSAndrzej Hajda DIV(0, "dout_usbphy301", "mout_usbd301", DIV_FSYS0, 12, 4), 614cba9d2faSAndrzej Hajda DIV(0, "dout_usbphy300", "mout_usbd300", DIV_FSYS0, 16, 4), 615cba9d2faSAndrzej Hajda DIV(0, "dout_usbd301", "mout_usbd301", DIV_FSYS0, 20, 4), 616cba9d2faSAndrzej Hajda DIV(0, "dout_usbd300", "mout_usbd300", DIV_FSYS0, 24, 4), 6171609027fSChander Kashyap 6181609027fSChander Kashyap /* MMC */ 619cba9d2faSAndrzej Hajda DIV(0, "dout_mmc0", "mout_mmc0", DIV_FSYS1, 0, 10), 620cba9d2faSAndrzej Hajda DIV(0, "dout_mmc1", "mout_mmc1", DIV_FSYS1, 10, 10), 621cba9d2faSAndrzej Hajda DIV(0, "dout_mmc2", "mout_mmc2", DIV_FSYS1, 20, 10), 6221609027fSChander Kashyap 623cba9d2faSAndrzej Hajda DIV(0, "dout_unipro", "mout_unipro", DIV_FSYS2, 24, 8), 6246b5ae463SShaik Ameer Basha DIV(0, "dout_mphy_refclk", "mout_mphy_refclk", DIV_FSYS2, 16, 8), 6251609027fSChander Kashyap 6261609027fSChander Kashyap /* UART and PWM */ 627cba9d2faSAndrzej Hajda DIV(0, "dout_uart0", "mout_uart0", DIV_PERIC0, 8, 4), 628cba9d2faSAndrzej Hajda DIV(0, "dout_uart1", "mout_uart1", DIV_PERIC0, 12, 4), 629cba9d2faSAndrzej Hajda DIV(0, "dout_uart2", "mout_uart2", DIV_PERIC0, 16, 4), 630cba9d2faSAndrzej Hajda DIV(0, "dout_uart3", "mout_uart3", DIV_PERIC0, 20, 4), 631cba9d2faSAndrzej Hajda DIV(0, "dout_pwm", "mout_pwm", DIV_PERIC0, 28, 4), 6321609027fSChander Kashyap 6331609027fSChander Kashyap /* SPI */ 634cba9d2faSAndrzej Hajda DIV(0, "dout_spi0", "mout_spi0", DIV_PERIC1, 20, 4), 635cba9d2faSAndrzej Hajda DIV(0, "dout_spi1", "mout_spi1", DIV_PERIC1, 24, 4), 636cba9d2faSAndrzej Hajda DIV(0, "dout_spi2", "mout_spi2", DIV_PERIC1, 28, 4), 6371609027fSChander Kashyap 6381d87db4dSShaik Ameer Basha /* Mfc Block */ 6391d87db4dSShaik Ameer Basha DIV(0, "dout_mfc_blk", "mout_user_aclk333", DIV4_RATIO, 0, 2), 6401d87db4dSShaik Ameer Basha 6411609027fSChander Kashyap /* PCM */ 642cba9d2faSAndrzej Hajda DIV(0, "dout_pcm1", "dout_audio1", DIV_PERIC2, 16, 8), 643cba9d2faSAndrzej Hajda DIV(0, "dout_pcm2", "dout_audio2", DIV_PERIC2, 24, 8), 6441609027fSChander Kashyap 6451609027fSChander Kashyap /* Audio - I2S */ 646cba9d2faSAndrzej Hajda DIV(0, "dout_i2s1", "dout_audio1", DIV_PERIC3, 6, 6), 647cba9d2faSAndrzej Hajda DIV(0, "dout_i2s2", "dout_audio2", DIV_PERIC3, 12, 6), 648cba9d2faSAndrzej Hajda DIV(0, "dout_audio0", "mout_audio0", DIV_PERIC3, 20, 4), 649cba9d2faSAndrzej Hajda DIV(0, "dout_audio1", "mout_audio1", DIV_PERIC3, 24, 4), 650cba9d2faSAndrzej Hajda DIV(0, "dout_audio2", "mout_audio2", DIV_PERIC3, 28, 4), 6511609027fSChander Kashyap 6521609027fSChander Kashyap /* SPI Pre-Ratio */ 653faec151bSShaik Ameer Basha DIV(0, "dout_spi0_pre", "dout_spi0", DIV_PERIC4, 8, 8), 654faec151bSShaik Ameer Basha DIV(0, "dout_spi1_pre", "dout_spi1", DIV_PERIC4, 16, 8), 655faec151bSShaik Ameer Basha DIV(0, "dout_spi2_pre", "dout_spi2", DIV_PERIC4, 24, 8), 6563a767b35SShaik Ameer Basha 65702932381SShaik Ameer Basha /* GSCL Block */ 65802932381SShaik Ameer Basha DIV(0, "dout_gscl_blk_300", "mout_user_aclk300_gscl", 65902932381SShaik Ameer Basha DIV2_RATIO0, 4, 2), 66002932381SShaik Ameer Basha DIV(0, "dout_gscl_blk_333", "aclk333_432_gscl", DIV2_RATIO0, 6, 2), 66102932381SShaik Ameer Basha 6624549d93dSShaik Ameer Basha /* MSCL Block */ 6634549d93dSShaik Ameer Basha DIV(0, "dout_mscl_blk", "aclk400_mscl", DIV2_RATIO0, 28, 2), 6644549d93dSShaik Ameer Basha 6650a22c306SShaik Ameer Basha /* PSGEN */ 6660a22c306SShaik Ameer Basha DIV(0, "dout_gen_blk", "mout_user_aclk266", DIV2_RATIO0, 8, 1), 6670a22c306SShaik Ameer Basha DIV(0, "dout_jpg_blk", "aclk166", DIV2_RATIO0, 20, 1), 6680a22c306SShaik Ameer Basha 6693a767b35SShaik Ameer Basha /* ISP Block */ 6703a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor0", "mout_isp_sensor", SCLK_DIV_ISP0, 8, 8), 6713a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor1", "mout_isp_sensor", SCLK_DIV_ISP0, 16, 8), 6723a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor2", "mout_isp_sensor", SCLK_DIV_ISP0, 24, 8), 6733a767b35SShaik Ameer Basha DIV(0, "dout_pwm_isp", "mout_pwm_isp", SCLK_DIV_ISP1, 28, 4), 6743a767b35SShaik Ameer Basha DIV(0, "dout_uart_isp", "mout_uart_isp", SCLK_DIV_ISP1, 24, 4), 6753a767b35SShaik Ameer Basha DIV(0, "dout_spi0_isp", "mout_spi0_isp", SCLK_DIV_ISP1, 16, 4), 6763a767b35SShaik Ameer Basha DIV(0, "dout_spi1_isp", "mout_spi1_isp", SCLK_DIV_ISP1, 20, 4), 6773a767b35SShaik Ameer Basha DIV_F(0, "dout_spi0_isp_pre", "dout_spi0_isp", SCLK_DIV_ISP1, 0, 8, 6783a767b35SShaik Ameer Basha CLK_SET_RATE_PARENT, 0), 6793a767b35SShaik Ameer Basha DIV_F(0, "dout_spi1_isp_pre", "dout_spi1_isp", SCLK_DIV_ISP1, 8, 8, 6803a767b35SShaik Ameer Basha CLK_SET_RATE_PARENT, 0), 6811609027fSChander Kashyap }; 6821609027fSChander Kashyap 683c7306229SSachin Kamat static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { 6845b73721bSNaveen Krishna Chatradhi /* G2D */ 6853fac5941SShaik Ameer Basha GATE(CLK_MDMA0, "mdma0", "aclk266_g2d", GATE_IP_G2D, 1, 0, 0), 6865b73721bSNaveen Krishna Chatradhi GATE(CLK_SSS, "sss", "aclk266_g2d", GATE_IP_G2D, 2, 0, 0), 6873fac5941SShaik Ameer Basha GATE(CLK_G2D, "g2d", "aclk333_g2d", GATE_IP_G2D, 3, 0, 0), 6883fac5941SShaik Ameer Basha GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "aclk266_g2d", GATE_IP_G2D, 5, 0, 0), 6893fac5941SShaik Ameer Basha GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk333_g2d", GATE_IP_G2D, 7, 0, 0), 6905b73721bSNaveen Krishna Chatradhi 6911609027fSChander Kashyap GATE(0, "aclk200_fsys", "mout_user_aclk200_fsys", 6921609027fSChander Kashyap GATE_BUS_FSYS0, 9, CLK_IGNORE_UNUSED, 0), 6931609027fSChander Kashyap GATE(0, "aclk200_fsys2", "mout_user_aclk200_fsys2", 6941609027fSChander Kashyap GATE_BUS_FSYS0, 10, CLK_IGNORE_UNUSED, 0), 6951609027fSChander Kashyap 6961609027fSChander Kashyap GATE(0, "aclk333_g2d", "mout_user_aclk333_g2d", 6971609027fSChander Kashyap GATE_BUS_TOP, 0, CLK_IGNORE_UNUSED, 0), 6981609027fSChander Kashyap GATE(0, "aclk266_g2d", "mout_user_aclk266_g2d", 6991609027fSChander Kashyap GATE_BUS_TOP, 1, CLK_IGNORE_UNUSED, 0), 7001609027fSChander Kashyap GATE(0, "aclk300_jpeg", "mout_user_aclk300_jpeg", 7011609027fSChander Kashyap GATE_BUS_TOP, 4, CLK_IGNORE_UNUSED, 0), 7023a767b35SShaik Ameer Basha GATE(0, "aclk333_432_isp0", "mout_user_aclk333_432_isp0", 7033a767b35SShaik Ameer Basha GATE_BUS_TOP, 5, 0, 0), 7041609027fSChander Kashyap GATE(0, "aclk300_gscl", "mout_user_aclk300_gscl", 7051609027fSChander Kashyap GATE_BUS_TOP, 6, CLK_IGNORE_UNUSED, 0), 7061609027fSChander Kashyap GATE(0, "aclk333_432_gscl", "mout_user_aclk333_432_gscl", 7071609027fSChander Kashyap GATE_BUS_TOP, 7, CLK_IGNORE_UNUSED, 0), 7083a767b35SShaik Ameer Basha GATE(0, "aclk333_432_isp", "mout_user_aclk333_432_isp", 7093a767b35SShaik Ameer Basha GATE_BUS_TOP, 8, 0, 0), 710b31ca2a0SShaik Ameer Basha GATE(CLK_PCLK66_GPIO, "pclk66_gpio", "mout_user_pclk66_gpio", 7111609027fSChander Kashyap GATE_BUS_TOP, 9, CLK_IGNORE_UNUSED, 0), 712faec151bSShaik Ameer Basha GATE(0, "aclk66_psgen", "mout_user_aclk66_psgen", 7131609027fSChander Kashyap GATE_BUS_TOP, 10, CLK_IGNORE_UNUSED, 0), 714faec151bSShaik Ameer Basha GATE(CLK_ACLK66_PERIC, "aclk66_peric", "mout_user_aclk66_peric", 715faec151bSShaik Ameer Basha GATE_BUS_TOP, 11, CLK_IGNORE_UNUSED, 0), 7163a767b35SShaik Ameer Basha GATE(0, "aclk266_isp", "mout_user_aclk266_isp", 7173a767b35SShaik Ameer Basha GATE_BUS_TOP, 13, 0, 0), 7181609027fSChander Kashyap GATE(0, "aclk166", "mout_user_aclk166", 7191609027fSChander Kashyap GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), 7201609027fSChander Kashyap GATE(0, "aclk333", "mout_aclk333", 7211609027fSChander Kashyap GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), 7223a767b35SShaik Ameer Basha GATE(0, "aclk400_isp", "mout_user_aclk400_isp", 7233a767b35SShaik Ameer Basha GATE_BUS_TOP, 16, 0, 0), 72402932381SShaik Ameer Basha GATE(0, "aclk400_mscl", "mout_user_aclk400_mscl", 72502932381SShaik Ameer Basha GATE_BUS_TOP, 17, 0, 0), 726424b673aSShaik Ameer Basha GATE(0, "aclk200_disp1", "mout_user_aclk200_disp1", 727424b673aSShaik Ameer Basha GATE_BUS_TOP, 18, 0, 0), 728b31ca2a0SShaik Ameer Basha GATE(CLK_SCLK_MPHY_IXTAL24, "sclk_mphy_ixtal24", "mphy_refclk_ixtal24", 729b31ca2a0SShaik Ameer Basha GATE_BUS_TOP, 28, 0, 0), 730b31ca2a0SShaik Ameer Basha GATE(CLK_SCLK_HSIC_12M, "sclk_hsic_12m", "ff_hsic_12m", 731b31ca2a0SShaik Ameer Basha GATE_BUS_TOP, 29, 0, 0), 732424b673aSShaik Ameer Basha 733424b673aSShaik Ameer Basha GATE(0, "aclk300_disp1", "mout_user_aclk300_disp1", 734424b673aSShaik Ameer Basha SRC_MASK_TOP2, 24, 0, 0), 7351609027fSChander Kashyap 73631116a64SShaik Ameer Basha GATE(CLK_MAU_EPLL, "mau_epll", "mout_mau_epll_clk", 73731116a64SShaik Ameer Basha SRC_MASK_TOP7, 20, 0, 0), 73831116a64SShaik Ameer Basha 7391609027fSChander Kashyap /* sclk */ 740cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART0, "sclk_uart0", "dout_uart0", 7411609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 0, CLK_SET_RATE_PARENT, 0), 742cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART1, "sclk_uart1", "dout_uart1", 7431609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 1, CLK_SET_RATE_PARENT, 0), 744cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_uart2", 7451609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 2, CLK_SET_RATE_PARENT, 0), 746cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART3, "sclk_uart3", "dout_uart3", 7471609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 3, CLK_SET_RATE_PARENT, 0), 748faec151bSShaik Ameer Basha GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_spi0_pre", 7491609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 6, CLK_SET_RATE_PARENT, 0), 750faec151bSShaik Ameer Basha GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_spi1_pre", 7511609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 7, CLK_SET_RATE_PARENT, 0), 752faec151bSShaik Ameer Basha GATE(CLK_SCLK_SPI2, "sclk_spi2", "dout_spi2_pre", 7531609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 8, CLK_SET_RATE_PARENT, 0), 754cba9d2faSAndrzej Hajda GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif", 7551609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 9, CLK_SET_RATE_PARENT, 0), 756cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PWM, "sclk_pwm", "dout_pwm", 7571609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0), 758cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PCM1, "sclk_pcm1", "dout_pcm1", 7591609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 15, CLK_SET_RATE_PARENT, 0), 760cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PCM2, "sclk_pcm2", "dout_pcm2", 7611609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 16, CLK_SET_RATE_PARENT, 0), 762cba9d2faSAndrzej Hajda GATE(CLK_SCLK_I2S1, "sclk_i2s1", "dout_i2s1", 7631609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 17, CLK_SET_RATE_PARENT, 0), 764cba9d2faSAndrzej Hajda GATE(CLK_SCLK_I2S2, "sclk_i2s2", "dout_i2s2", 7651609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 18, CLK_SET_RATE_PARENT, 0), 7661609027fSChander Kashyap 767cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_mmc0", 7681609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 0, CLK_SET_RATE_PARENT, 0), 769cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_mmc1", 7701609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 1, CLK_SET_RATE_PARENT, 0), 771cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_mmc2", 7721609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 2, CLK_SET_RATE_PARENT, 0), 773cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBPHY301, "sclk_usbphy301", "dout_usbphy301", 7741609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 7, CLK_SET_RATE_PARENT, 0), 775cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBPHY300, "sclk_usbphy300", "dout_usbphy300", 7761609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 8, CLK_SET_RATE_PARENT, 0), 777cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBD300, "sclk_usbd300", "dout_usbd300", 7781609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 9, CLK_SET_RATE_PARENT, 0), 779cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBD301, "sclk_usbd301", "dout_usbd301", 7801609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 10, CLK_SET_RATE_PARENT, 0), 7811609027fSChander Kashyap 7821609027fSChander Kashyap /* Display */ 783cba9d2faSAndrzej Hajda GATE(CLK_SCLK_FIMD1, "sclk_fimd1", "dout_fimd1", 7841609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 0, CLK_SET_RATE_PARENT, 0), 785cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MIPI1, "sclk_mipi1", "dout_mipi1", 7861609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 3, CLK_SET_RATE_PARENT, 0), 787cba9d2faSAndrzej Hajda GATE(CLK_SCLK_HDMI, "sclk_hdmi", "mout_hdmi", 788424b673aSShaik Ameer Basha GATE_TOP_SCLK_DISP1, 9, 0, 0), 789cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PIXEL, "sclk_pixel", "dout_hdmi_pixel", 7901609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 10, CLK_SET_RATE_PARENT, 0), 791cba9d2faSAndrzej Hajda GATE(CLK_SCLK_DP1, "sclk_dp1", "dout_dp1", 7921609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 20, CLK_SET_RATE_PARENT, 0), 7931609027fSChander Kashyap 7941609027fSChander Kashyap /* Maudio Block */ 795cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MAUDIO0, "sclk_maudio0", "dout_maudio0", 7961609027fSChander Kashyap GATE_TOP_SCLK_MAU, 0, CLK_SET_RATE_PARENT, 0), 797cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MAUPCM0, "sclk_maupcm0", "dout_maupcm0", 7981609027fSChander Kashyap GATE_TOP_SCLK_MAU, 1, CLK_SET_RATE_PARENT, 0), 7996b5ae463SShaik Ameer Basha 8006b5ae463SShaik Ameer Basha /* FSYS Block */ 801cba9d2faSAndrzej Hajda GATE(CLK_TSI, "tsi", "aclk200_fsys", GATE_BUS_FSYS0, 0, 0, 0), 802cba9d2faSAndrzej Hajda GATE(CLK_PDMA0, "pdma0", "aclk200_fsys", GATE_BUS_FSYS0, 1, 0, 0), 803cba9d2faSAndrzej Hajda GATE(CLK_PDMA1, "pdma1", "aclk200_fsys", GATE_BUS_FSYS0, 2, 0, 0), 804cba9d2faSAndrzej Hajda GATE(CLK_UFS, "ufs", "aclk200_fsys2", GATE_BUS_FSYS0, 3, 0, 0), 8056b5ae463SShaik Ameer Basha GATE(CLK_RTIC, "rtic", "aclk200_fsys", GATE_IP_FSYS, 9, 0, 0), 8066b5ae463SShaik Ameer Basha GATE(CLK_MMC0, "mmc0", "aclk200_fsys2", GATE_IP_FSYS, 12, 0, 0), 8076b5ae463SShaik Ameer Basha GATE(CLK_MMC1, "mmc1", "aclk200_fsys2", GATE_IP_FSYS, 13, 0, 0), 8086b5ae463SShaik Ameer Basha GATE(CLK_MMC2, "mmc2", "aclk200_fsys2", GATE_IP_FSYS, 14, 0, 0), 809cba9d2faSAndrzej Hajda GATE(CLK_SROMC, "sromc", "aclk200_fsys2", 8106b5ae463SShaik Ameer Basha GATE_IP_FSYS, 17, CLK_IGNORE_UNUSED, 0), 8116b5ae463SShaik Ameer Basha GATE(CLK_USBH20, "usbh20", "aclk200_fsys", GATE_IP_FSYS, 18, 0, 0), 8126b5ae463SShaik Ameer Basha GATE(CLK_USBD300, "usbd300", "aclk200_fsys", GATE_IP_FSYS, 19, 0, 0), 8136b5ae463SShaik Ameer Basha GATE(CLK_USBD301, "usbd301", "aclk200_fsys", GATE_IP_FSYS, 20, 0, 0), 8146b5ae463SShaik Ameer Basha GATE(CLK_SCLK_UNIPRO, "sclk_unipro", "dout_unipro", 8156b5ae463SShaik Ameer Basha SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0), 8161609027fSChander Kashyap 817faec151bSShaik Ameer Basha /* PERIC Block */ 818faec151bSShaik Ameer Basha GATE(CLK_UART0, "uart0", "aclk66_peric", GATE_IP_PERIC, 0, 0, 0), 819faec151bSShaik Ameer Basha GATE(CLK_UART1, "uart1", "aclk66_peric", GATE_IP_PERIC, 1, 0, 0), 820faec151bSShaik Ameer Basha GATE(CLK_UART2, "uart2", "aclk66_peric", GATE_IP_PERIC, 2, 0, 0), 821faec151bSShaik Ameer Basha GATE(CLK_UART3, "uart3", "aclk66_peric", GATE_IP_PERIC, 3, 0, 0), 822faec151bSShaik Ameer Basha GATE(CLK_I2C0, "i2c0", "aclk66_peric", GATE_IP_PERIC, 6, 0, 0), 823faec151bSShaik Ameer Basha GATE(CLK_I2C1, "i2c1", "aclk66_peric", GATE_IP_PERIC, 7, 0, 0), 824faec151bSShaik Ameer Basha GATE(CLK_I2C2, "i2c2", "aclk66_peric", GATE_IP_PERIC, 8, 0, 0), 825faec151bSShaik Ameer Basha GATE(CLK_I2C3, "i2c3", "aclk66_peric", GATE_IP_PERIC, 9, 0, 0), 826faec151bSShaik Ameer Basha GATE(CLK_USI0, "usi0", "aclk66_peric", GATE_IP_PERIC, 10, 0, 0), 827faec151bSShaik Ameer Basha GATE(CLK_USI1, "usi1", "aclk66_peric", GATE_IP_PERIC, 11, 0, 0), 828faec151bSShaik Ameer Basha GATE(CLK_USI2, "usi2", "aclk66_peric", GATE_IP_PERIC, 12, 0, 0), 829faec151bSShaik Ameer Basha GATE(CLK_USI3, "usi3", "aclk66_peric", GATE_IP_PERIC, 13, 0, 0), 830faec151bSShaik Ameer Basha GATE(CLK_I2C_HDMI, "i2c_hdmi", "aclk66_peric", GATE_IP_PERIC, 14, 0, 0), 831faec151bSShaik Ameer Basha GATE(CLK_TSADC, "tsadc", "aclk66_peric", GATE_IP_PERIC, 15, 0, 0), 832faec151bSShaik Ameer Basha GATE(CLK_SPI0, "spi0", "aclk66_peric", GATE_IP_PERIC, 16, 0, 0), 833faec151bSShaik Ameer Basha GATE(CLK_SPI1, "spi1", "aclk66_peric", GATE_IP_PERIC, 17, 0, 0), 834faec151bSShaik Ameer Basha GATE(CLK_SPI2, "spi2", "aclk66_peric", GATE_IP_PERIC, 18, 0, 0), 835faec151bSShaik Ameer Basha GATE(CLK_I2S1, "i2s1", "aclk66_peric", GATE_IP_PERIC, 20, 0, 0), 836faec151bSShaik Ameer Basha GATE(CLK_I2S2, "i2s2", "aclk66_peric", GATE_IP_PERIC, 21, 0, 0), 837faec151bSShaik Ameer Basha GATE(CLK_PCM1, "pcm1", "aclk66_peric", GATE_IP_PERIC, 22, 0, 0), 838faec151bSShaik Ameer Basha GATE(CLK_PCM2, "pcm2", "aclk66_peric", GATE_IP_PERIC, 23, 0, 0), 839faec151bSShaik Ameer Basha GATE(CLK_PWM, "pwm", "aclk66_peric", GATE_IP_PERIC, 24, 0, 0), 840faec151bSShaik Ameer Basha GATE(CLK_SPDIF, "spdif", "aclk66_peric", GATE_IP_PERIC, 26, 0, 0), 841faec151bSShaik Ameer Basha GATE(CLK_USI4, "usi4", "aclk66_peric", GATE_IP_PERIC, 28, 0, 0), 842faec151bSShaik Ameer Basha GATE(CLK_USI5, "usi5", "aclk66_peric", GATE_IP_PERIC, 30, 0, 0), 843faec151bSShaik Ameer Basha GATE(CLK_USI6, "usi6", "aclk66_peric", GATE_IP_PERIC, 31, 0, 0), 8441609027fSChander Kashyap 845faec151bSShaik Ameer Basha GATE(CLK_KEYIF, "keyif", "aclk66_peric", GATE_BUS_PERIC, 22, 0, 0), 8461609027fSChander Kashyap 8470a22c306SShaik Ameer Basha /* PERIS Block */ 848cba9d2faSAndrzej Hajda GATE(CLK_CHIPID, "chipid", "aclk66_psgen", 8490a22c306SShaik Ameer Basha GATE_IP_PERIS, 0, CLK_IGNORE_UNUSED, 0), 850cba9d2faSAndrzej Hajda GATE(CLK_SYSREG, "sysreg", "aclk66_psgen", 8510a22c306SShaik Ameer Basha GATE_IP_PERIS, 1, CLK_IGNORE_UNUSED, 0), 8520a22c306SShaik Ameer Basha GATE(CLK_TZPC0, "tzpc0", "aclk66_psgen", GATE_IP_PERIS, 6, 0, 0), 8530a22c306SShaik Ameer Basha GATE(CLK_TZPC1, "tzpc1", "aclk66_psgen", GATE_IP_PERIS, 7, 0, 0), 8540a22c306SShaik Ameer Basha GATE(CLK_TZPC2, "tzpc2", "aclk66_psgen", GATE_IP_PERIS, 8, 0, 0), 8550a22c306SShaik Ameer Basha GATE(CLK_TZPC3, "tzpc3", "aclk66_psgen", GATE_IP_PERIS, 9, 0, 0), 8560a22c306SShaik Ameer Basha GATE(CLK_TZPC4, "tzpc4", "aclk66_psgen", GATE_IP_PERIS, 10, 0, 0), 8570a22c306SShaik Ameer Basha GATE(CLK_TZPC5, "tzpc5", "aclk66_psgen", GATE_IP_PERIS, 11, 0, 0), 8580a22c306SShaik Ameer Basha GATE(CLK_TZPC6, "tzpc6", "aclk66_psgen", GATE_IP_PERIS, 12, 0, 0), 8590a22c306SShaik Ameer Basha GATE(CLK_TZPC7, "tzpc7", "aclk66_psgen", GATE_IP_PERIS, 13, 0, 0), 8600a22c306SShaik Ameer Basha GATE(CLK_TZPC8, "tzpc8", "aclk66_psgen", GATE_IP_PERIS, 14, 0, 0), 8610a22c306SShaik Ameer Basha GATE(CLK_TZPC9, "tzpc9", "aclk66_psgen", GATE_IP_PERIS, 15, 0, 0), 8620a22c306SShaik Ameer Basha GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk66_psgen", GATE_IP_PERIS, 16, 0, 0), 8630a22c306SShaik Ameer Basha GATE(CLK_MCT, "mct", "aclk66_psgen", GATE_IP_PERIS, 18, 0, 0), 8640a22c306SShaik Ameer Basha GATE(CLK_WDT, "wdt", "aclk66_psgen", GATE_IP_PERIS, 19, 0, 0), 8650a22c306SShaik Ameer Basha GATE(CLK_RTC, "rtc", "aclk66_psgen", GATE_IP_PERIS, 20, 0, 0), 8660a22c306SShaik Ameer Basha GATE(CLK_TMU, "tmu", "aclk66_psgen", GATE_IP_PERIS, 21, 0, 0), 8670a22c306SShaik Ameer Basha GATE(CLK_TMU_GPU, "tmu_gpu", "aclk66_psgen", GATE_IP_PERIS, 22, 0, 0), 8681609027fSChander Kashyap 869cba9d2faSAndrzej Hajda GATE(CLK_SECKEY, "seckey", "aclk66_psgen", GATE_BUS_PERIS1, 1, 0, 0), 8700a22c306SShaik Ameer Basha 8710a22c306SShaik Ameer Basha /* GEN Block */ 8720a22c306SShaik Ameer Basha GATE(CLK_ROTATOR, "rotator", "mout_user_aclk266", GATE_IP_GEN, 1, 0, 0), 8730a22c306SShaik Ameer Basha GATE(CLK_JPEG, "jpeg", "aclk300_jpeg", GATE_IP_GEN, 2, 0, 0), 8740a22c306SShaik Ameer Basha GATE(CLK_JPEG2, "jpeg2", "aclk300_jpeg", GATE_IP_GEN, 3, 0, 0), 8750a22c306SShaik Ameer Basha GATE(CLK_MDMA1, "mdma1", "mout_user_aclk266", GATE_IP_GEN, 4, 0, 0), 8760a22c306SShaik Ameer Basha GATE(CLK_TOP_RTC, "top_rtc", "aclk66_psgen", GATE_IP_GEN, 5, 0, 0), 8770a22c306SShaik Ameer Basha GATE(CLK_SMMU_ROTATOR, "smmu_rotator", "dout_gen_blk", 8780a22c306SShaik Ameer Basha GATE_IP_GEN, 6, 0, 0), 8790a22c306SShaik Ameer Basha GATE(CLK_SMMU_JPEG, "smmu_jpeg", "dout_jpg_blk", GATE_IP_GEN, 7, 0, 0), 8800a22c306SShaik Ameer Basha GATE(CLK_SMMU_MDMA1, "smmu_mdma1", "dout_gen_blk", 8810a22c306SShaik Ameer Basha GATE_IP_GEN, 9, 0, 0), 8820a22c306SShaik Ameer Basha 8830a22c306SShaik Ameer Basha /* GATE_IP_GEN doesn't list gates for smmu_jpeg2 and mc */ 8840a22c306SShaik Ameer Basha GATE(CLK_SMMU_JPEG2, "smmu_jpeg2", "dout_jpg_blk", 8850a22c306SShaik Ameer Basha GATE_BUS_GEN, 28, 0, 0), 8860a22c306SShaik Ameer Basha GATE(CLK_MC, "mc", "aclk66_psgen", GATE_BUS_GEN, 12, 0, 0), 8871609027fSChander Kashyap 88802932381SShaik Ameer Basha /* GSCL Block */ 88902932381SShaik Ameer Basha GATE(CLK_SCLK_GSCL_WA, "sclk_gscl_wa", "mout_user_aclk333_432_gscl", 89002932381SShaik Ameer Basha GATE_TOP_SCLK_GSCL, 6, 0, 0), 89102932381SShaik Ameer Basha GATE(CLK_SCLK_GSCL_WB, "sclk_gscl_wb", "mout_user_aclk333_432_gscl", 89202932381SShaik Ameer Basha GATE_TOP_SCLK_GSCL, 7, 0, 0), 89302932381SShaik Ameer Basha 894cba9d2faSAndrzej Hajda GATE(CLK_GSCL0, "gscl0", "aclk300_gscl", GATE_IP_GSCL0, 0, 0, 0), 895cba9d2faSAndrzej Hajda GATE(CLK_GSCL1, "gscl1", "aclk300_gscl", GATE_IP_GSCL0, 1, 0, 0), 89602932381SShaik Ameer Basha GATE(CLK_FIMC_3AA, "fimc_3aa", "aclk333_432_gscl", 89702932381SShaik Ameer Basha GATE_IP_GSCL0, 4, 0, 0), 89802932381SShaik Ameer Basha GATE(CLK_FIMC_LITE0, "fimc_lite0", "aclk333_432_gscl", 89902932381SShaik Ameer Basha GATE_IP_GSCL0, 5, 0, 0), 90002932381SShaik Ameer Basha GATE(CLK_FIMC_LITE1, "fimc_lite1", "aclk333_432_gscl", 90102932381SShaik Ameer Basha GATE_IP_GSCL0, 6, 0, 0), 9021609027fSChander Kashyap 90302932381SShaik Ameer Basha GATE(CLK_SMMU_3AA, "smmu_3aa", "dout_gscl_blk_333", 90402932381SShaik Ameer Basha GATE_IP_GSCL1, 2, 0, 0), 90502932381SShaik Ameer Basha GATE(CLK_SMMU_FIMCL0, "smmu_fimcl0", "dout_gscl_blk_333", 9061609027fSChander Kashyap GATE_IP_GSCL1, 3, 0, 0), 90702932381SShaik Ameer Basha GATE(CLK_SMMU_FIMCL1, "smmu_fimcl1", "dout_gscl_blk_333", 9081609027fSChander Kashyap GATE_IP_GSCL1, 4, 0, 0), 90902932381SShaik Ameer Basha GATE(CLK_SMMU_GSCL0, "smmu_gscl0", "dout_gscl_blk_300", 91002932381SShaik Ameer Basha GATE_IP_GSCL1, 6, 0, 0), 91102932381SShaik Ameer Basha GATE(CLK_SMMU_GSCL1, "smmu_gscl1", "dout_gscl_blk_300", 91202932381SShaik Ameer Basha GATE_IP_GSCL1, 7, 0, 0), 91302932381SShaik Ameer Basha GATE(CLK_GSCL_WA, "gscl_wa", "sclk_gscl_wa", GATE_IP_GSCL1, 12, 0, 0), 91402932381SShaik Ameer Basha GATE(CLK_GSCL_WB, "gscl_wb", "sclk_gscl_wb", GATE_IP_GSCL1, 13, 0, 0), 91502932381SShaik Ameer Basha GATE(CLK_SMMU_FIMCL3, "smmu_fimcl3,", "dout_gscl_blk_333", 9161609027fSChander Kashyap GATE_IP_GSCL1, 16, 0, 0), 917cba9d2faSAndrzej Hajda GATE(CLK_FIMC_LITE3, "fimc_lite3", "aclk333_432_gscl", 9181609027fSChander Kashyap GATE_IP_GSCL1, 17, 0, 0), 9191609027fSChander Kashyap 92002932381SShaik Ameer Basha /* MSCL Block */ 92102932381SShaik Ameer Basha GATE(CLK_MSCL0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0), 92202932381SShaik Ameer Basha GATE(CLK_MSCL1, "mscl1", "aclk400_mscl", GATE_IP_MSCL, 1, 0, 0), 92302932381SShaik Ameer Basha GATE(CLK_MSCL2, "mscl2", "aclk400_mscl", GATE_IP_MSCL, 2, 0, 0), 9244549d93dSShaik Ameer Basha GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "dout_mscl_blk", 92502932381SShaik Ameer Basha GATE_IP_MSCL, 8, 0, 0), 9264549d93dSShaik Ameer Basha GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "dout_mscl_blk", 92702932381SShaik Ameer Basha GATE_IP_MSCL, 9, 0, 0), 9284549d93dSShaik Ameer Basha GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "dout_mscl_blk", 92902932381SShaik Ameer Basha GATE_IP_MSCL, 10, 0, 0), 93002932381SShaik Ameer Basha 931cba9d2faSAndrzej Hajda GATE(CLK_FIMD1, "fimd1", "aclk300_disp1", GATE_IP_DISP1, 0, 0, 0), 932cba9d2faSAndrzej Hajda GATE(CLK_DSIM1, "dsim1", "aclk200_disp1", GATE_IP_DISP1, 3, 0, 0), 933cba9d2faSAndrzej Hajda GATE(CLK_DP1, "dp1", "aclk200_disp1", GATE_IP_DISP1, 4, 0, 0), 934424b673aSShaik Ameer Basha GATE(CLK_MIXER, "mixer", "aclk200_disp1", GATE_IP_DISP1, 5, 0, 0), 935cba9d2faSAndrzej Hajda GATE(CLK_HDMI, "hdmi", "aclk200_disp1", GATE_IP_DISP1, 6, 0, 0), 936424b673aSShaik Ameer Basha GATE(CLK_SMMU_FIMD1M0, "smmu_fimd1m0", "dout_disp1_blk", 937424b673aSShaik Ameer Basha GATE_IP_DISP1, 7, 0, 0), 938424b673aSShaik Ameer Basha GATE(CLK_SMMU_FIMD1M1, "smmu_fimd1m1", "dout_disp1_blk", 939424b673aSShaik Ameer Basha GATE_IP_DISP1, 8, 0, 0), 940424b673aSShaik Ameer Basha GATE(CLK_SMMU_MIXER, "smmu_mixer", "aclk200_disp1", 941424b673aSShaik Ameer Basha GATE_IP_DISP1, 9, 0, 0), 9421609027fSChander Kashyap 9433a767b35SShaik Ameer Basha /* ISP */ 9443a767b35SShaik Ameer Basha GATE(CLK_SCLK_UART_ISP, "sclk_uart_isp", "dout_uart_isp", 9453a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 0, CLK_SET_RATE_PARENT, 0), 9463a767b35SShaik Ameer Basha GATE(CLK_SCLK_SPI0_ISP, "sclk_spi0_isp", "dout_spi0_isp_pre", 9473a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 1, CLK_SET_RATE_PARENT, 0), 9483a767b35SShaik Ameer Basha GATE(CLK_SCLK_SPI1_ISP, "sclk_spi1_isp", "dout_spi1_isp_pre", 9493a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 2, CLK_SET_RATE_PARENT, 0), 9503a767b35SShaik Ameer Basha GATE(CLK_SCLK_PWM_ISP, "sclk_pwm_isp", "dout_pwm_isp", 9513a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 3, CLK_SET_RATE_PARENT, 0), 9523a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR0, "sclk_isp_sensor0", "dout_isp_sensor0", 9533a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 4, CLK_SET_RATE_PARENT, 0), 9543a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR1, "sclk_isp_sensor1", "dout_isp_sensor1", 9553a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 8, CLK_SET_RATE_PARENT, 0), 9563a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR2, "sclk_isp_sensor2", "dout_isp_sensor2", 9573a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 12, CLK_SET_RATE_PARENT, 0), 9583a767b35SShaik Ameer Basha 959cba9d2faSAndrzej Hajda GATE(CLK_MFC, "mfc", "aclk333", GATE_IP_MFC, 0, 0, 0), 9601d87db4dSShaik Ameer Basha GATE(CLK_SMMU_MFCL, "smmu_mfcl", "dout_mfc_blk", GATE_IP_MFC, 1, 0, 0), 9611d87db4dSShaik Ameer Basha GATE(CLK_SMMU_MFCR, "smmu_mfcr", "dout_mfc_blk", GATE_IP_MFC, 2, 0, 0), 9621609027fSChander Kashyap 9633fac5941SShaik Ameer Basha GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0), 9641609027fSChander Kashyap }; 9651609027fSChander Kashyap 966202e5ae9SSachin Kamat static struct samsung_pll_clock exynos5420_plls[nr_plls] __initdata = { 967cba9d2faSAndrzej Hajda [apll] = PLL(pll_2550, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK, 9683ff6e0d8SYadwinder Singh Brar APLL_CON0, NULL), 969cba9d2faSAndrzej Hajda [cpll] = PLL(pll_2550, CLK_FOUT_CPLL, "fout_cpll", "fin_pll", CPLL_LOCK, 970cdf64eeeSChander Kashyap CPLL_CON0, NULL), 971cba9d2faSAndrzej Hajda [dpll] = PLL(pll_2550, CLK_FOUT_DPLL, "fout_dpll", "fin_pll", DPLL_LOCK, 9723ff6e0d8SYadwinder Singh Brar DPLL_CON0, NULL), 973cba9d2faSAndrzej Hajda [epll] = PLL(pll_2650, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK, 9743ff6e0d8SYadwinder Singh Brar EPLL_CON0, NULL), 975cba9d2faSAndrzej Hajda [rpll] = PLL(pll_2650, CLK_FOUT_RPLL, "fout_rpll", "fin_pll", RPLL_LOCK, 9763ff6e0d8SYadwinder Singh Brar RPLL_CON0, NULL), 977cba9d2faSAndrzej Hajda [ipll] = PLL(pll_2550, CLK_FOUT_IPLL, "fout_ipll", "fin_pll", IPLL_LOCK, 9783ff6e0d8SYadwinder Singh Brar IPLL_CON0, NULL), 979cba9d2faSAndrzej Hajda [spll] = PLL(pll_2550, CLK_FOUT_SPLL, "fout_spll", "fin_pll", SPLL_LOCK, 9803ff6e0d8SYadwinder Singh Brar SPLL_CON0, NULL), 981cba9d2faSAndrzej Hajda [vpll] = PLL(pll_2550, CLK_FOUT_VPLL, "fout_vpll", "fin_pll", VPLL_LOCK, 9823ff6e0d8SYadwinder Singh Brar VPLL_CON0, NULL), 983cba9d2faSAndrzej Hajda [mpll] = PLL(pll_2550, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK, 9843ff6e0d8SYadwinder Singh Brar MPLL_CON0, NULL), 985cba9d2faSAndrzej Hajda [bpll] = PLL(pll_2550, CLK_FOUT_BPLL, "fout_bpll", "fin_pll", BPLL_LOCK, 9863ff6e0d8SYadwinder Singh Brar BPLL_CON0, NULL), 987cba9d2faSAndrzej Hajda [kpll] = PLL(pll_2550, CLK_FOUT_KPLL, "fout_kpll", "fin_pll", KPLL_LOCK, 9883ff6e0d8SYadwinder Singh Brar KPLL_CON0, NULL), 989c898c6b7SYadwinder Singh Brar }; 990c898c6b7SYadwinder Singh Brar 991202e5ae9SSachin Kamat static struct of_device_id ext_clk_match[] __initdata = { 9921609027fSChander Kashyap { .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, }, 9931609027fSChander Kashyap { }, 9941609027fSChander Kashyap }; 9951609027fSChander Kashyap 9961609027fSChander Kashyap /* register exynos5420 clocks */ 997c7306229SSachin Kamat static void __init exynos5420_clk_init(struct device_node *np) 9981609027fSChander Kashyap { 999976face4SRahul Sharma struct samsung_clk_provider *ctx; 1000976face4SRahul Sharma 10011609027fSChander Kashyap if (np) { 10021609027fSChander Kashyap reg_base = of_iomap(np, 0); 10031609027fSChander Kashyap if (!reg_base) 10041609027fSChander Kashyap panic("%s: failed to map registers\n", __func__); 10051609027fSChander Kashyap } else { 10061609027fSChander Kashyap panic("%s: unable to determine soc\n", __func__); 10071609027fSChander Kashyap } 10081609027fSChander Kashyap 1009976face4SRahul Sharma ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS); 1010976face4SRahul Sharma if (!ctx) 1011976face4SRahul Sharma panic("%s: unable to allocate context.\n", __func__); 1012976face4SRahul Sharma 1013976face4SRahul Sharma samsung_clk_of_register_fixed_ext(ctx, exynos5420_fixed_rate_ext_clks, 10141609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_rate_ext_clks), 10151609027fSChander Kashyap ext_clk_match); 1016976face4SRahul Sharma samsung_clk_register_pll(ctx, exynos5420_plls, 1017976face4SRahul Sharma ARRAY_SIZE(exynos5420_plls), 1018c898c6b7SYadwinder Singh Brar reg_base); 1019976face4SRahul Sharma samsung_clk_register_fixed_rate(ctx, exynos5420_fixed_rate_clks, 10201609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_rate_clks)); 1021976face4SRahul Sharma samsung_clk_register_fixed_factor(ctx, exynos5420_fixed_factor_clks, 10221609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_factor_clks)); 1023976face4SRahul Sharma samsung_clk_register_mux(ctx, exynos5420_mux_clks, 10241609027fSChander Kashyap ARRAY_SIZE(exynos5420_mux_clks)); 1025976face4SRahul Sharma samsung_clk_register_div(ctx, exynos5420_div_clks, 10261609027fSChander Kashyap ARRAY_SIZE(exynos5420_div_clks)); 1027976face4SRahul Sharma samsung_clk_register_gate(ctx, exynos5420_gate_clks, 10281609027fSChander Kashyap ARRAY_SIZE(exynos5420_gate_clks)); 1029388c7885STomasz Figa 1030388c7885STomasz Figa exynos5420_clk_sleep_init(); 10311609027fSChander Kashyap } 10321609027fSChander Kashyap CLK_OF_DECLARE(exynos5420_clk, "samsung,exynos5420-clock", exynos5420_clk_init); 1033