11609027fSChander Kashyap /* 21609027fSChander Kashyap * Copyright (c) 2013 Samsung Electronics Co., Ltd. 31609027fSChander Kashyap * Authors: Thomas Abraham <thomas.ab@samsung.com> 41609027fSChander Kashyap * Chander Kashyap <k.chander@samsung.com> 51609027fSChander Kashyap * 61609027fSChander Kashyap * This program is free software; you can redistribute it and/or modify 71609027fSChander Kashyap * it under the terms of the GNU General Public License version 2 as 81609027fSChander Kashyap * published by the Free Software Foundation. 91609027fSChander Kashyap * 101609027fSChander Kashyap * Common Clock Framework support for Exynos5420 SoC. 111609027fSChander Kashyap */ 121609027fSChander Kashyap 13cba9d2faSAndrzej Hajda #include <dt-bindings/clock/exynos5420.h> 141609027fSChander Kashyap #include <linux/clk.h> 151609027fSChander Kashyap #include <linux/clkdev.h> 161609027fSChander Kashyap #include <linux/clk-provider.h> 171609027fSChander Kashyap #include <linux/of.h> 181609027fSChander Kashyap #include <linux/of_address.h> 19388c7885STomasz Figa #include <linux/syscore_ops.h> 201609027fSChander Kashyap 211609027fSChander Kashyap #include "clk.h" 221609027fSChander Kashyap 23c898c6b7SYadwinder Singh Brar #define APLL_LOCK 0x0 24c898c6b7SYadwinder Singh Brar #define APLL_CON0 0x100 251609027fSChander Kashyap #define SRC_CPU 0x200 261609027fSChander Kashyap #define DIV_CPU0 0x500 271609027fSChander Kashyap #define DIV_CPU1 0x504 281609027fSChander Kashyap #define GATE_BUS_CPU 0x700 291609027fSChander Kashyap #define GATE_SCLK_CPU 0x800 305b73721bSNaveen Krishna Chatradhi #define GATE_IP_G2D 0x8800 31c898c6b7SYadwinder Singh Brar #define CPLL_LOCK 0x10020 32c898c6b7SYadwinder Singh Brar #define DPLL_LOCK 0x10030 33c898c6b7SYadwinder Singh Brar #define EPLL_LOCK 0x10040 34c898c6b7SYadwinder Singh Brar #define RPLL_LOCK 0x10050 35c898c6b7SYadwinder Singh Brar #define IPLL_LOCK 0x10060 36c898c6b7SYadwinder Singh Brar #define SPLL_LOCK 0x10070 3753cb6342SSachin Kamat #define VPLL_LOCK 0x10080 38c898c6b7SYadwinder Singh Brar #define MPLL_LOCK 0x10090 39c898c6b7SYadwinder Singh Brar #define CPLL_CON0 0x10120 40c898c6b7SYadwinder Singh Brar #define DPLL_CON0 0x10128 41c898c6b7SYadwinder Singh Brar #define EPLL_CON0 0x10130 42c898c6b7SYadwinder Singh Brar #define RPLL_CON0 0x10140 43c898c6b7SYadwinder Singh Brar #define IPLL_CON0 0x10150 44c898c6b7SYadwinder Singh Brar #define SPLL_CON0 0x10160 45c898c6b7SYadwinder Singh Brar #define VPLL_CON0 0x10170 46c898c6b7SYadwinder Singh Brar #define MPLL_CON0 0x10180 471609027fSChander Kashyap #define SRC_TOP0 0x10200 481609027fSChander Kashyap #define SRC_TOP1 0x10204 491609027fSChander Kashyap #define SRC_TOP2 0x10208 501609027fSChander Kashyap #define SRC_TOP3 0x1020c 511609027fSChander Kashyap #define SRC_TOP4 0x10210 521609027fSChander Kashyap #define SRC_TOP5 0x10214 531609027fSChander Kashyap #define SRC_TOP6 0x10218 541609027fSChander Kashyap #define SRC_TOP7 0x1021c 551609027fSChander Kashyap #define SRC_DISP10 0x1022c 561609027fSChander Kashyap #define SRC_MAU 0x10240 571609027fSChander Kashyap #define SRC_FSYS 0x10244 581609027fSChander Kashyap #define SRC_PERIC0 0x10250 591609027fSChander Kashyap #define SRC_PERIC1 0x10254 603a767b35SShaik Ameer Basha #define SRC_ISP 0x10270 611609027fSChander Kashyap #define SRC_TOP10 0x10280 621609027fSChander Kashyap #define SRC_TOP11 0x10284 631609027fSChander Kashyap #define SRC_TOP12 0x10288 64424b673aSShaik Ameer Basha #define SRC_MASK_TOP2 0x10308 651609027fSChander Kashyap #define SRC_MASK_DISP10 0x1032c 661609027fSChander Kashyap #define SRC_MASK_FSYS 0x10340 671609027fSChander Kashyap #define SRC_MASK_PERIC0 0x10350 681609027fSChander Kashyap #define SRC_MASK_PERIC1 0x10354 691609027fSChander Kashyap #define DIV_TOP0 0x10500 701609027fSChander Kashyap #define DIV_TOP1 0x10504 711609027fSChander Kashyap #define DIV_TOP2 0x10508 721609027fSChander Kashyap #define DIV_DISP10 0x1052c 731609027fSChander Kashyap #define DIV_MAU 0x10544 741609027fSChander Kashyap #define DIV_FSYS0 0x10548 751609027fSChander Kashyap #define DIV_FSYS1 0x1054c 761609027fSChander Kashyap #define DIV_FSYS2 0x10550 771609027fSChander Kashyap #define DIV_PERIC0 0x10558 781609027fSChander Kashyap #define DIV_PERIC1 0x1055c 791609027fSChander Kashyap #define DIV_PERIC2 0x10560 801609027fSChander Kashyap #define DIV_PERIC3 0x10564 811609027fSChander Kashyap #define DIV_PERIC4 0x10568 823a767b35SShaik Ameer Basha #define SCLK_DIV_ISP0 0x10580 833a767b35SShaik Ameer Basha #define SCLK_DIV_ISP1 0x10584 8402932381SShaik Ameer Basha #define DIV2_RATIO0 0x10590 851609027fSChander Kashyap #define GATE_BUS_TOP 0x10700 860a22c306SShaik Ameer Basha #define GATE_BUS_GEN 0x1073c 871609027fSChander Kashyap #define GATE_BUS_FSYS0 0x10740 886b5ae463SShaik Ameer Basha #define GATE_BUS_FSYS2 0x10748 891609027fSChander Kashyap #define GATE_BUS_PERIC 0x10750 901609027fSChander Kashyap #define GATE_BUS_PERIC1 0x10754 911609027fSChander Kashyap #define GATE_BUS_PERIS0 0x10760 921609027fSChander Kashyap #define GATE_BUS_PERIS1 0x10764 936575fa76SShaik Ameer Basha #define GATE_BUS_NOC 0x10770 943a767b35SShaik Ameer Basha #define GATE_TOP_SCLK_ISP 0x10870 951609027fSChander Kashyap #define GATE_IP_GSCL0 0x10910 961609027fSChander Kashyap #define GATE_IP_GSCL1 0x10920 971609027fSChander Kashyap #define GATE_IP_MFC 0x1092c 981609027fSChander Kashyap #define GATE_IP_DISP1 0x10928 991609027fSChander Kashyap #define GATE_IP_G3D 0x10930 1001609027fSChander Kashyap #define GATE_IP_GEN 0x10934 1016b5ae463SShaik Ameer Basha #define GATE_IP_FSYS 0x10944 102faec151bSShaik Ameer Basha #define GATE_IP_PERIC 0x10950 1030a22c306SShaik Ameer Basha #define GATE_IP_PERIS 0x10960 1041609027fSChander Kashyap #define GATE_IP_MSCL 0x10970 1051609027fSChander Kashyap #define GATE_TOP_SCLK_GSCL 0x10820 1061609027fSChander Kashyap #define GATE_TOP_SCLK_DISP1 0x10828 1071609027fSChander Kashyap #define GATE_TOP_SCLK_MAU 0x1083c 1081609027fSChander Kashyap #define GATE_TOP_SCLK_FSYS 0x10840 1091609027fSChander Kashyap #define GATE_TOP_SCLK_PERIC 0x10850 110424b673aSShaik Ameer Basha #define TOP_SPARE2 0x10b08 111c898c6b7SYadwinder Singh Brar #define BPLL_LOCK 0x20010 112c898c6b7SYadwinder Singh Brar #define BPLL_CON0 0x20110 1131609027fSChander Kashyap #define SRC_CDREX 0x20200 114c898c6b7SYadwinder Singh Brar #define KPLL_LOCK 0x28000 115c898c6b7SYadwinder Singh Brar #define KPLL_CON0 0x28100 1161609027fSChander Kashyap #define SRC_KFC 0x28200 1171609027fSChander Kashyap #define DIV_KFC0 0x28500 1181609027fSChander Kashyap 119c898c6b7SYadwinder Singh Brar /* list of PLLs */ 120c898c6b7SYadwinder Singh Brar enum exynos5420_plls { 121c898c6b7SYadwinder Singh Brar apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, 122c898c6b7SYadwinder Singh Brar bpll, kpll, 123c898c6b7SYadwinder Singh Brar nr_plls /* number of PLLs */ 124c898c6b7SYadwinder Singh Brar }; 125c898c6b7SYadwinder Singh Brar 126388c7885STomasz Figa static void __iomem *reg_base; 127388c7885STomasz Figa 128388c7885STomasz Figa #ifdef CONFIG_PM_SLEEP 129388c7885STomasz Figa static struct samsung_clk_reg_dump *exynos5420_save; 130388c7885STomasz Figa 1311609027fSChander Kashyap /* 1321609027fSChander Kashyap * list of controller registers to be saved and restored during a 1331609027fSChander Kashyap * suspend/resume cycle. 1341609027fSChander Kashyap */ 135202e5ae9SSachin Kamat static unsigned long exynos5420_clk_regs[] __initdata = { 1361609027fSChander Kashyap SRC_CPU, 1371609027fSChander Kashyap DIV_CPU0, 1381609027fSChander Kashyap DIV_CPU1, 1391609027fSChander Kashyap GATE_BUS_CPU, 1401609027fSChander Kashyap GATE_SCLK_CPU, 1411609027fSChander Kashyap SRC_TOP0, 1421609027fSChander Kashyap SRC_TOP1, 1431609027fSChander Kashyap SRC_TOP2, 1441609027fSChander Kashyap SRC_TOP3, 1451609027fSChander Kashyap SRC_TOP4, 1461609027fSChander Kashyap SRC_TOP5, 1471609027fSChander Kashyap SRC_TOP6, 1481609027fSChander Kashyap SRC_TOP7, 1491609027fSChander Kashyap SRC_DISP10, 1501609027fSChander Kashyap SRC_MAU, 1511609027fSChander Kashyap SRC_FSYS, 1521609027fSChander Kashyap SRC_PERIC0, 1531609027fSChander Kashyap SRC_PERIC1, 1541609027fSChander Kashyap SRC_TOP10, 1551609027fSChander Kashyap SRC_TOP11, 1561609027fSChander Kashyap SRC_TOP12, 157424b673aSShaik Ameer Basha SRC_MASK_TOP2, 1581609027fSChander Kashyap SRC_MASK_DISP10, 1591609027fSChander Kashyap SRC_MASK_FSYS, 1601609027fSChander Kashyap SRC_MASK_PERIC0, 1611609027fSChander Kashyap SRC_MASK_PERIC1, 1623a767b35SShaik Ameer Basha SRC_ISP, 1631609027fSChander Kashyap DIV_TOP0, 1641609027fSChander Kashyap DIV_TOP1, 1651609027fSChander Kashyap DIV_TOP2, 1661609027fSChander Kashyap DIV_DISP10, 1671609027fSChander Kashyap DIV_MAU, 1681609027fSChander Kashyap DIV_FSYS0, 1691609027fSChander Kashyap DIV_FSYS1, 1701609027fSChander Kashyap DIV_FSYS2, 1711609027fSChander Kashyap DIV_PERIC0, 1721609027fSChander Kashyap DIV_PERIC1, 1731609027fSChander Kashyap DIV_PERIC2, 1741609027fSChander Kashyap DIV_PERIC3, 1751609027fSChander Kashyap DIV_PERIC4, 1763a767b35SShaik Ameer Basha SCLK_DIV_ISP0, 1773a767b35SShaik Ameer Basha SCLK_DIV_ISP1, 17802932381SShaik Ameer Basha DIV2_RATIO0, 1791609027fSChander Kashyap GATE_BUS_TOP, 1800a22c306SShaik Ameer Basha GATE_BUS_GEN, 1811609027fSChander Kashyap GATE_BUS_FSYS0, 1826b5ae463SShaik Ameer Basha GATE_BUS_FSYS2, 1831609027fSChander Kashyap GATE_BUS_PERIC, 1841609027fSChander Kashyap GATE_BUS_PERIC1, 1851609027fSChander Kashyap GATE_BUS_PERIS0, 1861609027fSChander Kashyap GATE_BUS_PERIS1, 1876575fa76SShaik Ameer Basha GATE_BUS_NOC, 1883a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 1891609027fSChander Kashyap GATE_IP_GSCL0, 1901609027fSChander Kashyap GATE_IP_GSCL1, 1911609027fSChander Kashyap GATE_IP_MFC, 1921609027fSChander Kashyap GATE_IP_DISP1, 1931609027fSChander Kashyap GATE_IP_G3D, 1941609027fSChander Kashyap GATE_IP_GEN, 1956b5ae463SShaik Ameer Basha GATE_IP_FSYS, 196faec151bSShaik Ameer Basha GATE_IP_PERIC, 1970a22c306SShaik Ameer Basha GATE_IP_PERIS, 1981609027fSChander Kashyap GATE_IP_MSCL, 1991609027fSChander Kashyap GATE_TOP_SCLK_GSCL, 2001609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 2011609027fSChander Kashyap GATE_TOP_SCLK_MAU, 2021609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 2031609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 204424b673aSShaik Ameer Basha TOP_SPARE2, 2051609027fSChander Kashyap SRC_CDREX, 2061609027fSChander Kashyap SRC_KFC, 2071609027fSChander Kashyap DIV_KFC0, 2081609027fSChander Kashyap }; 2091609027fSChander Kashyap 210388c7885STomasz Figa static int exynos5420_clk_suspend(void) 211388c7885STomasz Figa { 212388c7885STomasz Figa samsung_clk_save(reg_base, exynos5420_save, 213388c7885STomasz Figa ARRAY_SIZE(exynos5420_clk_regs)); 214388c7885STomasz Figa 215388c7885STomasz Figa return 0; 216388c7885STomasz Figa } 217388c7885STomasz Figa 218388c7885STomasz Figa static void exynos5420_clk_resume(void) 219388c7885STomasz Figa { 220388c7885STomasz Figa samsung_clk_restore(reg_base, exynos5420_save, 221388c7885STomasz Figa ARRAY_SIZE(exynos5420_clk_regs)); 222388c7885STomasz Figa } 223388c7885STomasz Figa 224388c7885STomasz Figa static struct syscore_ops exynos5420_clk_syscore_ops = { 225388c7885STomasz Figa .suspend = exynos5420_clk_suspend, 226388c7885STomasz Figa .resume = exynos5420_clk_resume, 227388c7885STomasz Figa }; 228388c7885STomasz Figa 229388c7885STomasz Figa static void exynos5420_clk_sleep_init(void) 230388c7885STomasz Figa { 231388c7885STomasz Figa exynos5420_save = samsung_clk_alloc_reg_dump(exynos5420_clk_regs, 232388c7885STomasz Figa ARRAY_SIZE(exynos5420_clk_regs)); 233388c7885STomasz Figa if (!exynos5420_save) { 234388c7885STomasz Figa pr_warn("%s: failed to allocate sleep save data, no sleep support!\n", 235388c7885STomasz Figa __func__); 236388c7885STomasz Figa return; 237388c7885STomasz Figa } 238388c7885STomasz Figa 239388c7885STomasz Figa register_syscore_ops(&exynos5420_clk_syscore_ops); 240388c7885STomasz Figa } 241388c7885STomasz Figa #else 242388c7885STomasz Figa static void exynos5420_clk_sleep_init(void) {} 243388c7885STomasz Figa #endif 244388c7885STomasz Figa 2451609027fSChander Kashyap /* list of all parent clocks */ 246dbd713bbSShaik Ameer Basha PNAME(mout_mspll_cpu_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 247dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll"}; 248dbd713bbSShaik Ameer Basha PNAME(mout_cpu_p) = {"mout_apll" , "mout_mspll_cpu"}; 249dbd713bbSShaik Ameer Basha PNAME(mout_kfc_p) = {"mout_kpll" , "mout_mspll_kfc"}; 250dbd713bbSShaik Ameer Basha PNAME(mout_apll_p) = {"fin_pll", "fout_apll"}; 251dbd713bbSShaik Ameer Basha PNAME(mout_bpll_p) = {"fin_pll", "fout_bpll"}; 252dbd713bbSShaik Ameer Basha PNAME(mout_cpll_p) = {"fin_pll", "fout_cpll"}; 253dbd713bbSShaik Ameer Basha PNAME(mout_dpll_p) = {"fin_pll", "fout_dpll"}; 254dbd713bbSShaik Ameer Basha PNAME(mout_epll_p) = {"fin_pll", "fout_epll"}; 255dbd713bbSShaik Ameer Basha PNAME(mout_ipll_p) = {"fin_pll", "fout_ipll"}; 256dbd713bbSShaik Ameer Basha PNAME(mout_kpll_p) = {"fin_pll", "fout_kpll"}; 257dbd713bbSShaik Ameer Basha PNAME(mout_mpll_p) = {"fin_pll", "fout_mpll"}; 258dbd713bbSShaik Ameer Basha PNAME(mout_rpll_p) = {"fin_pll", "fout_rpll"}; 259dbd713bbSShaik Ameer Basha PNAME(mout_spll_p) = {"fin_pll", "fout_spll"}; 260dbd713bbSShaik Ameer Basha PNAME(mout_vpll_p) = {"fin_pll", "fout_vpll"}; 2611609027fSChander Kashyap 262dbd713bbSShaik Ameer Basha PNAME(mout_group1_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 263dbd713bbSShaik Ameer Basha "mout_sclk_mpll"}; 264dbd713bbSShaik Ameer Basha PNAME(mout_group2_p) = {"fin_pll", "mout_sclk_cpll", 265dbd713bbSShaik Ameer Basha "mout_sclk_dpll", "mout_sclk_mpll", "mout_sclk_spll", 266dbd713bbSShaik Ameer Basha "mout_sclk_ipll", "mout_sclk_epll", "mout_sclk_rpll"}; 267dbd713bbSShaik Ameer Basha PNAME(mout_group3_p) = {"mout_sclk_rpll", "mout_sclk_spll"}; 268dbd713bbSShaik Ameer Basha PNAME(mout_group4_p) = {"mout_sclk_ipll", "mout_sclk_dpll", "mout_sclk_mpll"}; 269dbd713bbSShaik Ameer Basha PNAME(mout_group5_p) = {"mout_sclk_vpll", "mout_sclk_dpll"}; 2701609027fSChander Kashyap 271424b673aSShaik Ameer Basha PNAME(mout_fimd1_final_p) = {"mout_fimd1", "mout_fimd1_opt"}; 272dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk66_p) = {"dout_aclk66", "mout_sclk_spll"}; 273faec151bSShaik Ameer Basha PNAME(mout_user_aclk66_peric_p) = { "fin_pll", "mout_sw_aclk66" }; 2741609027fSChander Kashyap 275dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_fsys_p) = {"dout_aclk200_fsys", "mout_sclk_spll"}; 2766b5ae463SShaik Ameer Basha PNAME(mout_sw_pclk200_fsys_p) = {"dout_pclk200_fsys", "mout_sclk_spll"}; 2776b5ae463SShaik Ameer Basha PNAME(mout_user_pclk200_fsys_p) = {"fin_pll", "mout_sw_pclk200_fsys"}; 278dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk200_fsys_p) = {"fin_pll", "mout_sw_aclk200_fsys"}; 2791609027fSChander Kashyap 280dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_fsys2_p) = {"dout_aclk200_fsys2", "mout_sclk_spll"}; 281dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk200_fsys2_p) = {"fin_pll", "mout_sw_aclk200_fsys2"}; 2826575fa76SShaik Ameer Basha PNAME(mout_sw_aclk100_noc_p) = {"dout_aclk100_noc", "mout_sclk_spll"}; 2836575fa76SShaik Ameer Basha PNAME(mout_user_aclk100_noc_p) = {"fin_pll", "mout_sw_aclk100_noc"}; 2846575fa76SShaik Ameer Basha 2856575fa76SShaik Ameer Basha PNAME(mout_sw_aclk400_wcore_p) = {"dout_aclk400_wcore", "mout_sclk_spll"}; 2866575fa76SShaik Ameer Basha PNAME(mout_aclk400_wcore_bpll_p) = {"mout_aclk400_wcore", "sclk_bpll"}; 2876575fa76SShaik Ameer Basha PNAME(mout_user_aclk400_wcore_p) = {"fin_pll", "mout_sw_aclk400_wcore"}; 2886575fa76SShaik Ameer Basha 2893a767b35SShaik Ameer Basha PNAME(mout_sw_aclk400_isp_p) = {"dout_aclk400_isp", "mout_sclk_spll"}; 2903a767b35SShaik Ameer Basha PNAME(mout_user_aclk400_isp_p) = {"fin_pll", "mout_sw_aclk400_isp"}; 2913a767b35SShaik Ameer Basha 2923a767b35SShaik Ameer Basha PNAME(mout_sw_aclk333_432_isp0_p) = {"dout_aclk333_432_isp0", 2933a767b35SShaik Ameer Basha "mout_sclk_spll"}; 2943a767b35SShaik Ameer Basha PNAME(mout_user_aclk333_432_isp0_p) = {"fin_pll", "mout_sw_aclk333_432_isp0"}; 2953a767b35SShaik Ameer Basha 2963a767b35SShaik Ameer Basha PNAME(mout_sw_aclk333_432_isp_p) = {"dout_aclk333_432_isp", "mout_sclk_spll"}; 2973a767b35SShaik Ameer Basha PNAME(mout_user_aclk333_432_isp_p) = {"fin_pll", "mout_sw_aclk333_432_isp"}; 2981609027fSChander Kashyap 299dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_p) = {"dout_aclk200", "mout_sclk_spll"}; 300424b673aSShaik Ameer Basha PNAME(mout_user_aclk200_disp1_p) = {"fin_pll", "mout_sw_aclk200"}; 3011609027fSChander Kashyap 302dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk400_mscl_p) = {"dout_aclk400_mscl", "mout_sclk_spll"}; 303dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk400_mscl_p) = {"fin_pll", "mout_sw_aclk400_mscl"}; 3041609027fSChander Kashyap 305dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_p) = {"dout_aclk333", "mout_sclk_spll"}; 306dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_p) = {"fin_pll", "mout_sw_aclk333"}; 3071609027fSChander Kashyap 308dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk166_p) = {"dout_aclk166", "mout_sclk_spll"}; 309dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk166_p) = {"fin_pll", "mout_sw_aclk166"}; 3101609027fSChander Kashyap 311dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk266_p) = {"dout_aclk266", "mout_sclk_spll"}; 312dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk266_p) = {"fin_pll", "mout_sw_aclk266"}; 3133a767b35SShaik Ameer Basha PNAME(mout_user_aclk266_isp_p) = {"fin_pll", "mout_sw_aclk266"}; 3141609027fSChander Kashyap 315dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_432_gscl_p) = {"dout_aclk333_432_gscl", "mout_sclk_spll"}; 316dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_432_gscl_p) = {"fin_pll", "mout_sw_aclk333_432_gscl"}; 3171609027fSChander Kashyap 318dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_gscl_p) = {"dout_aclk300_gscl", "mout_sclk_spll"}; 319dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_gscl_p) = {"fin_pll", "mout_sw_aclk300_gscl"}; 3201609027fSChander Kashyap 321dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_disp1_p) = {"dout_aclk300_disp1", "mout_sclk_spll"}; 322424b673aSShaik Ameer Basha PNAME(mout_sw_aclk400_disp1_p) = {"dout_aclk400_disp1", "mout_sclk_spll"}; 323dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_disp1_p) = {"fin_pll", "mout_sw_aclk300_disp1"}; 324424b673aSShaik Ameer Basha PNAME(mout_user_aclk400_disp1_p) = {"fin_pll", "mout_sw_aclk400_disp1"}; 3251609027fSChander Kashyap 326dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_jpeg_p) = {"dout_aclk300_jpeg", "mout_sclk_spll"}; 327dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_jpeg_p) = {"fin_pll", "mout_sw_aclk300_jpeg"}; 3281609027fSChander Kashyap 329dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk_g3d_p) = {"dout_aclk_g3d", "mout_sclk_spll"}; 330dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk_g3d_p) = {"fin_pll", "mout_sw_aclk_g3d"}; 3311609027fSChander Kashyap 332dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk266_g2d_p) = {"dout_aclk266_g2d", "mout_sclk_spll"}; 333dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk266_g2d_p) = {"fin_pll", "mout_sw_aclk266_g2d"}; 3341609027fSChander Kashyap 335dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_g2d_p) = {"dout_aclk333_g2d", "mout_sclk_spll"}; 336dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_g2d_p) = {"fin_pll", "mout_sw_aclk333_g2d"}; 3371609027fSChander Kashyap 338dbd713bbSShaik Ameer Basha PNAME(mout_audio0_p) = {"fin_pll", "cdclk0", "mout_sclk_dpll", 339dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 340dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 341dbd713bbSShaik Ameer Basha PNAME(mout_audio1_p) = {"fin_pll", "cdclk1", "mout_sclk_dpll", 342dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 343dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 344dbd713bbSShaik Ameer Basha PNAME(mout_audio2_p) = {"fin_pll", "cdclk2", "mout_sclk_dpll", 345dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 346dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 347dbd713bbSShaik Ameer Basha PNAME(mout_spdif_p) = {"fin_pll", "dout_audio0", "dout_audio1", 348dbd713bbSShaik Ameer Basha "dout_audio2", "spdif_extclk", "mout_sclk_ipll", 349dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 350dbd713bbSShaik Ameer Basha PNAME(mout_hdmi_p) = {"dout_hdmi_pixel", "sclk_hdmiphy"}; 351dbd713bbSShaik Ameer Basha PNAME(mout_maudio0_p) = {"fin_pll", "maudio_clk", "mout_sclk_dpll", 352dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 353dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 3541609027fSChander Kashyap 3551609027fSChander Kashyap /* fixed rate clocks generated outside the soc */ 356c7306229SSachin Kamat static struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[] __initdata = { 357cba9d2faSAndrzej Hajda FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0), 3581609027fSChander Kashyap }; 3591609027fSChander Kashyap 3601609027fSChander Kashyap /* fixed rate clocks generated inside the soc */ 361c7306229SSachin Kamat static struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[] __initdata = { 362cba9d2faSAndrzej Hajda FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), 363cba9d2faSAndrzej Hajda FRATE(0, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000), 364cba9d2faSAndrzej Hajda FRATE(0, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000), 365cba9d2faSAndrzej Hajda FRATE(0, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000), 366cba9d2faSAndrzej Hajda FRATE(0, "sclk_usbh20_scan_clk", NULL, CLK_IS_ROOT, 480000000), 3671609027fSChander Kashyap }; 3681609027fSChander Kashyap 369c7306229SSachin Kamat static struct samsung_fixed_factor_clock exynos5420_fixed_factor_clks[] __initdata = { 370cba9d2faSAndrzej Hajda FFACTOR(0, "sclk_hsic_12m", "fin_pll", 1, 2, 0), 3711609027fSChander Kashyap }; 3721609027fSChander Kashyap 373c7306229SSachin Kamat static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = { 374dbd713bbSShaik Ameer Basha MUX(0, "mout_mspll_kfc", mout_mspll_cpu_p, SRC_TOP7, 8, 2), 375dbd713bbSShaik Ameer Basha MUX(0, "mout_mspll_cpu", mout_mspll_cpu_p, SRC_TOP7, 12, 2), 376dbd713bbSShaik Ameer Basha MUX(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1), 377dbd713bbSShaik Ameer Basha MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), 378dbd713bbSShaik Ameer Basha MUX(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1), 379dbd713bbSShaik Ameer Basha MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1), 3801609027fSChander Kashyap 381dbd713bbSShaik Ameer Basha MUX(0, "sclk_bpll", mout_bpll_p, SRC_CDREX, 0, 1), 3821609027fSChander Kashyap 3833a767b35SShaik Ameer Basha MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2), 384dbd713bbSShaik Ameer Basha MUX_A(0, "mout_aclk400_mscl", mout_group1_p, 3851609027fSChander Kashyap SRC_TOP0, 4, 2, "aclk400_mscl"), 386dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2), 387dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200_fsys2", mout_group1_p, SRC_TOP0, 12, 2), 3886575fa76SShaik Ameer Basha MUX(0, "mout_aclk400_wcore", mout_group1_p, SRC_TOP0, 16, 2), 3896575fa76SShaik Ameer Basha MUX(0, "mout_aclk100_noc", mout_group1_p, SRC_TOP0, 20, 2), 3906b5ae463SShaik Ameer Basha MUX(0, "mout_pclk200_fsys", mout_group1_p, SRC_TOP0, 24, 2), 391dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200_fsys", mout_group1_p, SRC_TOP0, 28, 2), 3921609027fSChander Kashyap 393dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk333_432_gscl", mout_group4_p, SRC_TOP1, 0, 2), 3943a767b35SShaik Ameer Basha MUX(0, "mout_aclk333_432_isp", mout_group4_p, 3953a767b35SShaik Ameer Basha SRC_TOP1, 4, 2), 396dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk66", mout_group1_p, SRC_TOP1, 8, 2), 3973a767b35SShaik Ameer Basha MUX(0, "mout_aclk333_432_isp0", mout_group4_p, SRC_TOP1, 12, 2), 398dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk266", mout_group1_p, SRC_TOP1, 20, 2), 399dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk166", mout_group1_p, SRC_TOP1, 24, 2), 400dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk333", mout_group1_p, SRC_TOP1, 28, 2), 4011609027fSChander Kashyap 402424b673aSShaik Ameer Basha MUX(0, "mout_aclk400_disp1", mout_group1_p, SRC_TOP2, 4, 2), 403dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk333_g2d", mout_group1_p, SRC_TOP2, 8, 2), 404dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk266_g2d", mout_group1_p, SRC_TOP2, 12, 2), 405dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk_g3d", mout_group5_p, SRC_TOP2, 16, 1), 406dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk300_jpeg", mout_group1_p, SRC_TOP2, 20, 2), 407dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk300_disp1", mout_group1_p, SRC_TOP2, 24, 2), 408dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk300_gscl", mout_group1_p, SRC_TOP2, 28, 2), 4091609027fSChander Kashyap 4103a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk400_isp", mout_user_aclk400_isp_p, 4113a767b35SShaik Ameer Basha SRC_TOP3, 0, 1), 412dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk400_mscl", mout_user_aclk400_mscl_p, 4131609027fSChander Kashyap SRC_TOP3, 4, 1), 414424b673aSShaik Ameer Basha MUX(0, "mout_user_aclk200_disp1", mout_user_aclk200_disp1_p, 415424b673aSShaik Ameer Basha SRC_TOP3, 8, 1), 416dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk200_fsys2", mout_user_aclk200_fsys2_p, 4171609027fSChander Kashyap SRC_TOP3, 12, 1), 4186575fa76SShaik Ameer Basha MUX(0, "mout_user_aclk400_wcore", mout_user_aclk400_wcore_p, 4196575fa76SShaik Ameer Basha SRC_TOP3, 16, 1), 4206575fa76SShaik Ameer Basha MUX(0, "mout_user_aclk100_noc", mout_user_aclk100_noc_p, 4216575fa76SShaik Ameer Basha SRC_TOP3, 20, 1), 4226b5ae463SShaik Ameer Basha MUX(0, "mout_user_pclk200_fsys", mout_user_pclk200_fsys_p, 4236b5ae463SShaik Ameer Basha SRC_TOP3, 24, 1), 424dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk200_fsys", mout_user_aclk200_fsys_p, 4251609027fSChander Kashyap SRC_TOP3, 28, 1), 4261609027fSChander Kashyap 427dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk333_432_gscl", mout_user_aclk333_432_gscl_p, 4281609027fSChander Kashyap SRC_TOP4, 0, 1), 4293a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk333_432_isp", mout_user_aclk333_432_isp_p, 4303a767b35SShaik Ameer Basha SRC_TOP4, 4, 1), 431faec151bSShaik Ameer Basha MUX(0, "mout_user_aclk66_peric", mout_user_aclk66_peric_p, 432faec151bSShaik Ameer Basha SRC_TOP4, 8, 1), 4333a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk333_432_isp0", mout_user_aclk333_432_isp0_p, 4343a767b35SShaik Ameer Basha SRC_TOP4, 12, 1), 4353a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk266_isp", mout_user_aclk266_isp_p, 4363a767b35SShaik Ameer Basha SRC_TOP4, 16, 1), 437dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk266", mout_user_aclk266_p, SRC_TOP4, 20, 1), 438dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk166", mout_user_aclk166_p, SRC_TOP4, 24, 1), 439dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk333", mout_user_aclk333_p, SRC_TOP4, 28, 1), 4401609027fSChander Kashyap 441424b673aSShaik Ameer Basha MUX(0, "mout_user_aclk400_disp1", mout_user_aclk400_disp1_p, 442424b673aSShaik Ameer Basha SRC_TOP5, 0, 1), 443faec151bSShaik Ameer Basha MUX(0, "mout_user_aclk66_psgen", mout_user_aclk66_peric_p, 444faec151bSShaik Ameer Basha SRC_TOP5, 4, 1), 4453fac5941SShaik Ameer Basha MUX(0, "mout_user_aclk333_g2d", mout_user_aclk333_g2d_p, 4463fac5941SShaik Ameer Basha SRC_TOP5, 8, 1), 4473fac5941SShaik Ameer Basha MUX(0, "mout_user_aclk266_g2d", mout_user_aclk266_g2d_p, 4483fac5941SShaik Ameer Basha SRC_TOP5, 12, 1), 4493fac5941SShaik Ameer Basha MUX(CLK_MOUT_G3D, "mout_user_aclk_g3d", mout_user_aclk_g3d_p, 4503fac5941SShaik Ameer Basha SRC_TOP5, 16, 1), 451dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_jpeg", mout_user_aclk300_jpeg_p, 4521609027fSChander Kashyap SRC_TOP5, 20, 1), 453dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_disp1", mout_user_aclk300_disp1_p, 4541609027fSChander Kashyap SRC_TOP5, 24, 1), 455dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_gscl", mout_user_aclk300_gscl_p, 4561609027fSChander Kashyap SRC_TOP5, 28, 1), 4571609027fSChander Kashyap 458dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_mpll", mout_mpll_p, SRC_TOP6, 0, 1), 459dbd713bbSShaik Ameer Basha MUX(CLK_MOUT_VPLL, "mout_sclk_vpll", mout_vpll_p, SRC_TOP6, 4, 1), 460dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_spll", mout_spll_p, SRC_TOP6, 8, 1), 461dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_ipll", mout_ipll_p, SRC_TOP6, 12, 1), 462dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_rpll", mout_rpll_p, SRC_TOP6, 16, 1), 463dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_epll", mout_epll_p, SRC_TOP6, 20, 1), 464dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_dpll", mout_dpll_p, SRC_TOP6, 24, 1), 465dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_cpll", mout_cpll_p, SRC_TOP6, 28, 1), 4661609027fSChander Kashyap 4673a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk400_isp", mout_sw_aclk400_isp_p, 4683a767b35SShaik Ameer Basha SRC_TOP10, 0, 1), 469dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk400_mscl", mout_sw_aclk400_mscl_p, 470dbd713bbSShaik Ameer Basha SRC_TOP10, 4, 1), 471dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200", mout_sw_aclk200_p, SRC_TOP10, 8, 1), 472dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200_fsys2", mout_sw_aclk200_fsys2_p, 4731609027fSChander Kashyap SRC_TOP10, 12, 1), 4746575fa76SShaik Ameer Basha MUX(0, "mout_sw_aclk400_wcore", mout_sw_aclk400_wcore_p, 4756575fa76SShaik Ameer Basha SRC_TOP10, 16, 1), 4766575fa76SShaik Ameer Basha MUX(0, "mout_sw_aclk100_noc", mout_sw_aclk100_noc_p, 4776575fa76SShaik Ameer Basha SRC_TOP10, 20, 1), 4786b5ae463SShaik Ameer Basha MUX(0, "mout_sw_pclk200_fsys", mout_sw_pclk200_fsys_p, 4796b5ae463SShaik Ameer Basha SRC_TOP10, 24, 1), 480dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200_fsys", mout_sw_aclk200_fsys_p, 481dbd713bbSShaik Ameer Basha SRC_TOP10, 28, 1), 4823a767b35SShaik Ameer Basha 483dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_gscl", mout_sw_aclk333_432_gscl_p, 4841609027fSChander Kashyap SRC_TOP11, 0, 1), 4853a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_isp", mout_sw_aclk333_432_isp_p, 4863a767b35SShaik Ameer Basha SRC_TOP11, 4, 1), 487dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk66", mout_sw_aclk66_p, SRC_TOP11, 8, 1), 4883a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_isp0", mout_sw_aclk333_432_isp0_p, 4893a767b35SShaik Ameer Basha SRC_TOP11, 12, 1), 490dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk266", mout_sw_aclk266_p, SRC_TOP11, 20, 1), 491dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk166", mout_sw_aclk166_p, SRC_TOP11, 24, 1), 492dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333", mout_sw_aclk333_p, SRC_TOP11, 28, 1), 4931609027fSChander Kashyap 494424b673aSShaik Ameer Basha MUX(0, "mout_sw_aclk400_disp1", mout_sw_aclk400_disp1_p, 495424b673aSShaik Ameer Basha SRC_TOP12, 4, 1), 496dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333_g2d", mout_sw_aclk333_g2d_p, 497dbd713bbSShaik Ameer Basha SRC_TOP12, 8, 1), 498dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk266_g2d", mout_sw_aclk266_g2d_p, 499dbd713bbSShaik Ameer Basha SRC_TOP12, 12, 1), 500dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk_g3d", mout_sw_aclk_g3d_p, SRC_TOP12, 16, 1), 501dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_jpeg", mout_sw_aclk300_jpeg_p, 502dbd713bbSShaik Ameer Basha SRC_TOP12, 20, 1), 503dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_disp1", mout_sw_aclk300_disp1_p, 5041609027fSChander Kashyap SRC_TOP12, 24, 1), 505dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_gscl", mout_sw_aclk300_gscl_p, 506dbd713bbSShaik Ameer Basha SRC_TOP12, 28, 1), 5071609027fSChander Kashyap 5081609027fSChander Kashyap /* DISP1 Block */ 509dbd713bbSShaik Ameer Basha MUX(0, "mout_fimd1", mout_group3_p, SRC_DISP10, 4, 1), 510dbd713bbSShaik Ameer Basha MUX(0, "mout_mipi1", mout_group2_p, SRC_DISP10, 16, 3), 511dbd713bbSShaik Ameer Basha MUX(0, "mout_dp1", mout_group2_p, SRC_DISP10, 20, 3), 512dbd713bbSShaik Ameer Basha MUX(0, "mout_pixel", mout_group2_p, SRC_DISP10, 24, 3), 513dbd713bbSShaik Ameer Basha MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_DISP10, 28, 1), 514424b673aSShaik Ameer Basha MUX(0, "mout_fimd1_opt", mout_group2_p, SRC_DISP10, 8, 3), 5156575fa76SShaik Ameer Basha 5166575fa76SShaik Ameer Basha MUX(0, "mout_aclk400_wcore_bpll", mout_aclk400_wcore_bpll_p, 5176575fa76SShaik Ameer Basha TOP_SPARE2, 4, 1), 518424b673aSShaik Ameer Basha MUX(0, "mout_fimd1_final", mout_fimd1_final_p, TOP_SPARE2, 8, 1), 5191609027fSChander Kashyap 5201609027fSChander Kashyap /* MAU Block */ 521dbd713bbSShaik Ameer Basha MUX(0, "mout_maudio0", mout_maudio0_p, SRC_MAU, 28, 3), 5221609027fSChander Kashyap 5231609027fSChander Kashyap /* FSYS Block */ 524dbd713bbSShaik Ameer Basha MUX(0, "mout_usbd301", mout_group2_p, SRC_FSYS, 4, 3), 525dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc0", mout_group2_p, SRC_FSYS, 8, 3), 526dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc1", mout_group2_p, SRC_FSYS, 12, 3), 527dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc2", mout_group2_p, SRC_FSYS, 16, 3), 528dbd713bbSShaik Ameer Basha MUX(0, "mout_usbd300", mout_group2_p, SRC_FSYS, 20, 3), 529dbd713bbSShaik Ameer Basha MUX(0, "mout_unipro", mout_group2_p, SRC_FSYS, 24, 3), 5306b5ae463SShaik Ameer Basha MUX(0, "mout_mphy_refclk", mout_group2_p, SRC_FSYS, 28, 3), 5311609027fSChander Kashyap 5321609027fSChander Kashyap /* PERIC Block */ 533dbd713bbSShaik Ameer Basha MUX(0, "mout_uart0", mout_group2_p, SRC_PERIC0, 4, 3), 534dbd713bbSShaik Ameer Basha MUX(0, "mout_uart1", mout_group2_p, SRC_PERIC0, 8, 3), 535dbd713bbSShaik Ameer Basha MUX(0, "mout_uart2", mout_group2_p, SRC_PERIC0, 12, 3), 536dbd713bbSShaik Ameer Basha MUX(0, "mout_uart3", mout_group2_p, SRC_PERIC0, 16, 3), 537dbd713bbSShaik Ameer Basha MUX(0, "mout_pwm", mout_group2_p, SRC_PERIC0, 24, 3), 538dbd713bbSShaik Ameer Basha MUX(0, "mout_spdif", mout_spdif_p, SRC_PERIC0, 28, 3), 539dbd713bbSShaik Ameer Basha MUX(0, "mout_audio0", mout_audio0_p, SRC_PERIC1, 8, 3), 540dbd713bbSShaik Ameer Basha MUX(0, "mout_audio1", mout_audio1_p, SRC_PERIC1, 12, 3), 541dbd713bbSShaik Ameer Basha MUX(0, "mout_audio2", mout_audio2_p, SRC_PERIC1, 16, 3), 542dbd713bbSShaik Ameer Basha MUX(0, "mout_spi0", mout_group2_p, SRC_PERIC1, 20, 3), 543dbd713bbSShaik Ameer Basha MUX(0, "mout_spi1", mout_group2_p, SRC_PERIC1, 24, 3), 544dbd713bbSShaik Ameer Basha MUX(0, "mout_spi2", mout_group2_p, SRC_PERIC1, 28, 3), 5453a767b35SShaik Ameer Basha 5463a767b35SShaik Ameer Basha /* ISP Block */ 5473a767b35SShaik Ameer Basha MUX(0, "mout_pwm_isp", mout_group2_p, SRC_ISP, 24, 3), 5483a767b35SShaik Ameer Basha MUX(0, "mout_uart_isp", mout_group2_p, SRC_ISP, 20, 3), 5493a767b35SShaik Ameer Basha MUX(0, "mout_spi0_isp", mout_group2_p, SRC_ISP, 12, 3), 5503a767b35SShaik Ameer Basha MUX(0, "mout_spi1_isp", mout_group2_p, SRC_ISP, 16, 3), 5513a767b35SShaik Ameer Basha MUX(0, "mout_isp_sensor", mout_group2_p, SRC_ISP, 28, 3), 5521609027fSChander Kashyap }; 5531609027fSChander Kashyap 554c7306229SSachin Kamat static struct samsung_div_clock exynos5420_div_clks[] __initdata = { 555cba9d2faSAndrzej Hajda DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3), 556cba9d2faSAndrzej Hajda DIV(0, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3), 557cba9d2faSAndrzej Hajda DIV(0, "armclk2", "div_arm", DIV_CPU0, 28, 3), 558dbd713bbSShaik Ameer Basha DIV(0, "div_kfc", "mout_kfc", DIV_KFC0, 0, 3), 559cba9d2faSAndrzej Hajda DIV(0, "sclk_kpll", "mout_kpll", DIV_KFC0, 24, 3), 5601609027fSChander Kashyap 5613a767b35SShaik Ameer Basha DIV(0, "dout_aclk400_isp", "mout_aclk400_isp", DIV_TOP0, 0, 3), 562cba9d2faSAndrzej Hajda DIV(0, "dout_aclk400_mscl", "mout_aclk400_mscl", DIV_TOP0, 4, 3), 563cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200", "mout_aclk200", DIV_TOP0, 8, 3), 564cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200_fsys2", "mout_aclk200_fsys2", DIV_TOP0, 12, 3), 5656575fa76SShaik Ameer Basha DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore_bpll", 5666575fa76SShaik Ameer Basha DIV_TOP0, 16, 3), 5676575fa76SShaik Ameer Basha DIV(0, "dout_aclk100_noc", "mout_aclk100_noc", DIV_TOP0, 20, 3), 568cba9d2faSAndrzej Hajda DIV(0, "dout_pclk200_fsys", "mout_pclk200_fsys", DIV_TOP0, 24, 3), 569cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200_fsys", "mout_aclk200_fsys", DIV_TOP0, 28, 3), 5701609027fSChander Kashyap 571cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333_432_gscl", "mout_aclk333_432_gscl", 5721609027fSChander Kashyap DIV_TOP1, 0, 3), 5733a767b35SShaik Ameer Basha DIV(0, "dout_aclk333_432_isp", "mout_aclk333_432_isp", 5743a767b35SShaik Ameer Basha DIV_TOP1, 4, 3), 575cba9d2faSAndrzej Hajda DIV(0, "dout_aclk66", "mout_aclk66", DIV_TOP1, 8, 6), 5763a767b35SShaik Ameer Basha DIV(0, "dout_aclk333_432_isp0", "mout_aclk333_432_isp0", 5773a767b35SShaik Ameer Basha DIV_TOP1, 16, 3), 578cba9d2faSAndrzej Hajda DIV(0, "dout_aclk266", "mout_aclk266", DIV_TOP1, 20, 3), 579cba9d2faSAndrzej Hajda DIV(0, "dout_aclk166", "mout_aclk166", DIV_TOP1, 24, 3), 580cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333", "mout_aclk333", DIV_TOP1, 28, 3), 5811609027fSChander Kashyap 582cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333_g2d", "mout_aclk333_g2d", DIV_TOP2, 8, 3), 583cba9d2faSAndrzej Hajda DIV(0, "dout_aclk266_g2d", "mout_aclk266_g2d", DIV_TOP2, 12, 3), 584cba9d2faSAndrzej Hajda DIV(0, "dout_aclk_g3d", "mout_aclk_g3d", DIV_TOP2, 16, 3), 585cba9d2faSAndrzej Hajda DIV(0, "dout_aclk300_jpeg", "mout_aclk300_jpeg", DIV_TOP2, 20, 3), 586424b673aSShaik Ameer Basha DIV(0, "dout_aclk300_disp1", "mout_aclk300_disp1", DIV_TOP2, 24, 3), 587cba9d2faSAndrzej Hajda DIV(0, "dout_aclk300_gscl", "mout_aclk300_gscl", DIV_TOP2, 28, 3), 5881609027fSChander Kashyap 5891609027fSChander Kashyap /* DISP1 Block */ 590424b673aSShaik Ameer Basha DIV(0, "dout_fimd1", "mout_fimd1_final", DIV_DISP10, 0, 4), 591cba9d2faSAndrzej Hajda DIV(0, "dout_mipi1", "mout_mipi1", DIV_DISP10, 16, 8), 592cba9d2faSAndrzej Hajda DIV(0, "dout_dp1", "mout_dp1", DIV_DISP10, 24, 4), 593cba9d2faSAndrzej Hajda DIV(CLK_DOUT_PIXEL, "dout_hdmi_pixel", "mout_pixel", DIV_DISP10, 28, 4), 594424b673aSShaik Ameer Basha DIV(0, "dout_disp1_blk", "aclk200_disp1", DIV2_RATIO0, 16, 2), 595424b673aSShaik Ameer Basha DIV(0, "dout_aclk400_disp1", "mout_aclk400_disp1", DIV_TOP2, 4, 3), 5961609027fSChander Kashyap 5971609027fSChander Kashyap /* Audio Block */ 598cba9d2faSAndrzej Hajda DIV(0, "dout_maudio0", "mout_maudio0", DIV_MAU, 20, 4), 599cba9d2faSAndrzej Hajda DIV(0, "dout_maupcm0", "dout_maudio0", DIV_MAU, 24, 8), 6001609027fSChander Kashyap 6011609027fSChander Kashyap /* USB3.0 */ 602cba9d2faSAndrzej Hajda DIV(0, "dout_usbphy301", "mout_usbd301", DIV_FSYS0, 12, 4), 603cba9d2faSAndrzej Hajda DIV(0, "dout_usbphy300", "mout_usbd300", DIV_FSYS0, 16, 4), 604cba9d2faSAndrzej Hajda DIV(0, "dout_usbd301", "mout_usbd301", DIV_FSYS0, 20, 4), 605cba9d2faSAndrzej Hajda DIV(0, "dout_usbd300", "mout_usbd300", DIV_FSYS0, 24, 4), 6061609027fSChander Kashyap 6071609027fSChander Kashyap /* MMC */ 608cba9d2faSAndrzej Hajda DIV(0, "dout_mmc0", "mout_mmc0", DIV_FSYS1, 0, 10), 609cba9d2faSAndrzej Hajda DIV(0, "dout_mmc1", "mout_mmc1", DIV_FSYS1, 10, 10), 610cba9d2faSAndrzej Hajda DIV(0, "dout_mmc2", "mout_mmc2", DIV_FSYS1, 20, 10), 6111609027fSChander Kashyap 612cba9d2faSAndrzej Hajda DIV(0, "dout_unipro", "mout_unipro", DIV_FSYS2, 24, 8), 6136b5ae463SShaik Ameer Basha DIV(0, "dout_mphy_refclk", "mout_mphy_refclk", DIV_FSYS2, 16, 8), 6141609027fSChander Kashyap 6151609027fSChander Kashyap /* UART and PWM */ 616cba9d2faSAndrzej Hajda DIV(0, "dout_uart0", "mout_uart0", DIV_PERIC0, 8, 4), 617cba9d2faSAndrzej Hajda DIV(0, "dout_uart1", "mout_uart1", DIV_PERIC0, 12, 4), 618cba9d2faSAndrzej Hajda DIV(0, "dout_uart2", "mout_uart2", DIV_PERIC0, 16, 4), 619cba9d2faSAndrzej Hajda DIV(0, "dout_uart3", "mout_uart3", DIV_PERIC0, 20, 4), 620cba9d2faSAndrzej Hajda DIV(0, "dout_pwm", "mout_pwm", DIV_PERIC0, 28, 4), 6211609027fSChander Kashyap 6221609027fSChander Kashyap /* SPI */ 623cba9d2faSAndrzej Hajda DIV(0, "dout_spi0", "mout_spi0", DIV_PERIC1, 20, 4), 624cba9d2faSAndrzej Hajda DIV(0, "dout_spi1", "mout_spi1", DIV_PERIC1, 24, 4), 625cba9d2faSAndrzej Hajda DIV(0, "dout_spi2", "mout_spi2", DIV_PERIC1, 28, 4), 6261609027fSChander Kashyap 6271609027fSChander Kashyap /* PCM */ 628cba9d2faSAndrzej Hajda DIV(0, "dout_pcm1", "dout_audio1", DIV_PERIC2, 16, 8), 629cba9d2faSAndrzej Hajda DIV(0, "dout_pcm2", "dout_audio2", DIV_PERIC2, 24, 8), 6301609027fSChander Kashyap 6311609027fSChander Kashyap /* Audio - I2S */ 632cba9d2faSAndrzej Hajda DIV(0, "dout_i2s1", "dout_audio1", DIV_PERIC3, 6, 6), 633cba9d2faSAndrzej Hajda DIV(0, "dout_i2s2", "dout_audio2", DIV_PERIC3, 12, 6), 634cba9d2faSAndrzej Hajda DIV(0, "dout_audio0", "mout_audio0", DIV_PERIC3, 20, 4), 635cba9d2faSAndrzej Hajda DIV(0, "dout_audio1", "mout_audio1", DIV_PERIC3, 24, 4), 636cba9d2faSAndrzej Hajda DIV(0, "dout_audio2", "mout_audio2", DIV_PERIC3, 28, 4), 6371609027fSChander Kashyap 6381609027fSChander Kashyap /* SPI Pre-Ratio */ 639faec151bSShaik Ameer Basha DIV(0, "dout_spi0_pre", "dout_spi0", DIV_PERIC4, 8, 8), 640faec151bSShaik Ameer Basha DIV(0, "dout_spi1_pre", "dout_spi1", DIV_PERIC4, 16, 8), 641faec151bSShaik Ameer Basha DIV(0, "dout_spi2_pre", "dout_spi2", DIV_PERIC4, 24, 8), 6423a767b35SShaik Ameer Basha 64302932381SShaik Ameer Basha /* GSCL Block */ 64402932381SShaik Ameer Basha DIV(0, "dout_gscl_blk_300", "mout_user_aclk300_gscl", 64502932381SShaik Ameer Basha DIV2_RATIO0, 4, 2), 64602932381SShaik Ameer Basha DIV(0, "dout_gscl_blk_333", "aclk333_432_gscl", DIV2_RATIO0, 6, 2), 64702932381SShaik Ameer Basha 6484549d93dSShaik Ameer Basha /* MSCL Block */ 6494549d93dSShaik Ameer Basha DIV(0, "dout_mscl_blk", "aclk400_mscl", DIV2_RATIO0, 28, 2), 6504549d93dSShaik Ameer Basha 6510a22c306SShaik Ameer Basha /* PSGEN */ 6520a22c306SShaik Ameer Basha DIV(0, "dout_gen_blk", "mout_user_aclk266", DIV2_RATIO0, 8, 1), 6530a22c306SShaik Ameer Basha DIV(0, "dout_jpg_blk", "aclk166", DIV2_RATIO0, 20, 1), 6540a22c306SShaik Ameer Basha 6553a767b35SShaik Ameer Basha /* ISP Block */ 6563a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor0", "mout_isp_sensor", SCLK_DIV_ISP0, 8, 8), 6573a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor1", "mout_isp_sensor", SCLK_DIV_ISP0, 16, 8), 6583a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor2", "mout_isp_sensor", SCLK_DIV_ISP0, 24, 8), 6593a767b35SShaik Ameer Basha DIV(0, "dout_pwm_isp", "mout_pwm_isp", SCLK_DIV_ISP1, 28, 4), 6603a767b35SShaik Ameer Basha DIV(0, "dout_uart_isp", "mout_uart_isp", SCLK_DIV_ISP1, 24, 4), 6613a767b35SShaik Ameer Basha DIV(0, "dout_spi0_isp", "mout_spi0_isp", SCLK_DIV_ISP1, 16, 4), 6623a767b35SShaik Ameer Basha DIV(0, "dout_spi1_isp", "mout_spi1_isp", SCLK_DIV_ISP1, 20, 4), 6633a767b35SShaik Ameer Basha DIV_F(0, "dout_spi0_isp_pre", "dout_spi0_isp", SCLK_DIV_ISP1, 0, 8, 6643a767b35SShaik Ameer Basha CLK_SET_RATE_PARENT, 0), 6653a767b35SShaik Ameer Basha DIV_F(0, "dout_spi1_isp_pre", "dout_spi1_isp", SCLK_DIV_ISP1, 8, 8, 6663a767b35SShaik Ameer Basha CLK_SET_RATE_PARENT, 0), 6671609027fSChander Kashyap }; 6681609027fSChander Kashyap 669c7306229SSachin Kamat static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { 6705b73721bSNaveen Krishna Chatradhi /* G2D */ 6713fac5941SShaik Ameer Basha GATE(CLK_MDMA0, "mdma0", "aclk266_g2d", GATE_IP_G2D, 1, 0, 0), 6725b73721bSNaveen Krishna Chatradhi GATE(CLK_SSS, "sss", "aclk266_g2d", GATE_IP_G2D, 2, 0, 0), 6733fac5941SShaik Ameer Basha GATE(CLK_G2D, "g2d", "aclk333_g2d", GATE_IP_G2D, 3, 0, 0), 6743fac5941SShaik Ameer Basha GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "aclk266_g2d", GATE_IP_G2D, 5, 0, 0), 6753fac5941SShaik Ameer Basha GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk333_g2d", GATE_IP_G2D, 7, 0, 0), 6765b73721bSNaveen Krishna Chatradhi 6771609027fSChander Kashyap GATE(0, "aclk200_fsys", "mout_user_aclk200_fsys", 6781609027fSChander Kashyap GATE_BUS_FSYS0, 9, CLK_IGNORE_UNUSED, 0), 6791609027fSChander Kashyap GATE(0, "aclk200_fsys2", "mout_user_aclk200_fsys2", 6801609027fSChander Kashyap GATE_BUS_FSYS0, 10, CLK_IGNORE_UNUSED, 0), 6811609027fSChander Kashyap 6821609027fSChander Kashyap GATE(0, "aclk333_g2d", "mout_user_aclk333_g2d", 6831609027fSChander Kashyap GATE_BUS_TOP, 0, CLK_IGNORE_UNUSED, 0), 6841609027fSChander Kashyap GATE(0, "aclk266_g2d", "mout_user_aclk266_g2d", 6851609027fSChander Kashyap GATE_BUS_TOP, 1, CLK_IGNORE_UNUSED, 0), 6861609027fSChander Kashyap GATE(0, "aclk300_jpeg", "mout_user_aclk300_jpeg", 6871609027fSChander Kashyap GATE_BUS_TOP, 4, CLK_IGNORE_UNUSED, 0), 6883a767b35SShaik Ameer Basha GATE(0, "aclk333_432_isp0", "mout_user_aclk333_432_isp0", 6893a767b35SShaik Ameer Basha GATE_BUS_TOP, 5, 0, 0), 6901609027fSChander Kashyap GATE(0, "aclk300_gscl", "mout_user_aclk300_gscl", 6911609027fSChander Kashyap GATE_BUS_TOP, 6, CLK_IGNORE_UNUSED, 0), 6921609027fSChander Kashyap GATE(0, "aclk333_432_gscl", "mout_user_aclk333_432_gscl", 6931609027fSChander Kashyap GATE_BUS_TOP, 7, CLK_IGNORE_UNUSED, 0), 6943a767b35SShaik Ameer Basha GATE(0, "aclk333_432_isp", "mout_user_aclk333_432_isp", 6953a767b35SShaik Ameer Basha GATE_BUS_TOP, 8, 0, 0), 6961609027fSChander Kashyap GATE(0, "pclk66_gpio", "mout_sw_aclk66", 6971609027fSChander Kashyap GATE_BUS_TOP, 9, CLK_IGNORE_UNUSED, 0), 698faec151bSShaik Ameer Basha GATE(0, "aclk66_psgen", "mout_user_aclk66_psgen", 6991609027fSChander Kashyap GATE_BUS_TOP, 10, CLK_IGNORE_UNUSED, 0), 700faec151bSShaik Ameer Basha GATE(CLK_ACLK66_PERIC, "aclk66_peric", "mout_user_aclk66_peric", 701faec151bSShaik Ameer Basha GATE_BUS_TOP, 11, CLK_IGNORE_UNUSED, 0), 7023a767b35SShaik Ameer Basha GATE(0, "aclk266_isp", "mout_user_aclk266_isp", 7033a767b35SShaik Ameer Basha GATE_BUS_TOP, 13, 0, 0), 7041609027fSChander Kashyap GATE(0, "aclk166", "mout_user_aclk166", 7051609027fSChander Kashyap GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), 7061609027fSChander Kashyap GATE(0, "aclk333", "mout_aclk333", 7071609027fSChander Kashyap GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), 7083a767b35SShaik Ameer Basha GATE(0, "aclk400_isp", "mout_user_aclk400_isp", 7093a767b35SShaik Ameer Basha GATE_BUS_TOP, 16, 0, 0), 71002932381SShaik Ameer Basha GATE(0, "aclk400_mscl", "mout_user_aclk400_mscl", 71102932381SShaik Ameer Basha GATE_BUS_TOP, 17, 0, 0), 712424b673aSShaik Ameer Basha GATE(0, "aclk200_disp1", "mout_user_aclk200_disp1", 713424b673aSShaik Ameer Basha GATE_BUS_TOP, 18, 0, 0), 714424b673aSShaik Ameer Basha 715424b673aSShaik Ameer Basha GATE(0, "aclk300_disp1", "mout_user_aclk300_disp1", 716424b673aSShaik Ameer Basha SRC_MASK_TOP2, 24, 0, 0), 7171609027fSChander Kashyap 7181609027fSChander Kashyap /* sclk */ 719cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART0, "sclk_uart0", "dout_uart0", 7201609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 0, CLK_SET_RATE_PARENT, 0), 721cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART1, "sclk_uart1", "dout_uart1", 7221609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 1, CLK_SET_RATE_PARENT, 0), 723cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_uart2", 7241609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 2, CLK_SET_RATE_PARENT, 0), 725cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART3, "sclk_uart3", "dout_uart3", 7261609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 3, CLK_SET_RATE_PARENT, 0), 727faec151bSShaik Ameer Basha GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_spi0_pre", 7281609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 6, CLK_SET_RATE_PARENT, 0), 729faec151bSShaik Ameer Basha GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_spi1_pre", 7301609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 7, CLK_SET_RATE_PARENT, 0), 731faec151bSShaik Ameer Basha GATE(CLK_SCLK_SPI2, "sclk_spi2", "dout_spi2_pre", 7321609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 8, CLK_SET_RATE_PARENT, 0), 733cba9d2faSAndrzej Hajda GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif", 7341609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 9, CLK_SET_RATE_PARENT, 0), 735cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PWM, "sclk_pwm", "dout_pwm", 7361609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0), 737cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PCM1, "sclk_pcm1", "dout_pcm1", 7381609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 15, CLK_SET_RATE_PARENT, 0), 739cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PCM2, "sclk_pcm2", "dout_pcm2", 7401609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 16, CLK_SET_RATE_PARENT, 0), 741cba9d2faSAndrzej Hajda GATE(CLK_SCLK_I2S1, "sclk_i2s1", "dout_i2s1", 7421609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 17, CLK_SET_RATE_PARENT, 0), 743cba9d2faSAndrzej Hajda GATE(CLK_SCLK_I2S2, "sclk_i2s2", "dout_i2s2", 7441609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 18, CLK_SET_RATE_PARENT, 0), 7451609027fSChander Kashyap 746cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_mmc0", 7471609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 0, CLK_SET_RATE_PARENT, 0), 748cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_mmc1", 7491609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 1, CLK_SET_RATE_PARENT, 0), 750cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_mmc2", 7511609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 2, CLK_SET_RATE_PARENT, 0), 752cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBPHY301, "sclk_usbphy301", "dout_usbphy301", 7531609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 7, CLK_SET_RATE_PARENT, 0), 754cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBPHY300, "sclk_usbphy300", "dout_usbphy300", 7551609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 8, CLK_SET_RATE_PARENT, 0), 756cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBD300, "sclk_usbd300", "dout_usbd300", 7571609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 9, CLK_SET_RATE_PARENT, 0), 758cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBD301, "sclk_usbd301", "dout_usbd301", 7591609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 10, CLK_SET_RATE_PARENT, 0), 7601609027fSChander Kashyap 7611609027fSChander Kashyap /* Display */ 762cba9d2faSAndrzej Hajda GATE(CLK_SCLK_FIMD1, "sclk_fimd1", "dout_fimd1", 7631609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 0, CLK_SET_RATE_PARENT, 0), 764cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MIPI1, "sclk_mipi1", "dout_mipi1", 7651609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 3, CLK_SET_RATE_PARENT, 0), 766cba9d2faSAndrzej Hajda GATE(CLK_SCLK_HDMI, "sclk_hdmi", "mout_hdmi", 767424b673aSShaik Ameer Basha GATE_TOP_SCLK_DISP1, 9, 0, 0), 768cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PIXEL, "sclk_pixel", "dout_hdmi_pixel", 7691609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 10, CLK_SET_RATE_PARENT, 0), 770cba9d2faSAndrzej Hajda GATE(CLK_SCLK_DP1, "sclk_dp1", "dout_dp1", 7711609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 20, CLK_SET_RATE_PARENT, 0), 7721609027fSChander Kashyap 7731609027fSChander Kashyap /* Maudio Block */ 774cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MAUDIO0, "sclk_maudio0", "dout_maudio0", 7751609027fSChander Kashyap GATE_TOP_SCLK_MAU, 0, CLK_SET_RATE_PARENT, 0), 776cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MAUPCM0, "sclk_maupcm0", "dout_maupcm0", 7771609027fSChander Kashyap GATE_TOP_SCLK_MAU, 1, CLK_SET_RATE_PARENT, 0), 7786b5ae463SShaik Ameer Basha 7796b5ae463SShaik Ameer Basha /* FSYS Block */ 780cba9d2faSAndrzej Hajda GATE(CLK_TSI, "tsi", "aclk200_fsys", GATE_BUS_FSYS0, 0, 0, 0), 781cba9d2faSAndrzej Hajda GATE(CLK_PDMA0, "pdma0", "aclk200_fsys", GATE_BUS_FSYS0, 1, 0, 0), 782cba9d2faSAndrzej Hajda GATE(CLK_PDMA1, "pdma1", "aclk200_fsys", GATE_BUS_FSYS0, 2, 0, 0), 783cba9d2faSAndrzej Hajda GATE(CLK_UFS, "ufs", "aclk200_fsys2", GATE_BUS_FSYS0, 3, 0, 0), 7846b5ae463SShaik Ameer Basha GATE(CLK_RTIC, "rtic", "aclk200_fsys", GATE_IP_FSYS, 9, 0, 0), 7856b5ae463SShaik Ameer Basha GATE(CLK_MMC0, "mmc0", "aclk200_fsys2", GATE_IP_FSYS, 12, 0, 0), 7866b5ae463SShaik Ameer Basha GATE(CLK_MMC1, "mmc1", "aclk200_fsys2", GATE_IP_FSYS, 13, 0, 0), 7876b5ae463SShaik Ameer Basha GATE(CLK_MMC2, "mmc2", "aclk200_fsys2", GATE_IP_FSYS, 14, 0, 0), 788cba9d2faSAndrzej Hajda GATE(CLK_SROMC, "sromc", "aclk200_fsys2", 7896b5ae463SShaik Ameer Basha GATE_IP_FSYS, 17, CLK_IGNORE_UNUSED, 0), 7906b5ae463SShaik Ameer Basha GATE(CLK_USBH20, "usbh20", "aclk200_fsys", GATE_IP_FSYS, 18, 0, 0), 7916b5ae463SShaik Ameer Basha GATE(CLK_USBD300, "usbd300", "aclk200_fsys", GATE_IP_FSYS, 19, 0, 0), 7926b5ae463SShaik Ameer Basha GATE(CLK_USBD301, "usbd301", "aclk200_fsys", GATE_IP_FSYS, 20, 0, 0), 7936b5ae463SShaik Ameer Basha GATE(CLK_SCLK_UNIPRO, "sclk_unipro", "dout_unipro", 7946b5ae463SShaik Ameer Basha SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0), 7951609027fSChander Kashyap 796faec151bSShaik Ameer Basha /* PERIC Block */ 797faec151bSShaik Ameer Basha GATE(CLK_UART0, "uart0", "aclk66_peric", GATE_IP_PERIC, 0, 0, 0), 798faec151bSShaik Ameer Basha GATE(CLK_UART1, "uart1", "aclk66_peric", GATE_IP_PERIC, 1, 0, 0), 799faec151bSShaik Ameer Basha GATE(CLK_UART2, "uart2", "aclk66_peric", GATE_IP_PERIC, 2, 0, 0), 800faec151bSShaik Ameer Basha GATE(CLK_UART3, "uart3", "aclk66_peric", GATE_IP_PERIC, 3, 0, 0), 801faec151bSShaik Ameer Basha GATE(CLK_I2C0, "i2c0", "aclk66_peric", GATE_IP_PERIC, 6, 0, 0), 802faec151bSShaik Ameer Basha GATE(CLK_I2C1, "i2c1", "aclk66_peric", GATE_IP_PERIC, 7, 0, 0), 803faec151bSShaik Ameer Basha GATE(CLK_I2C2, "i2c2", "aclk66_peric", GATE_IP_PERIC, 8, 0, 0), 804faec151bSShaik Ameer Basha GATE(CLK_I2C3, "i2c3", "aclk66_peric", GATE_IP_PERIC, 9, 0, 0), 805faec151bSShaik Ameer Basha GATE(CLK_USI0, "usi0", "aclk66_peric", GATE_IP_PERIC, 10, 0, 0), 806faec151bSShaik Ameer Basha GATE(CLK_USI1, "usi1", "aclk66_peric", GATE_IP_PERIC, 11, 0, 0), 807faec151bSShaik Ameer Basha GATE(CLK_USI2, "usi2", "aclk66_peric", GATE_IP_PERIC, 12, 0, 0), 808faec151bSShaik Ameer Basha GATE(CLK_USI3, "usi3", "aclk66_peric", GATE_IP_PERIC, 13, 0, 0), 809faec151bSShaik Ameer Basha GATE(CLK_I2C_HDMI, "i2c_hdmi", "aclk66_peric", GATE_IP_PERIC, 14, 0, 0), 810faec151bSShaik Ameer Basha GATE(CLK_TSADC, "tsadc", "aclk66_peric", GATE_IP_PERIC, 15, 0, 0), 811faec151bSShaik Ameer Basha GATE(CLK_SPI0, "spi0", "aclk66_peric", GATE_IP_PERIC, 16, 0, 0), 812faec151bSShaik Ameer Basha GATE(CLK_SPI1, "spi1", "aclk66_peric", GATE_IP_PERIC, 17, 0, 0), 813faec151bSShaik Ameer Basha GATE(CLK_SPI2, "spi2", "aclk66_peric", GATE_IP_PERIC, 18, 0, 0), 814faec151bSShaik Ameer Basha GATE(CLK_I2S1, "i2s1", "aclk66_peric", GATE_IP_PERIC, 20, 0, 0), 815faec151bSShaik Ameer Basha GATE(CLK_I2S2, "i2s2", "aclk66_peric", GATE_IP_PERIC, 21, 0, 0), 816faec151bSShaik Ameer Basha GATE(CLK_PCM1, "pcm1", "aclk66_peric", GATE_IP_PERIC, 22, 0, 0), 817faec151bSShaik Ameer Basha GATE(CLK_PCM2, "pcm2", "aclk66_peric", GATE_IP_PERIC, 23, 0, 0), 818faec151bSShaik Ameer Basha GATE(CLK_PWM, "pwm", "aclk66_peric", GATE_IP_PERIC, 24, 0, 0), 819faec151bSShaik Ameer Basha GATE(CLK_SPDIF, "spdif", "aclk66_peric", GATE_IP_PERIC, 26, 0, 0), 820faec151bSShaik Ameer Basha GATE(CLK_USI4, "usi4", "aclk66_peric", GATE_IP_PERIC, 28, 0, 0), 821faec151bSShaik Ameer Basha GATE(CLK_USI5, "usi5", "aclk66_peric", GATE_IP_PERIC, 30, 0, 0), 822faec151bSShaik Ameer Basha GATE(CLK_USI6, "usi6", "aclk66_peric", GATE_IP_PERIC, 31, 0, 0), 8231609027fSChander Kashyap 824faec151bSShaik Ameer Basha GATE(CLK_KEYIF, "keyif", "aclk66_peric", GATE_BUS_PERIC, 22, 0, 0), 8251609027fSChander Kashyap 8260a22c306SShaik Ameer Basha /* PERIS Block */ 827cba9d2faSAndrzej Hajda GATE(CLK_CHIPID, "chipid", "aclk66_psgen", 8280a22c306SShaik Ameer Basha GATE_IP_PERIS, 0, CLK_IGNORE_UNUSED, 0), 829cba9d2faSAndrzej Hajda GATE(CLK_SYSREG, "sysreg", "aclk66_psgen", 8300a22c306SShaik Ameer Basha GATE_IP_PERIS, 1, CLK_IGNORE_UNUSED, 0), 8310a22c306SShaik Ameer Basha GATE(CLK_TZPC0, "tzpc0", "aclk66_psgen", GATE_IP_PERIS, 6, 0, 0), 8320a22c306SShaik Ameer Basha GATE(CLK_TZPC1, "tzpc1", "aclk66_psgen", GATE_IP_PERIS, 7, 0, 0), 8330a22c306SShaik Ameer Basha GATE(CLK_TZPC2, "tzpc2", "aclk66_psgen", GATE_IP_PERIS, 8, 0, 0), 8340a22c306SShaik Ameer Basha GATE(CLK_TZPC3, "tzpc3", "aclk66_psgen", GATE_IP_PERIS, 9, 0, 0), 8350a22c306SShaik Ameer Basha GATE(CLK_TZPC4, "tzpc4", "aclk66_psgen", GATE_IP_PERIS, 10, 0, 0), 8360a22c306SShaik Ameer Basha GATE(CLK_TZPC5, "tzpc5", "aclk66_psgen", GATE_IP_PERIS, 11, 0, 0), 8370a22c306SShaik Ameer Basha GATE(CLK_TZPC6, "tzpc6", "aclk66_psgen", GATE_IP_PERIS, 12, 0, 0), 8380a22c306SShaik Ameer Basha GATE(CLK_TZPC7, "tzpc7", "aclk66_psgen", GATE_IP_PERIS, 13, 0, 0), 8390a22c306SShaik Ameer Basha GATE(CLK_TZPC8, "tzpc8", "aclk66_psgen", GATE_IP_PERIS, 14, 0, 0), 8400a22c306SShaik Ameer Basha GATE(CLK_TZPC9, "tzpc9", "aclk66_psgen", GATE_IP_PERIS, 15, 0, 0), 8410a22c306SShaik Ameer Basha GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk66_psgen", GATE_IP_PERIS, 16, 0, 0), 8420a22c306SShaik Ameer Basha GATE(CLK_MCT, "mct", "aclk66_psgen", GATE_IP_PERIS, 18, 0, 0), 8430a22c306SShaik Ameer Basha GATE(CLK_WDT, "wdt", "aclk66_psgen", GATE_IP_PERIS, 19, 0, 0), 8440a22c306SShaik Ameer Basha GATE(CLK_RTC, "rtc", "aclk66_psgen", GATE_IP_PERIS, 20, 0, 0), 8450a22c306SShaik Ameer Basha GATE(CLK_TMU, "tmu", "aclk66_psgen", GATE_IP_PERIS, 21, 0, 0), 8460a22c306SShaik Ameer Basha GATE(CLK_TMU_GPU, "tmu_gpu", "aclk66_psgen", GATE_IP_PERIS, 22, 0, 0), 8471609027fSChander Kashyap 848cba9d2faSAndrzej Hajda GATE(CLK_SECKEY, "seckey", "aclk66_psgen", GATE_BUS_PERIS1, 1, 0, 0), 8490a22c306SShaik Ameer Basha 8500a22c306SShaik Ameer Basha /* GEN Block */ 8510a22c306SShaik Ameer Basha GATE(CLK_ROTATOR, "rotator", "mout_user_aclk266", GATE_IP_GEN, 1, 0, 0), 8520a22c306SShaik Ameer Basha GATE(CLK_JPEG, "jpeg", "aclk300_jpeg", GATE_IP_GEN, 2, 0, 0), 8530a22c306SShaik Ameer Basha GATE(CLK_JPEG2, "jpeg2", "aclk300_jpeg", GATE_IP_GEN, 3, 0, 0), 8540a22c306SShaik Ameer Basha GATE(CLK_MDMA1, "mdma1", "mout_user_aclk266", GATE_IP_GEN, 4, 0, 0), 8550a22c306SShaik Ameer Basha GATE(CLK_TOP_RTC, "top_rtc", "aclk66_psgen", GATE_IP_GEN, 5, 0, 0), 8560a22c306SShaik Ameer Basha GATE(CLK_SMMU_ROTATOR, "smmu_rotator", "dout_gen_blk", 8570a22c306SShaik Ameer Basha GATE_IP_GEN, 6, 0, 0), 8580a22c306SShaik Ameer Basha GATE(CLK_SMMU_JPEG, "smmu_jpeg", "dout_jpg_blk", GATE_IP_GEN, 7, 0, 0), 8590a22c306SShaik Ameer Basha GATE(CLK_SMMU_MDMA1, "smmu_mdma1", "dout_gen_blk", 8600a22c306SShaik Ameer Basha GATE_IP_GEN, 9, 0, 0), 8610a22c306SShaik Ameer Basha 8620a22c306SShaik Ameer Basha /* GATE_IP_GEN doesn't list gates for smmu_jpeg2 and mc */ 8630a22c306SShaik Ameer Basha GATE(CLK_SMMU_JPEG2, "smmu_jpeg2", "dout_jpg_blk", 8640a22c306SShaik Ameer Basha GATE_BUS_GEN, 28, 0, 0), 8650a22c306SShaik Ameer Basha GATE(CLK_MC, "mc", "aclk66_psgen", GATE_BUS_GEN, 12, 0, 0), 8661609027fSChander Kashyap 86702932381SShaik Ameer Basha /* GSCL Block */ 86802932381SShaik Ameer Basha GATE(CLK_SCLK_GSCL_WA, "sclk_gscl_wa", "mout_user_aclk333_432_gscl", 86902932381SShaik Ameer Basha GATE_TOP_SCLK_GSCL, 6, 0, 0), 87002932381SShaik Ameer Basha GATE(CLK_SCLK_GSCL_WB, "sclk_gscl_wb", "mout_user_aclk333_432_gscl", 87102932381SShaik Ameer Basha GATE_TOP_SCLK_GSCL, 7, 0, 0), 87202932381SShaik Ameer Basha 873cba9d2faSAndrzej Hajda GATE(CLK_GSCL0, "gscl0", "aclk300_gscl", GATE_IP_GSCL0, 0, 0, 0), 874cba9d2faSAndrzej Hajda GATE(CLK_GSCL1, "gscl1", "aclk300_gscl", GATE_IP_GSCL0, 1, 0, 0), 87502932381SShaik Ameer Basha GATE(CLK_FIMC_3AA, "fimc_3aa", "aclk333_432_gscl", 87602932381SShaik Ameer Basha GATE_IP_GSCL0, 4, 0, 0), 87702932381SShaik Ameer Basha GATE(CLK_FIMC_LITE0, "fimc_lite0", "aclk333_432_gscl", 87802932381SShaik Ameer Basha GATE_IP_GSCL0, 5, 0, 0), 87902932381SShaik Ameer Basha GATE(CLK_FIMC_LITE1, "fimc_lite1", "aclk333_432_gscl", 88002932381SShaik Ameer Basha GATE_IP_GSCL0, 6, 0, 0), 8811609027fSChander Kashyap 88202932381SShaik Ameer Basha GATE(CLK_SMMU_3AA, "smmu_3aa", "dout_gscl_blk_333", 88302932381SShaik Ameer Basha GATE_IP_GSCL1, 2, 0, 0), 88402932381SShaik Ameer Basha GATE(CLK_SMMU_FIMCL0, "smmu_fimcl0", "dout_gscl_blk_333", 8851609027fSChander Kashyap GATE_IP_GSCL1, 3, 0, 0), 88602932381SShaik Ameer Basha GATE(CLK_SMMU_FIMCL1, "smmu_fimcl1", "dout_gscl_blk_333", 8871609027fSChander Kashyap GATE_IP_GSCL1, 4, 0, 0), 88802932381SShaik Ameer Basha GATE(CLK_SMMU_GSCL0, "smmu_gscl0", "dout_gscl_blk_300", 88902932381SShaik Ameer Basha GATE_IP_GSCL1, 6, 0, 0), 89002932381SShaik Ameer Basha GATE(CLK_SMMU_GSCL1, "smmu_gscl1", "dout_gscl_blk_300", 89102932381SShaik Ameer Basha GATE_IP_GSCL1, 7, 0, 0), 89202932381SShaik Ameer Basha GATE(CLK_GSCL_WA, "gscl_wa", "sclk_gscl_wa", GATE_IP_GSCL1, 12, 0, 0), 89302932381SShaik Ameer Basha GATE(CLK_GSCL_WB, "gscl_wb", "sclk_gscl_wb", GATE_IP_GSCL1, 13, 0, 0), 89402932381SShaik Ameer Basha GATE(CLK_SMMU_FIMCL3, "smmu_fimcl3,", "dout_gscl_blk_333", 8951609027fSChander Kashyap GATE_IP_GSCL1, 16, 0, 0), 896cba9d2faSAndrzej Hajda GATE(CLK_FIMC_LITE3, "fimc_lite3", "aclk333_432_gscl", 8971609027fSChander Kashyap GATE_IP_GSCL1, 17, 0, 0), 8981609027fSChander Kashyap 89902932381SShaik Ameer Basha /* MSCL Block */ 90002932381SShaik Ameer Basha GATE(CLK_MSCL0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0), 90102932381SShaik Ameer Basha GATE(CLK_MSCL1, "mscl1", "aclk400_mscl", GATE_IP_MSCL, 1, 0, 0), 90202932381SShaik Ameer Basha GATE(CLK_MSCL2, "mscl2", "aclk400_mscl", GATE_IP_MSCL, 2, 0, 0), 9034549d93dSShaik Ameer Basha GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "dout_mscl_blk", 90402932381SShaik Ameer Basha GATE_IP_MSCL, 8, 0, 0), 9054549d93dSShaik Ameer Basha GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "dout_mscl_blk", 90602932381SShaik Ameer Basha GATE_IP_MSCL, 9, 0, 0), 9074549d93dSShaik Ameer Basha GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "dout_mscl_blk", 90802932381SShaik Ameer Basha GATE_IP_MSCL, 10, 0, 0), 90902932381SShaik Ameer Basha 910cba9d2faSAndrzej Hajda GATE(CLK_FIMD1, "fimd1", "aclk300_disp1", GATE_IP_DISP1, 0, 0, 0), 911cba9d2faSAndrzej Hajda GATE(CLK_DSIM1, "dsim1", "aclk200_disp1", GATE_IP_DISP1, 3, 0, 0), 912cba9d2faSAndrzej Hajda GATE(CLK_DP1, "dp1", "aclk200_disp1", GATE_IP_DISP1, 4, 0, 0), 913424b673aSShaik Ameer Basha GATE(CLK_MIXER, "mixer", "aclk200_disp1", GATE_IP_DISP1, 5, 0, 0), 914cba9d2faSAndrzej Hajda GATE(CLK_HDMI, "hdmi", "aclk200_disp1", GATE_IP_DISP1, 6, 0, 0), 915424b673aSShaik Ameer Basha GATE(CLK_SMMU_FIMD1M0, "smmu_fimd1m0", "dout_disp1_blk", 916424b673aSShaik Ameer Basha GATE_IP_DISP1, 7, 0, 0), 917424b673aSShaik Ameer Basha GATE(CLK_SMMU_FIMD1M1, "smmu_fimd1m1", "dout_disp1_blk", 918424b673aSShaik Ameer Basha GATE_IP_DISP1, 8, 0, 0), 919424b673aSShaik Ameer Basha GATE(CLK_SMMU_MIXER, "smmu_mixer", "aclk200_disp1", 920424b673aSShaik Ameer Basha GATE_IP_DISP1, 9, 0, 0), 9211609027fSChander Kashyap 9223a767b35SShaik Ameer Basha /* ISP */ 9233a767b35SShaik Ameer Basha GATE(CLK_SCLK_UART_ISP, "sclk_uart_isp", "dout_uart_isp", 9243a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 0, CLK_SET_RATE_PARENT, 0), 9253a767b35SShaik Ameer Basha GATE(CLK_SCLK_SPI0_ISP, "sclk_spi0_isp", "dout_spi0_isp_pre", 9263a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 1, CLK_SET_RATE_PARENT, 0), 9273a767b35SShaik Ameer Basha GATE(CLK_SCLK_SPI1_ISP, "sclk_spi1_isp", "dout_spi1_isp_pre", 9283a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 2, CLK_SET_RATE_PARENT, 0), 9293a767b35SShaik Ameer Basha GATE(CLK_SCLK_PWM_ISP, "sclk_pwm_isp", "dout_pwm_isp", 9303a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 3, CLK_SET_RATE_PARENT, 0), 9313a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR0, "sclk_isp_sensor0", "dout_isp_sensor0", 9323a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 4, CLK_SET_RATE_PARENT, 0), 9333a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR1, "sclk_isp_sensor1", "dout_isp_sensor1", 9343a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 8, CLK_SET_RATE_PARENT, 0), 9353a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR2, "sclk_isp_sensor2", "dout_isp_sensor2", 9363a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 12, CLK_SET_RATE_PARENT, 0), 9373a767b35SShaik Ameer Basha 938cba9d2faSAndrzej Hajda GATE(CLK_MFC, "mfc", "aclk333", GATE_IP_MFC, 0, 0, 0), 939cba9d2faSAndrzej Hajda GATE(CLK_SMMU_MFCL, "smmu_mfcl", "aclk333", GATE_IP_MFC, 1, 0, 0), 940cba9d2faSAndrzej Hajda GATE(CLK_SMMU_MFCR, "smmu_mfcr", "aclk333", GATE_IP_MFC, 2, 0, 0), 9411609027fSChander Kashyap 9423fac5941SShaik Ameer Basha GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0), 9431609027fSChander Kashyap }; 9441609027fSChander Kashyap 945202e5ae9SSachin Kamat static struct samsung_pll_clock exynos5420_plls[nr_plls] __initdata = { 946cba9d2faSAndrzej Hajda [apll] = PLL(pll_2550, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK, 9473ff6e0d8SYadwinder Singh Brar APLL_CON0, NULL), 948cba9d2faSAndrzej Hajda [cpll] = PLL(pll_2550, CLK_FOUT_CPLL, "fout_cpll", "fin_pll", CPLL_LOCK, 949cdf64eeeSChander Kashyap CPLL_CON0, NULL), 950cba9d2faSAndrzej Hajda [dpll] = PLL(pll_2550, CLK_FOUT_DPLL, "fout_dpll", "fin_pll", DPLL_LOCK, 9513ff6e0d8SYadwinder Singh Brar DPLL_CON0, NULL), 952cba9d2faSAndrzej Hajda [epll] = PLL(pll_2650, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK, 9533ff6e0d8SYadwinder Singh Brar EPLL_CON0, NULL), 954cba9d2faSAndrzej Hajda [rpll] = PLL(pll_2650, CLK_FOUT_RPLL, "fout_rpll", "fin_pll", RPLL_LOCK, 9553ff6e0d8SYadwinder Singh Brar RPLL_CON0, NULL), 956cba9d2faSAndrzej Hajda [ipll] = PLL(pll_2550, CLK_FOUT_IPLL, "fout_ipll", "fin_pll", IPLL_LOCK, 9573ff6e0d8SYadwinder Singh Brar IPLL_CON0, NULL), 958cba9d2faSAndrzej Hajda [spll] = PLL(pll_2550, CLK_FOUT_SPLL, "fout_spll", "fin_pll", SPLL_LOCK, 9593ff6e0d8SYadwinder Singh Brar SPLL_CON0, NULL), 960cba9d2faSAndrzej Hajda [vpll] = PLL(pll_2550, CLK_FOUT_VPLL, "fout_vpll", "fin_pll", VPLL_LOCK, 9613ff6e0d8SYadwinder Singh Brar VPLL_CON0, NULL), 962cba9d2faSAndrzej Hajda [mpll] = PLL(pll_2550, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK, 9633ff6e0d8SYadwinder Singh Brar MPLL_CON0, NULL), 964cba9d2faSAndrzej Hajda [bpll] = PLL(pll_2550, CLK_FOUT_BPLL, "fout_bpll", "fin_pll", BPLL_LOCK, 9653ff6e0d8SYadwinder Singh Brar BPLL_CON0, NULL), 966cba9d2faSAndrzej Hajda [kpll] = PLL(pll_2550, CLK_FOUT_KPLL, "fout_kpll", "fin_pll", KPLL_LOCK, 9673ff6e0d8SYadwinder Singh Brar KPLL_CON0, NULL), 968c898c6b7SYadwinder Singh Brar }; 969c898c6b7SYadwinder Singh Brar 970202e5ae9SSachin Kamat static struct of_device_id ext_clk_match[] __initdata = { 9711609027fSChander Kashyap { .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, }, 9721609027fSChander Kashyap { }, 9731609027fSChander Kashyap }; 9741609027fSChander Kashyap 9751609027fSChander Kashyap /* register exynos5420 clocks */ 976c7306229SSachin Kamat static void __init exynos5420_clk_init(struct device_node *np) 9771609027fSChander Kashyap { 978976face4SRahul Sharma struct samsung_clk_provider *ctx; 979976face4SRahul Sharma 9801609027fSChander Kashyap if (np) { 9811609027fSChander Kashyap reg_base = of_iomap(np, 0); 9821609027fSChander Kashyap if (!reg_base) 9831609027fSChander Kashyap panic("%s: failed to map registers\n", __func__); 9841609027fSChander Kashyap } else { 9851609027fSChander Kashyap panic("%s: unable to determine soc\n", __func__); 9861609027fSChander Kashyap } 9871609027fSChander Kashyap 988976face4SRahul Sharma ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS); 989976face4SRahul Sharma if (!ctx) 990976face4SRahul Sharma panic("%s: unable to allocate context.\n", __func__); 991976face4SRahul Sharma 992976face4SRahul Sharma samsung_clk_of_register_fixed_ext(ctx, exynos5420_fixed_rate_ext_clks, 9931609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_rate_ext_clks), 9941609027fSChander Kashyap ext_clk_match); 995976face4SRahul Sharma samsung_clk_register_pll(ctx, exynos5420_plls, 996976face4SRahul Sharma ARRAY_SIZE(exynos5420_plls), 997c898c6b7SYadwinder Singh Brar reg_base); 998976face4SRahul Sharma samsung_clk_register_fixed_rate(ctx, exynos5420_fixed_rate_clks, 9991609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_rate_clks)); 1000976face4SRahul Sharma samsung_clk_register_fixed_factor(ctx, exynos5420_fixed_factor_clks, 10011609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_factor_clks)); 1002976face4SRahul Sharma samsung_clk_register_mux(ctx, exynos5420_mux_clks, 10031609027fSChander Kashyap ARRAY_SIZE(exynos5420_mux_clks)); 1004976face4SRahul Sharma samsung_clk_register_div(ctx, exynos5420_div_clks, 10051609027fSChander Kashyap ARRAY_SIZE(exynos5420_div_clks)); 1006976face4SRahul Sharma samsung_clk_register_gate(ctx, exynos5420_gate_clks, 10071609027fSChander Kashyap ARRAY_SIZE(exynos5420_gate_clks)); 1008388c7885STomasz Figa 1009388c7885STomasz Figa exynos5420_clk_sleep_init(); 10101609027fSChander Kashyap } 10111609027fSChander Kashyap CLK_OF_DECLARE(exynos5420_clk, "samsung,exynos5420-clock", exynos5420_clk_init); 1012