11609027fSChander Kashyap /* 21609027fSChander Kashyap * Copyright (c) 2013 Samsung Electronics Co., Ltd. 31609027fSChander Kashyap * Authors: Thomas Abraham <thomas.ab@samsung.com> 41609027fSChander Kashyap * Chander Kashyap <k.chander@samsung.com> 51609027fSChander Kashyap * 61609027fSChander Kashyap * This program is free software; you can redistribute it and/or modify 71609027fSChander Kashyap * it under the terms of the GNU General Public License version 2 as 81609027fSChander Kashyap * published by the Free Software Foundation. 91609027fSChander Kashyap * 101609027fSChander Kashyap * Common Clock Framework support for Exynos5420 SoC. 111609027fSChander Kashyap */ 121609027fSChander Kashyap 13cba9d2faSAndrzej Hajda #include <dt-bindings/clock/exynos5420.h> 141609027fSChander Kashyap #include <linux/clk.h> 151609027fSChander Kashyap #include <linux/clkdev.h> 161609027fSChander Kashyap #include <linux/clk-provider.h> 171609027fSChander Kashyap #include <linux/of.h> 181609027fSChander Kashyap #include <linux/of_address.h> 19388c7885STomasz Figa #include <linux/syscore_ops.h> 201609027fSChander Kashyap 211609027fSChander Kashyap #include "clk.h" 221609027fSChander Kashyap 23c898c6b7SYadwinder Singh Brar #define APLL_LOCK 0x0 24c898c6b7SYadwinder Singh Brar #define APLL_CON0 0x100 251609027fSChander Kashyap #define SRC_CPU 0x200 261609027fSChander Kashyap #define DIV_CPU0 0x500 271609027fSChander Kashyap #define DIV_CPU1 0x504 281609027fSChander Kashyap #define GATE_BUS_CPU 0x700 291609027fSChander Kashyap #define GATE_SCLK_CPU 0x800 305b73721bSNaveen Krishna Chatradhi #define GATE_IP_G2D 0x8800 31c898c6b7SYadwinder Singh Brar #define CPLL_LOCK 0x10020 32c898c6b7SYadwinder Singh Brar #define DPLL_LOCK 0x10030 33c898c6b7SYadwinder Singh Brar #define EPLL_LOCK 0x10040 34c898c6b7SYadwinder Singh Brar #define RPLL_LOCK 0x10050 35c898c6b7SYadwinder Singh Brar #define IPLL_LOCK 0x10060 36c898c6b7SYadwinder Singh Brar #define SPLL_LOCK 0x10070 3753cb6342SSachin Kamat #define VPLL_LOCK 0x10080 38c898c6b7SYadwinder Singh Brar #define MPLL_LOCK 0x10090 39c898c6b7SYadwinder Singh Brar #define CPLL_CON0 0x10120 40c898c6b7SYadwinder Singh Brar #define DPLL_CON0 0x10128 41c898c6b7SYadwinder Singh Brar #define EPLL_CON0 0x10130 42c898c6b7SYadwinder Singh Brar #define RPLL_CON0 0x10140 43c898c6b7SYadwinder Singh Brar #define IPLL_CON0 0x10150 44c898c6b7SYadwinder Singh Brar #define SPLL_CON0 0x10160 45c898c6b7SYadwinder Singh Brar #define VPLL_CON0 0x10170 46c898c6b7SYadwinder Singh Brar #define MPLL_CON0 0x10180 471609027fSChander Kashyap #define SRC_TOP0 0x10200 481609027fSChander Kashyap #define SRC_TOP1 0x10204 491609027fSChander Kashyap #define SRC_TOP2 0x10208 501609027fSChander Kashyap #define SRC_TOP3 0x1020c 511609027fSChander Kashyap #define SRC_TOP4 0x10210 521609027fSChander Kashyap #define SRC_TOP5 0x10214 531609027fSChander Kashyap #define SRC_TOP6 0x10218 541609027fSChander Kashyap #define SRC_TOP7 0x1021c 551609027fSChander Kashyap #define SRC_DISP10 0x1022c 561609027fSChander Kashyap #define SRC_MAU 0x10240 571609027fSChander Kashyap #define SRC_FSYS 0x10244 581609027fSChander Kashyap #define SRC_PERIC0 0x10250 591609027fSChander Kashyap #define SRC_PERIC1 0x10254 603a767b35SShaik Ameer Basha #define SRC_ISP 0x10270 611609027fSChander Kashyap #define SRC_TOP10 0x10280 621609027fSChander Kashyap #define SRC_TOP11 0x10284 631609027fSChander Kashyap #define SRC_TOP12 0x10288 641609027fSChander Kashyap #define SRC_MASK_DISP10 0x1032c 651609027fSChander Kashyap #define SRC_MASK_FSYS 0x10340 661609027fSChander Kashyap #define SRC_MASK_PERIC0 0x10350 671609027fSChander Kashyap #define SRC_MASK_PERIC1 0x10354 681609027fSChander Kashyap #define DIV_TOP0 0x10500 691609027fSChander Kashyap #define DIV_TOP1 0x10504 701609027fSChander Kashyap #define DIV_TOP2 0x10508 711609027fSChander Kashyap #define DIV_DISP10 0x1052c 721609027fSChander Kashyap #define DIV_MAU 0x10544 731609027fSChander Kashyap #define DIV_FSYS0 0x10548 741609027fSChander Kashyap #define DIV_FSYS1 0x1054c 751609027fSChander Kashyap #define DIV_FSYS2 0x10550 761609027fSChander Kashyap #define DIV_PERIC0 0x10558 771609027fSChander Kashyap #define DIV_PERIC1 0x1055c 781609027fSChander Kashyap #define DIV_PERIC2 0x10560 791609027fSChander Kashyap #define DIV_PERIC3 0x10564 801609027fSChander Kashyap #define DIV_PERIC4 0x10568 813a767b35SShaik Ameer Basha #define SCLK_DIV_ISP0 0x10580 823a767b35SShaik Ameer Basha #define SCLK_DIV_ISP1 0x10584 831609027fSChander Kashyap #define GATE_BUS_TOP 0x10700 841609027fSChander Kashyap #define GATE_BUS_FSYS0 0x10740 851609027fSChander Kashyap #define GATE_BUS_PERIC 0x10750 861609027fSChander Kashyap #define GATE_BUS_PERIC1 0x10754 871609027fSChander Kashyap #define GATE_BUS_PERIS0 0x10760 881609027fSChander Kashyap #define GATE_BUS_PERIS1 0x10764 893a767b35SShaik Ameer Basha #define GATE_TOP_SCLK_ISP 0x10870 901609027fSChander Kashyap #define GATE_IP_GSCL0 0x10910 911609027fSChander Kashyap #define GATE_IP_GSCL1 0x10920 921609027fSChander Kashyap #define GATE_IP_MFC 0x1092c 931609027fSChander Kashyap #define GATE_IP_DISP1 0x10928 941609027fSChander Kashyap #define GATE_IP_G3D 0x10930 951609027fSChander Kashyap #define GATE_IP_GEN 0x10934 961609027fSChander Kashyap #define GATE_IP_MSCL 0x10970 971609027fSChander Kashyap #define GATE_TOP_SCLK_GSCL 0x10820 981609027fSChander Kashyap #define GATE_TOP_SCLK_DISP1 0x10828 991609027fSChander Kashyap #define GATE_TOP_SCLK_MAU 0x1083c 1001609027fSChander Kashyap #define GATE_TOP_SCLK_FSYS 0x10840 1011609027fSChander Kashyap #define GATE_TOP_SCLK_PERIC 0x10850 102c898c6b7SYadwinder Singh Brar #define BPLL_LOCK 0x20010 103c898c6b7SYadwinder Singh Brar #define BPLL_CON0 0x20110 1041609027fSChander Kashyap #define SRC_CDREX 0x20200 105c898c6b7SYadwinder Singh Brar #define KPLL_LOCK 0x28000 106c898c6b7SYadwinder Singh Brar #define KPLL_CON0 0x28100 1071609027fSChander Kashyap #define SRC_KFC 0x28200 1081609027fSChander Kashyap #define DIV_KFC0 0x28500 1091609027fSChander Kashyap 110c898c6b7SYadwinder Singh Brar /* list of PLLs */ 111c898c6b7SYadwinder Singh Brar enum exynos5420_plls { 112c898c6b7SYadwinder Singh Brar apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, 113c898c6b7SYadwinder Singh Brar bpll, kpll, 114c898c6b7SYadwinder Singh Brar nr_plls /* number of PLLs */ 115c898c6b7SYadwinder Singh Brar }; 116c898c6b7SYadwinder Singh Brar 117388c7885STomasz Figa static void __iomem *reg_base; 118388c7885STomasz Figa 119388c7885STomasz Figa #ifdef CONFIG_PM_SLEEP 120388c7885STomasz Figa static struct samsung_clk_reg_dump *exynos5420_save; 121388c7885STomasz Figa 1221609027fSChander Kashyap /* 1231609027fSChander Kashyap * list of controller registers to be saved and restored during a 1241609027fSChander Kashyap * suspend/resume cycle. 1251609027fSChander Kashyap */ 126202e5ae9SSachin Kamat static unsigned long exynos5420_clk_regs[] __initdata = { 1271609027fSChander Kashyap SRC_CPU, 1281609027fSChander Kashyap DIV_CPU0, 1291609027fSChander Kashyap DIV_CPU1, 1301609027fSChander Kashyap GATE_BUS_CPU, 1311609027fSChander Kashyap GATE_SCLK_CPU, 1321609027fSChander Kashyap SRC_TOP0, 1331609027fSChander Kashyap SRC_TOP1, 1341609027fSChander Kashyap SRC_TOP2, 1351609027fSChander Kashyap SRC_TOP3, 1361609027fSChander Kashyap SRC_TOP4, 1371609027fSChander Kashyap SRC_TOP5, 1381609027fSChander Kashyap SRC_TOP6, 1391609027fSChander Kashyap SRC_TOP7, 1401609027fSChander Kashyap SRC_DISP10, 1411609027fSChander Kashyap SRC_MAU, 1421609027fSChander Kashyap SRC_FSYS, 1431609027fSChander Kashyap SRC_PERIC0, 1441609027fSChander Kashyap SRC_PERIC1, 1451609027fSChander Kashyap SRC_TOP10, 1461609027fSChander Kashyap SRC_TOP11, 1471609027fSChander Kashyap SRC_TOP12, 1481609027fSChander Kashyap SRC_MASK_DISP10, 1491609027fSChander Kashyap SRC_MASK_FSYS, 1501609027fSChander Kashyap SRC_MASK_PERIC0, 1511609027fSChander Kashyap SRC_MASK_PERIC1, 1523a767b35SShaik Ameer Basha SRC_ISP, 1531609027fSChander Kashyap DIV_TOP0, 1541609027fSChander Kashyap DIV_TOP1, 1551609027fSChander Kashyap DIV_TOP2, 1561609027fSChander Kashyap DIV_DISP10, 1571609027fSChander Kashyap DIV_MAU, 1581609027fSChander Kashyap DIV_FSYS0, 1591609027fSChander Kashyap DIV_FSYS1, 1601609027fSChander Kashyap DIV_FSYS2, 1611609027fSChander Kashyap DIV_PERIC0, 1621609027fSChander Kashyap DIV_PERIC1, 1631609027fSChander Kashyap DIV_PERIC2, 1641609027fSChander Kashyap DIV_PERIC3, 1651609027fSChander Kashyap DIV_PERIC4, 1663a767b35SShaik Ameer Basha SCLK_DIV_ISP0, 1673a767b35SShaik Ameer Basha SCLK_DIV_ISP1, 1681609027fSChander Kashyap GATE_BUS_TOP, 1691609027fSChander Kashyap GATE_BUS_FSYS0, 1701609027fSChander Kashyap GATE_BUS_PERIC, 1711609027fSChander Kashyap GATE_BUS_PERIC1, 1721609027fSChander Kashyap GATE_BUS_PERIS0, 1731609027fSChander Kashyap GATE_BUS_PERIS1, 1743a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 1751609027fSChander Kashyap GATE_IP_GSCL0, 1761609027fSChander Kashyap GATE_IP_GSCL1, 1771609027fSChander Kashyap GATE_IP_MFC, 1781609027fSChander Kashyap GATE_IP_DISP1, 1791609027fSChander Kashyap GATE_IP_G3D, 1801609027fSChander Kashyap GATE_IP_GEN, 1811609027fSChander Kashyap GATE_IP_MSCL, 1821609027fSChander Kashyap GATE_TOP_SCLK_GSCL, 1831609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 1841609027fSChander Kashyap GATE_TOP_SCLK_MAU, 1851609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 1861609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 1871609027fSChander Kashyap SRC_CDREX, 1881609027fSChander Kashyap SRC_KFC, 1891609027fSChander Kashyap DIV_KFC0, 1901609027fSChander Kashyap }; 1911609027fSChander Kashyap 192388c7885STomasz Figa static int exynos5420_clk_suspend(void) 193388c7885STomasz Figa { 194388c7885STomasz Figa samsung_clk_save(reg_base, exynos5420_save, 195388c7885STomasz Figa ARRAY_SIZE(exynos5420_clk_regs)); 196388c7885STomasz Figa 197388c7885STomasz Figa return 0; 198388c7885STomasz Figa } 199388c7885STomasz Figa 200388c7885STomasz Figa static void exynos5420_clk_resume(void) 201388c7885STomasz Figa { 202388c7885STomasz Figa samsung_clk_restore(reg_base, exynos5420_save, 203388c7885STomasz Figa ARRAY_SIZE(exynos5420_clk_regs)); 204388c7885STomasz Figa } 205388c7885STomasz Figa 206388c7885STomasz Figa static struct syscore_ops exynos5420_clk_syscore_ops = { 207388c7885STomasz Figa .suspend = exynos5420_clk_suspend, 208388c7885STomasz Figa .resume = exynos5420_clk_resume, 209388c7885STomasz Figa }; 210388c7885STomasz Figa 211388c7885STomasz Figa static void exynos5420_clk_sleep_init(void) 212388c7885STomasz Figa { 213388c7885STomasz Figa exynos5420_save = samsung_clk_alloc_reg_dump(exynos5420_clk_regs, 214388c7885STomasz Figa ARRAY_SIZE(exynos5420_clk_regs)); 215388c7885STomasz Figa if (!exynos5420_save) { 216388c7885STomasz Figa pr_warn("%s: failed to allocate sleep save data, no sleep support!\n", 217388c7885STomasz Figa __func__); 218388c7885STomasz Figa return; 219388c7885STomasz Figa } 220388c7885STomasz Figa 221388c7885STomasz Figa register_syscore_ops(&exynos5420_clk_syscore_ops); 222388c7885STomasz Figa } 223388c7885STomasz Figa #else 224388c7885STomasz Figa static void exynos5420_clk_sleep_init(void) {} 225388c7885STomasz Figa #endif 226388c7885STomasz Figa 2271609027fSChander Kashyap /* list of all parent clocks */ 228dbd713bbSShaik Ameer Basha PNAME(mout_mspll_cpu_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 229dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll"}; 230dbd713bbSShaik Ameer Basha PNAME(mout_cpu_p) = {"mout_apll" , "mout_mspll_cpu"}; 231dbd713bbSShaik Ameer Basha PNAME(mout_kfc_p) = {"mout_kpll" , "mout_mspll_kfc"}; 232dbd713bbSShaik Ameer Basha PNAME(mout_apll_p) = {"fin_pll", "fout_apll"}; 233dbd713bbSShaik Ameer Basha PNAME(mout_bpll_p) = {"fin_pll", "fout_bpll"}; 234dbd713bbSShaik Ameer Basha PNAME(mout_cpll_p) = {"fin_pll", "fout_cpll"}; 235dbd713bbSShaik Ameer Basha PNAME(mout_dpll_p) = {"fin_pll", "fout_dpll"}; 236dbd713bbSShaik Ameer Basha PNAME(mout_epll_p) = {"fin_pll", "fout_epll"}; 237dbd713bbSShaik Ameer Basha PNAME(mout_ipll_p) = {"fin_pll", "fout_ipll"}; 238dbd713bbSShaik Ameer Basha PNAME(mout_kpll_p) = {"fin_pll", "fout_kpll"}; 239dbd713bbSShaik Ameer Basha PNAME(mout_mpll_p) = {"fin_pll", "fout_mpll"}; 240dbd713bbSShaik Ameer Basha PNAME(mout_rpll_p) = {"fin_pll", "fout_rpll"}; 241dbd713bbSShaik Ameer Basha PNAME(mout_spll_p) = {"fin_pll", "fout_spll"}; 242dbd713bbSShaik Ameer Basha PNAME(mout_vpll_p) = {"fin_pll", "fout_vpll"}; 2431609027fSChander Kashyap 244dbd713bbSShaik Ameer Basha PNAME(mout_group1_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 245dbd713bbSShaik Ameer Basha "mout_sclk_mpll"}; 246dbd713bbSShaik Ameer Basha PNAME(mout_group2_p) = {"fin_pll", "mout_sclk_cpll", 247dbd713bbSShaik Ameer Basha "mout_sclk_dpll", "mout_sclk_mpll", "mout_sclk_spll", 248dbd713bbSShaik Ameer Basha "mout_sclk_ipll", "mout_sclk_epll", "mout_sclk_rpll"}; 249dbd713bbSShaik Ameer Basha PNAME(mout_group3_p) = {"mout_sclk_rpll", "mout_sclk_spll"}; 250dbd713bbSShaik Ameer Basha PNAME(mout_group4_p) = {"mout_sclk_ipll", "mout_sclk_dpll", "mout_sclk_mpll"}; 251dbd713bbSShaik Ameer Basha PNAME(mout_group5_p) = {"mout_sclk_vpll", "mout_sclk_dpll"}; 2521609027fSChander Kashyap 253dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk66_p) = {"dout_aclk66", "mout_sclk_spll"}; 254dbd713bbSShaik Ameer Basha PNAME(mout_aclk66_peric_p) = { "fin_pll", "mout_sw_aclk66" }; 2551609027fSChander Kashyap 256dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_fsys_p) = {"dout_aclk200_fsys", "mout_sclk_spll"}; 257dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk200_fsys_p) = {"fin_pll", "mout_sw_aclk200_fsys"}; 2581609027fSChander Kashyap 259dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_fsys2_p) = {"dout_aclk200_fsys2", "mout_sclk_spll"}; 260dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk200_fsys2_p) = {"fin_pll", "mout_sw_aclk200_fsys2"}; 2613a767b35SShaik Ameer Basha PNAME(mout_sw_aclk400_isp_p) = {"dout_aclk400_isp", "mout_sclk_spll"}; 2623a767b35SShaik Ameer Basha PNAME(mout_user_aclk400_isp_p) = {"fin_pll", "mout_sw_aclk400_isp"}; 2633a767b35SShaik Ameer Basha 2643a767b35SShaik Ameer Basha PNAME(mout_sw_aclk333_432_isp0_p) = {"dout_aclk333_432_isp0", 2653a767b35SShaik Ameer Basha "mout_sclk_spll"}; 2663a767b35SShaik Ameer Basha PNAME(mout_user_aclk333_432_isp0_p) = {"fin_pll", "mout_sw_aclk333_432_isp0"}; 2673a767b35SShaik Ameer Basha 2683a767b35SShaik Ameer Basha PNAME(mout_sw_aclk333_432_isp_p) = {"dout_aclk333_432_isp", "mout_sclk_spll"}; 2693a767b35SShaik Ameer Basha PNAME(mout_user_aclk333_432_isp_p) = {"fin_pll", "mout_sw_aclk333_432_isp"}; 2701609027fSChander Kashyap 271dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk200_p) = {"dout_aclk200", "mout_sclk_spll"}; 272dbd713bbSShaik Ameer Basha PNAME(mout_aclk200_disp1_p) = {"fin_pll", "mout_sw_aclk200"}; 2731609027fSChander Kashyap 274dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk400_mscl_p) = {"dout_aclk400_mscl", "mout_sclk_spll"}; 275dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk400_mscl_p) = {"fin_pll", "mout_sw_aclk400_mscl"}; 2761609027fSChander Kashyap 277dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_p) = {"dout_aclk333", "mout_sclk_spll"}; 278dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_p) = {"fin_pll", "mout_sw_aclk333"}; 2791609027fSChander Kashyap 280dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk166_p) = {"dout_aclk166", "mout_sclk_spll"}; 281dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk166_p) = {"fin_pll", "mout_sw_aclk166"}; 2821609027fSChander Kashyap 283dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk266_p) = {"dout_aclk266", "mout_sclk_spll"}; 284dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk266_p) = {"fin_pll", "mout_sw_aclk266"}; 2853a767b35SShaik Ameer Basha PNAME(mout_user_aclk266_isp_p) = {"fin_pll", "mout_sw_aclk266"}; 2861609027fSChander Kashyap 287dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_432_gscl_p) = {"dout_aclk333_432_gscl", "mout_sclk_spll"}; 288dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_432_gscl_p) = {"fin_pll", "mout_sw_aclk333_432_gscl"}; 2891609027fSChander Kashyap 290dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_gscl_p) = {"dout_aclk300_gscl", "mout_sclk_spll"}; 291dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_gscl_p) = {"fin_pll", "mout_sw_aclk300_gscl"}; 2921609027fSChander Kashyap 293dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_disp1_p) = {"dout_aclk300_disp1", "mout_sclk_spll"}; 294dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_disp1_p) = {"fin_pll", "mout_sw_aclk300_disp1"}; 2951609027fSChander Kashyap 296dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk300_jpeg_p) = {"dout_aclk300_jpeg", "mout_sclk_spll"}; 297dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk300_jpeg_p) = {"fin_pll", "mout_sw_aclk300_jpeg"}; 2981609027fSChander Kashyap 299dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk_g3d_p) = {"dout_aclk_g3d", "mout_sclk_spll"}; 300dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk_g3d_p) = {"fin_pll", "mout_sw_aclk_g3d"}; 3011609027fSChander Kashyap 302dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk266_g2d_p) = {"dout_aclk266_g2d", "mout_sclk_spll"}; 303dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk266_g2d_p) = {"fin_pll", "mout_sw_aclk266_g2d"}; 3041609027fSChander Kashyap 305dbd713bbSShaik Ameer Basha PNAME(mout_sw_aclk333_g2d_p) = {"dout_aclk333_g2d", "mout_sclk_spll"}; 306dbd713bbSShaik Ameer Basha PNAME(mout_user_aclk333_g2d_p) = {"fin_pll", "mout_sw_aclk333_g2d"}; 3071609027fSChander Kashyap 308dbd713bbSShaik Ameer Basha PNAME(mout_audio0_p) = {"fin_pll", "cdclk0", "mout_sclk_dpll", 309dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 310dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 311dbd713bbSShaik Ameer Basha PNAME(mout_audio1_p) = {"fin_pll", "cdclk1", "mout_sclk_dpll", 312dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 313dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 314dbd713bbSShaik Ameer Basha PNAME(mout_audio2_p) = {"fin_pll", "cdclk2", "mout_sclk_dpll", 315dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 316dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 317dbd713bbSShaik Ameer Basha PNAME(mout_spdif_p) = {"fin_pll", "dout_audio0", "dout_audio1", 318dbd713bbSShaik Ameer Basha "dout_audio2", "spdif_extclk", "mout_sclk_ipll", 319dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 320dbd713bbSShaik Ameer Basha PNAME(mout_hdmi_p) = {"dout_hdmi_pixel", "sclk_hdmiphy"}; 321dbd713bbSShaik Ameer Basha PNAME(mout_maudio0_p) = {"fin_pll", "maudio_clk", "mout_sclk_dpll", 322dbd713bbSShaik Ameer Basha "mout_sclk_mpll", "mout_sclk_spll", "mout_sclk_ipll", 323dbd713bbSShaik Ameer Basha "mout_sclk_epll", "mout_sclk_rpll"}; 3241609027fSChander Kashyap 3251609027fSChander Kashyap /* fixed rate clocks generated outside the soc */ 326c7306229SSachin Kamat static struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[] __initdata = { 327cba9d2faSAndrzej Hajda FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0), 3281609027fSChander Kashyap }; 3291609027fSChander Kashyap 3301609027fSChander Kashyap /* fixed rate clocks generated inside the soc */ 331c7306229SSachin Kamat static struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[] __initdata = { 332cba9d2faSAndrzej Hajda FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), 333cba9d2faSAndrzej Hajda FRATE(0, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000), 334cba9d2faSAndrzej Hajda FRATE(0, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000), 335cba9d2faSAndrzej Hajda FRATE(0, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000), 336cba9d2faSAndrzej Hajda FRATE(0, "sclk_usbh20_scan_clk", NULL, CLK_IS_ROOT, 480000000), 3371609027fSChander Kashyap }; 3381609027fSChander Kashyap 339c7306229SSachin Kamat static struct samsung_fixed_factor_clock exynos5420_fixed_factor_clks[] __initdata = { 340cba9d2faSAndrzej Hajda FFACTOR(0, "sclk_hsic_12m", "fin_pll", 1, 2, 0), 3411609027fSChander Kashyap }; 3421609027fSChander Kashyap 343c7306229SSachin Kamat static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = { 344dbd713bbSShaik Ameer Basha MUX(0, "mout_mspll_kfc", mout_mspll_cpu_p, SRC_TOP7, 8, 2), 345dbd713bbSShaik Ameer Basha MUX(0, "mout_mspll_cpu", mout_mspll_cpu_p, SRC_TOP7, 12, 2), 346dbd713bbSShaik Ameer Basha MUX(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1), 347dbd713bbSShaik Ameer Basha MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), 348dbd713bbSShaik Ameer Basha MUX(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1), 349dbd713bbSShaik Ameer Basha MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1), 3501609027fSChander Kashyap 351dbd713bbSShaik Ameer Basha MUX(0, "sclk_bpll", mout_bpll_p, SRC_CDREX, 0, 1), 3521609027fSChander Kashyap 3533a767b35SShaik Ameer Basha MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2), 354dbd713bbSShaik Ameer Basha MUX_A(0, "mout_aclk400_mscl", mout_group1_p, 3551609027fSChander Kashyap SRC_TOP0, 4, 2, "aclk400_mscl"), 356dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2), 357dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200_fsys2", mout_group1_p, SRC_TOP0, 12, 2), 358dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200_fsys", mout_group1_p, SRC_TOP0, 28, 2), 3591609027fSChander Kashyap 360dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk333_432_gscl", mout_group4_p, SRC_TOP1, 0, 2), 3613a767b35SShaik Ameer Basha MUX(0, "mout_aclk333_432_isp", mout_group4_p, 3623a767b35SShaik Ameer Basha SRC_TOP1, 4, 2), 363dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk66", mout_group1_p, SRC_TOP1, 8, 2), 3643a767b35SShaik Ameer Basha MUX(0, "mout_aclk333_432_isp0", mout_group4_p, SRC_TOP1, 12, 2), 365dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk266", mout_group1_p, SRC_TOP1, 20, 2), 366dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk166", mout_group1_p, SRC_TOP1, 24, 2), 367dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk333", mout_group1_p, SRC_TOP1, 28, 2), 3681609027fSChander Kashyap 369dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk333_g2d", mout_group1_p, SRC_TOP2, 8, 2), 370dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk266_g2d", mout_group1_p, SRC_TOP2, 12, 2), 371dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk_g3d", mout_group5_p, SRC_TOP2, 16, 1), 372dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk300_jpeg", mout_group1_p, SRC_TOP2, 20, 2), 373dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk300_disp1", mout_group1_p, SRC_TOP2, 24, 2), 374dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk300_gscl", mout_group1_p, SRC_TOP2, 28, 2), 3751609027fSChander Kashyap 3763a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk400_isp", mout_user_aclk400_isp_p, 3773a767b35SShaik Ameer Basha SRC_TOP3, 0, 1), 378dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk400_mscl", mout_user_aclk400_mscl_p, 3791609027fSChander Kashyap SRC_TOP3, 4, 1), 380dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk200_disp1", mout_aclk200_disp1_p, SRC_TOP3, 8, 1), 381dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk200_fsys2", mout_user_aclk200_fsys2_p, 3821609027fSChander Kashyap SRC_TOP3, 12, 1), 383dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk200_fsys", mout_user_aclk200_fsys_p, 3841609027fSChander Kashyap SRC_TOP3, 28, 1), 3851609027fSChander Kashyap 386dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk333_432_gscl", mout_user_aclk333_432_gscl_p, 3871609027fSChander Kashyap SRC_TOP4, 0, 1), 3883a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk333_432_isp", mout_user_aclk333_432_isp_p, 3893a767b35SShaik Ameer Basha SRC_TOP4, 4, 1), 390dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk66_peric", mout_aclk66_peric_p, SRC_TOP4, 8, 1), 3913a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk333_432_isp0", mout_user_aclk333_432_isp0_p, 3923a767b35SShaik Ameer Basha SRC_TOP4, 12, 1), 3933a767b35SShaik Ameer Basha MUX(0, "mout_user_aclk266_isp", mout_user_aclk266_isp_p, 3943a767b35SShaik Ameer Basha SRC_TOP4, 16, 1), 395dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk266", mout_user_aclk266_p, SRC_TOP4, 20, 1), 396dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk166", mout_user_aclk166_p, SRC_TOP4, 24, 1), 397dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk333", mout_user_aclk333_p, SRC_TOP4, 28, 1), 3981609027fSChander Kashyap 399dbd713bbSShaik Ameer Basha MUX(0, "mout_aclk66_psgen", mout_aclk66_peric_p, SRC_TOP5, 4, 1), 400dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk333_g2d", mout_user_aclk333_g2d_p, SRC_TOP5, 401dbd713bbSShaik Ameer Basha 8, 1), 402dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk266_g2d", mout_user_aclk266_g2d_p, SRC_TOP5, 403dbd713bbSShaik Ameer Basha 12, 1), 404dbd713bbSShaik Ameer Basha MUX_A(CLK_MOUT_G3D, "mout_user_aclk_g3d", mout_user_aclk_g3d_p, 4051609027fSChander Kashyap SRC_TOP5, 16, 1, "aclkg3d"), 406dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_jpeg", mout_user_aclk300_jpeg_p, 4071609027fSChander Kashyap SRC_TOP5, 20, 1), 408dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_disp1", mout_user_aclk300_disp1_p, 4091609027fSChander Kashyap SRC_TOP5, 24, 1), 410dbd713bbSShaik Ameer Basha MUX(0, "mout_user_aclk300_gscl", mout_user_aclk300_gscl_p, 4111609027fSChander Kashyap SRC_TOP5, 28, 1), 4121609027fSChander Kashyap 413dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_mpll", mout_mpll_p, SRC_TOP6, 0, 1), 414dbd713bbSShaik Ameer Basha MUX(CLK_MOUT_VPLL, "mout_sclk_vpll", mout_vpll_p, SRC_TOP6, 4, 1), 415dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_spll", mout_spll_p, SRC_TOP6, 8, 1), 416dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_ipll", mout_ipll_p, SRC_TOP6, 12, 1), 417dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_rpll", mout_rpll_p, SRC_TOP6, 16, 1), 418dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_epll", mout_epll_p, SRC_TOP6, 20, 1), 419dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_dpll", mout_dpll_p, SRC_TOP6, 24, 1), 420dbd713bbSShaik Ameer Basha MUX(0, "mout_sclk_cpll", mout_cpll_p, SRC_TOP6, 28, 1), 4211609027fSChander Kashyap 4223a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk400_isp", mout_sw_aclk400_isp_p, 4233a767b35SShaik Ameer Basha SRC_TOP10, 0, 1), 424dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk400_mscl", mout_sw_aclk400_mscl_p, 425dbd713bbSShaik Ameer Basha SRC_TOP10, 4, 1), 426dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200", mout_sw_aclk200_p, SRC_TOP10, 8, 1), 427dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200_fsys2", mout_sw_aclk200_fsys2_p, 4281609027fSChander Kashyap SRC_TOP10, 12, 1), 429dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk200_fsys", mout_sw_aclk200_fsys_p, 430dbd713bbSShaik Ameer Basha SRC_TOP10, 28, 1), 4313a767b35SShaik Ameer Basha 432dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_gscl", mout_sw_aclk333_432_gscl_p, 4331609027fSChander Kashyap SRC_TOP11, 0, 1), 4343a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_isp", mout_sw_aclk333_432_isp_p, 4353a767b35SShaik Ameer Basha SRC_TOP11, 4, 1), 436dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk66", mout_sw_aclk66_p, SRC_TOP11, 8, 1), 4373a767b35SShaik Ameer Basha MUX(0, "mout_sw_aclk333_432_isp0", mout_sw_aclk333_432_isp0_p, 4383a767b35SShaik Ameer Basha SRC_TOP11, 12, 1), 439dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk266", mout_sw_aclk266_p, SRC_TOP11, 20, 1), 440dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk166", mout_sw_aclk166_p, SRC_TOP11, 24, 1), 441dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333", mout_sw_aclk333_p, SRC_TOP11, 28, 1), 4421609027fSChander Kashyap 443dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk333_g2d", mout_sw_aclk333_g2d_p, 444dbd713bbSShaik Ameer Basha SRC_TOP12, 8, 1), 445dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk266_g2d", mout_sw_aclk266_g2d_p, 446dbd713bbSShaik Ameer Basha SRC_TOP12, 12, 1), 447dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk_g3d", mout_sw_aclk_g3d_p, SRC_TOP12, 16, 1), 448dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_jpeg", mout_sw_aclk300_jpeg_p, 449dbd713bbSShaik Ameer Basha SRC_TOP12, 20, 1), 450dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_disp1", mout_sw_aclk300_disp1_p, 4511609027fSChander Kashyap SRC_TOP12, 24, 1), 452dbd713bbSShaik Ameer Basha MUX(0, "mout_sw_aclk300_gscl", mout_sw_aclk300_gscl_p, 453dbd713bbSShaik Ameer Basha SRC_TOP12, 28, 1), 4541609027fSChander Kashyap 4551609027fSChander Kashyap /* DISP1 Block */ 456dbd713bbSShaik Ameer Basha MUX(0, "mout_fimd1", mout_group3_p, SRC_DISP10, 4, 1), 457dbd713bbSShaik Ameer Basha MUX(0, "mout_mipi1", mout_group2_p, SRC_DISP10, 16, 3), 458dbd713bbSShaik Ameer Basha MUX(0, "mout_dp1", mout_group2_p, SRC_DISP10, 20, 3), 459dbd713bbSShaik Ameer Basha MUX(0, "mout_pixel", mout_group2_p, SRC_DISP10, 24, 3), 460dbd713bbSShaik Ameer Basha MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_DISP10, 28, 1), 4611609027fSChander Kashyap 4621609027fSChander Kashyap /* MAU Block */ 463dbd713bbSShaik Ameer Basha MUX(0, "mout_maudio0", mout_maudio0_p, SRC_MAU, 28, 3), 4641609027fSChander Kashyap 4651609027fSChander Kashyap /* FSYS Block */ 466dbd713bbSShaik Ameer Basha MUX(0, "mout_usbd301", mout_group2_p, SRC_FSYS, 4, 3), 467dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc0", mout_group2_p, SRC_FSYS, 8, 3), 468dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc1", mout_group2_p, SRC_FSYS, 12, 3), 469dbd713bbSShaik Ameer Basha MUX(0, "mout_mmc2", mout_group2_p, SRC_FSYS, 16, 3), 470dbd713bbSShaik Ameer Basha MUX(0, "mout_usbd300", mout_group2_p, SRC_FSYS, 20, 3), 471dbd713bbSShaik Ameer Basha MUX(0, "mout_unipro", mout_group2_p, SRC_FSYS, 24, 3), 4721609027fSChander Kashyap 4731609027fSChander Kashyap /* PERIC Block */ 474dbd713bbSShaik Ameer Basha MUX(0, "mout_uart0", mout_group2_p, SRC_PERIC0, 4, 3), 475dbd713bbSShaik Ameer Basha MUX(0, "mout_uart1", mout_group2_p, SRC_PERIC0, 8, 3), 476dbd713bbSShaik Ameer Basha MUX(0, "mout_uart2", mout_group2_p, SRC_PERIC0, 12, 3), 477dbd713bbSShaik Ameer Basha MUX(0, "mout_uart3", mout_group2_p, SRC_PERIC0, 16, 3), 478dbd713bbSShaik Ameer Basha MUX(0, "mout_pwm", mout_group2_p, SRC_PERIC0, 24, 3), 479dbd713bbSShaik Ameer Basha MUX(0, "mout_spdif", mout_spdif_p, SRC_PERIC0, 28, 3), 480dbd713bbSShaik Ameer Basha MUX(0, "mout_audio0", mout_audio0_p, SRC_PERIC1, 8, 3), 481dbd713bbSShaik Ameer Basha MUX(0, "mout_audio1", mout_audio1_p, SRC_PERIC1, 12, 3), 482dbd713bbSShaik Ameer Basha MUX(0, "mout_audio2", mout_audio2_p, SRC_PERIC1, 16, 3), 483dbd713bbSShaik Ameer Basha MUX(0, "mout_spi0", mout_group2_p, SRC_PERIC1, 20, 3), 484dbd713bbSShaik Ameer Basha MUX(0, "mout_spi1", mout_group2_p, SRC_PERIC1, 24, 3), 485dbd713bbSShaik Ameer Basha MUX(0, "mout_spi2", mout_group2_p, SRC_PERIC1, 28, 3), 4863a767b35SShaik Ameer Basha 4873a767b35SShaik Ameer Basha /* ISP Block */ 4883a767b35SShaik Ameer Basha MUX(0, "mout_pwm_isp", mout_group2_p, SRC_ISP, 24, 3), 4893a767b35SShaik Ameer Basha MUX(0, "mout_uart_isp", mout_group2_p, SRC_ISP, 20, 3), 4903a767b35SShaik Ameer Basha MUX(0, "mout_spi0_isp", mout_group2_p, SRC_ISP, 12, 3), 4913a767b35SShaik Ameer Basha MUX(0, "mout_spi1_isp", mout_group2_p, SRC_ISP, 16, 3), 4923a767b35SShaik Ameer Basha MUX(0, "mout_isp_sensor", mout_group2_p, SRC_ISP, 28, 3), 4931609027fSChander Kashyap }; 4941609027fSChander Kashyap 495c7306229SSachin Kamat static struct samsung_div_clock exynos5420_div_clks[] __initdata = { 496cba9d2faSAndrzej Hajda DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3), 497cba9d2faSAndrzej Hajda DIV(0, "sclk_apll", "mout_apll", DIV_CPU0, 24, 3), 498cba9d2faSAndrzej Hajda DIV(0, "armclk2", "div_arm", DIV_CPU0, 28, 3), 499dbd713bbSShaik Ameer Basha DIV(0, "div_kfc", "mout_kfc", DIV_KFC0, 0, 3), 500cba9d2faSAndrzej Hajda DIV(0, "sclk_kpll", "mout_kpll", DIV_KFC0, 24, 3), 5011609027fSChander Kashyap 5023a767b35SShaik Ameer Basha DIV(0, "dout_aclk400_isp", "mout_aclk400_isp", DIV_TOP0, 0, 3), 503cba9d2faSAndrzej Hajda DIV(0, "dout_aclk400_mscl", "mout_aclk400_mscl", DIV_TOP0, 4, 3), 504cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200", "mout_aclk200", DIV_TOP0, 8, 3), 505cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200_fsys2", "mout_aclk200_fsys2", DIV_TOP0, 12, 3), 506cba9d2faSAndrzej Hajda DIV(0, "dout_pclk200_fsys", "mout_pclk200_fsys", DIV_TOP0, 24, 3), 507cba9d2faSAndrzej Hajda DIV(0, "dout_aclk200_fsys", "mout_aclk200_fsys", DIV_TOP0, 28, 3), 5081609027fSChander Kashyap 509cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333_432_gscl", "mout_aclk333_432_gscl", 5101609027fSChander Kashyap DIV_TOP1, 0, 3), 5113a767b35SShaik Ameer Basha DIV(0, "dout_aclk333_432_isp", "mout_aclk333_432_isp", 5123a767b35SShaik Ameer Basha DIV_TOP1, 4, 3), 513cba9d2faSAndrzej Hajda DIV(0, "dout_aclk66", "mout_aclk66", DIV_TOP1, 8, 6), 5143a767b35SShaik Ameer Basha DIV(0, "dout_aclk333_432_isp0", "mout_aclk333_432_isp0", 5153a767b35SShaik Ameer Basha DIV_TOP1, 16, 3), 516cba9d2faSAndrzej Hajda DIV(0, "dout_aclk266", "mout_aclk266", DIV_TOP1, 20, 3), 517cba9d2faSAndrzej Hajda DIV(0, "dout_aclk166", "mout_aclk166", DIV_TOP1, 24, 3), 518cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333", "mout_aclk333", DIV_TOP1, 28, 3), 5191609027fSChander Kashyap 520cba9d2faSAndrzej Hajda DIV(0, "dout_aclk333_g2d", "mout_aclk333_g2d", DIV_TOP2, 8, 3), 521cba9d2faSAndrzej Hajda DIV(0, "dout_aclk266_g2d", "mout_aclk266_g2d", DIV_TOP2, 12, 3), 522cba9d2faSAndrzej Hajda DIV(0, "dout_aclk_g3d", "mout_aclk_g3d", DIV_TOP2, 16, 3), 523cba9d2faSAndrzej Hajda DIV(0, "dout_aclk300_jpeg", "mout_aclk300_jpeg", DIV_TOP2, 20, 3), 524cba9d2faSAndrzej Hajda DIV_A(0, "dout_aclk300_disp1", "mout_aclk300_disp1", 5251609027fSChander Kashyap DIV_TOP2, 24, 3, "aclk300_disp1"), 526cba9d2faSAndrzej Hajda DIV(0, "dout_aclk300_gscl", "mout_aclk300_gscl", DIV_TOP2, 28, 3), 5271609027fSChander Kashyap 5281609027fSChander Kashyap /* DISP1 Block */ 529cba9d2faSAndrzej Hajda DIV(0, "dout_fimd1", "mout_fimd1", DIV_DISP10, 0, 4), 530cba9d2faSAndrzej Hajda DIV(0, "dout_mipi1", "mout_mipi1", DIV_DISP10, 16, 8), 531cba9d2faSAndrzej Hajda DIV(0, "dout_dp1", "mout_dp1", DIV_DISP10, 24, 4), 532cba9d2faSAndrzej Hajda DIV(CLK_DOUT_PIXEL, "dout_hdmi_pixel", "mout_pixel", DIV_DISP10, 28, 4), 5331609027fSChander Kashyap 5341609027fSChander Kashyap /* Audio Block */ 535cba9d2faSAndrzej Hajda DIV(0, "dout_maudio0", "mout_maudio0", DIV_MAU, 20, 4), 536cba9d2faSAndrzej Hajda DIV(0, "dout_maupcm0", "dout_maudio0", DIV_MAU, 24, 8), 5371609027fSChander Kashyap 5381609027fSChander Kashyap /* USB3.0 */ 539cba9d2faSAndrzej Hajda DIV(0, "dout_usbphy301", "mout_usbd301", DIV_FSYS0, 12, 4), 540cba9d2faSAndrzej Hajda DIV(0, "dout_usbphy300", "mout_usbd300", DIV_FSYS0, 16, 4), 541cba9d2faSAndrzej Hajda DIV(0, "dout_usbd301", "mout_usbd301", DIV_FSYS0, 20, 4), 542cba9d2faSAndrzej Hajda DIV(0, "dout_usbd300", "mout_usbd300", DIV_FSYS0, 24, 4), 5431609027fSChander Kashyap 5441609027fSChander Kashyap /* MMC */ 545cba9d2faSAndrzej Hajda DIV(0, "dout_mmc0", "mout_mmc0", DIV_FSYS1, 0, 10), 546cba9d2faSAndrzej Hajda DIV(0, "dout_mmc1", "mout_mmc1", DIV_FSYS1, 10, 10), 547cba9d2faSAndrzej Hajda DIV(0, "dout_mmc2", "mout_mmc2", DIV_FSYS1, 20, 10), 5481609027fSChander Kashyap 549cba9d2faSAndrzej Hajda DIV(0, "dout_unipro", "mout_unipro", DIV_FSYS2, 24, 8), 5501609027fSChander Kashyap 5511609027fSChander Kashyap /* UART and PWM */ 552cba9d2faSAndrzej Hajda DIV(0, "dout_uart0", "mout_uart0", DIV_PERIC0, 8, 4), 553cba9d2faSAndrzej Hajda DIV(0, "dout_uart1", "mout_uart1", DIV_PERIC0, 12, 4), 554cba9d2faSAndrzej Hajda DIV(0, "dout_uart2", "mout_uart2", DIV_PERIC0, 16, 4), 555cba9d2faSAndrzej Hajda DIV(0, "dout_uart3", "mout_uart3", DIV_PERIC0, 20, 4), 556cba9d2faSAndrzej Hajda DIV(0, "dout_pwm", "mout_pwm", DIV_PERIC0, 28, 4), 5571609027fSChander Kashyap 5581609027fSChander Kashyap /* SPI */ 559cba9d2faSAndrzej Hajda DIV(0, "dout_spi0", "mout_spi0", DIV_PERIC1, 20, 4), 560cba9d2faSAndrzej Hajda DIV(0, "dout_spi1", "mout_spi1", DIV_PERIC1, 24, 4), 561cba9d2faSAndrzej Hajda DIV(0, "dout_spi2", "mout_spi2", DIV_PERIC1, 28, 4), 5621609027fSChander Kashyap 5631609027fSChander Kashyap /* PCM */ 564cba9d2faSAndrzej Hajda DIV(0, "dout_pcm1", "dout_audio1", DIV_PERIC2, 16, 8), 565cba9d2faSAndrzej Hajda DIV(0, "dout_pcm2", "dout_audio2", DIV_PERIC2, 24, 8), 5661609027fSChander Kashyap 5671609027fSChander Kashyap /* Audio - I2S */ 568cba9d2faSAndrzej Hajda DIV(0, "dout_i2s1", "dout_audio1", DIV_PERIC3, 6, 6), 569cba9d2faSAndrzej Hajda DIV(0, "dout_i2s2", "dout_audio2", DIV_PERIC3, 12, 6), 570cba9d2faSAndrzej Hajda DIV(0, "dout_audio0", "mout_audio0", DIV_PERIC3, 20, 4), 571cba9d2faSAndrzej Hajda DIV(0, "dout_audio1", "mout_audio1", DIV_PERIC3, 24, 4), 572cba9d2faSAndrzej Hajda DIV(0, "dout_audio2", "mout_audio2", DIV_PERIC3, 28, 4), 5731609027fSChander Kashyap 5741609027fSChander Kashyap /* SPI Pre-Ratio */ 575cba9d2faSAndrzej Hajda DIV(0, "dout_pre_spi0", "dout_spi0", DIV_PERIC4, 8, 8), 576cba9d2faSAndrzej Hajda DIV(0, "dout_pre_spi1", "dout_spi1", DIV_PERIC4, 16, 8), 577cba9d2faSAndrzej Hajda DIV(0, "dout_pre_spi2", "dout_spi2", DIV_PERIC4, 24, 8), 5783a767b35SShaik Ameer Basha 5793a767b35SShaik Ameer Basha /* ISP Block */ 5803a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor0", "mout_isp_sensor", SCLK_DIV_ISP0, 8, 8), 5813a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor1", "mout_isp_sensor", SCLK_DIV_ISP0, 16, 8), 5823a767b35SShaik Ameer Basha DIV(0, "dout_isp_sensor2", "mout_isp_sensor", SCLK_DIV_ISP0, 24, 8), 5833a767b35SShaik Ameer Basha DIV(0, "dout_pwm_isp", "mout_pwm_isp", SCLK_DIV_ISP1, 28, 4), 5843a767b35SShaik Ameer Basha DIV(0, "dout_uart_isp", "mout_uart_isp", SCLK_DIV_ISP1, 24, 4), 5853a767b35SShaik Ameer Basha DIV(0, "dout_spi0_isp", "mout_spi0_isp", SCLK_DIV_ISP1, 16, 4), 5863a767b35SShaik Ameer Basha DIV(0, "dout_spi1_isp", "mout_spi1_isp", SCLK_DIV_ISP1, 20, 4), 5873a767b35SShaik Ameer Basha DIV_F(0, "dout_spi0_isp_pre", "dout_spi0_isp", SCLK_DIV_ISP1, 0, 8, 5883a767b35SShaik Ameer Basha CLK_SET_RATE_PARENT, 0), 5893a767b35SShaik Ameer Basha DIV_F(0, "dout_spi1_isp_pre", "dout_spi1_isp", SCLK_DIV_ISP1, 8, 8, 5903a767b35SShaik Ameer Basha CLK_SET_RATE_PARENT, 0), 5911609027fSChander Kashyap }; 5921609027fSChander Kashyap 593c7306229SSachin Kamat static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { 5945b73721bSNaveen Krishna Chatradhi /* G2D */ 5955b73721bSNaveen Krishna Chatradhi GATE(CLK_SSS, "sss", "aclk266_g2d", GATE_IP_G2D, 2, 0, 0), 5965b73721bSNaveen Krishna Chatradhi 5971609027fSChander Kashyap /* TODO: Re-verify the CG bits for all the gate clocks */ 598cba9d2faSAndrzej Hajda GATE_A(CLK_MCT, "pclk_st", "aclk66_psgen", GATE_BUS_PERIS1, 2, 0, 0, 599cba9d2faSAndrzej Hajda "mct"), 6001609027fSChander Kashyap 6011609027fSChander Kashyap GATE(0, "aclk200_fsys", "mout_user_aclk200_fsys", 6021609027fSChander Kashyap GATE_BUS_FSYS0, 9, CLK_IGNORE_UNUSED, 0), 6031609027fSChander Kashyap GATE(0, "aclk200_fsys2", "mout_user_aclk200_fsys2", 6041609027fSChander Kashyap GATE_BUS_FSYS0, 10, CLK_IGNORE_UNUSED, 0), 6051609027fSChander Kashyap 6061609027fSChander Kashyap GATE(0, "aclk333_g2d", "mout_user_aclk333_g2d", 6071609027fSChander Kashyap GATE_BUS_TOP, 0, CLK_IGNORE_UNUSED, 0), 6081609027fSChander Kashyap GATE(0, "aclk266_g2d", "mout_user_aclk266_g2d", 6091609027fSChander Kashyap GATE_BUS_TOP, 1, CLK_IGNORE_UNUSED, 0), 6101609027fSChander Kashyap GATE(0, "aclk300_jpeg", "mout_user_aclk300_jpeg", 6111609027fSChander Kashyap GATE_BUS_TOP, 4, CLK_IGNORE_UNUSED, 0), 6123a767b35SShaik Ameer Basha GATE(0, "aclk333_432_isp0", "mout_user_aclk333_432_isp0", 6133a767b35SShaik Ameer Basha GATE_BUS_TOP, 5, 0, 0), 6141609027fSChander Kashyap GATE(0, "aclk300_gscl", "mout_user_aclk300_gscl", 6151609027fSChander Kashyap GATE_BUS_TOP, 6, CLK_IGNORE_UNUSED, 0), 6161609027fSChander Kashyap GATE(0, "aclk333_432_gscl", "mout_user_aclk333_432_gscl", 6171609027fSChander Kashyap GATE_BUS_TOP, 7, CLK_IGNORE_UNUSED, 0), 6183a767b35SShaik Ameer Basha GATE(0, "aclk333_432_isp", "mout_user_aclk333_432_isp", 6193a767b35SShaik Ameer Basha GATE_BUS_TOP, 8, 0, 0), 6201609027fSChander Kashyap GATE(0, "pclk66_gpio", "mout_sw_aclk66", 6211609027fSChander Kashyap GATE_BUS_TOP, 9, CLK_IGNORE_UNUSED, 0), 6221609027fSChander Kashyap GATE(0, "aclk66_psgen", "mout_aclk66_psgen", 6231609027fSChander Kashyap GATE_BUS_TOP, 10, CLK_IGNORE_UNUSED, 0), 6241609027fSChander Kashyap GATE(0, "aclk66_peric", "mout_aclk66_peric", 6251609027fSChander Kashyap GATE_BUS_TOP, 11, 0, 0), 6263a767b35SShaik Ameer Basha GATE(0, "aclk266_isp", "mout_user_aclk266_isp", 6273a767b35SShaik Ameer Basha GATE_BUS_TOP, 13, 0, 0), 6281609027fSChander Kashyap GATE(0, "aclk166", "mout_user_aclk166", 6291609027fSChander Kashyap GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), 6301609027fSChander Kashyap GATE(0, "aclk333", "mout_aclk333", 6311609027fSChander Kashyap GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), 6323a767b35SShaik Ameer Basha GATE(0, "aclk400_isp", "mout_user_aclk400_isp", 6333a767b35SShaik Ameer Basha GATE_BUS_TOP, 16, 0, 0), 6341609027fSChander Kashyap 6351609027fSChander Kashyap /* sclk */ 636cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART0, "sclk_uart0", "dout_uart0", 6371609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 0, CLK_SET_RATE_PARENT, 0), 638cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART1, "sclk_uart1", "dout_uart1", 6391609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 1, CLK_SET_RATE_PARENT, 0), 640cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_uart2", 6411609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 2, CLK_SET_RATE_PARENT, 0), 642cba9d2faSAndrzej Hajda GATE(CLK_SCLK_UART3, "sclk_uart3", "dout_uart3", 6431609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 3, CLK_SET_RATE_PARENT, 0), 644cba9d2faSAndrzej Hajda GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_pre_spi0", 6451609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 6, CLK_SET_RATE_PARENT, 0), 646cba9d2faSAndrzej Hajda GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_pre_spi1", 6471609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 7, CLK_SET_RATE_PARENT, 0), 648cba9d2faSAndrzej Hajda GATE(CLK_SCLK_SPI2, "sclk_spi2", "dout_pre_spi2", 6491609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 8, CLK_SET_RATE_PARENT, 0), 650cba9d2faSAndrzej Hajda GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif", 6511609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 9, CLK_SET_RATE_PARENT, 0), 652cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PWM, "sclk_pwm", "dout_pwm", 6531609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0), 654cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PCM1, "sclk_pcm1", "dout_pcm1", 6551609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 15, CLK_SET_RATE_PARENT, 0), 656cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PCM2, "sclk_pcm2", "dout_pcm2", 6571609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 16, CLK_SET_RATE_PARENT, 0), 658cba9d2faSAndrzej Hajda GATE(CLK_SCLK_I2S1, "sclk_i2s1", "dout_i2s1", 6591609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 17, CLK_SET_RATE_PARENT, 0), 660cba9d2faSAndrzej Hajda GATE(CLK_SCLK_I2S2, "sclk_i2s2", "dout_i2s2", 6611609027fSChander Kashyap GATE_TOP_SCLK_PERIC, 18, CLK_SET_RATE_PARENT, 0), 6621609027fSChander Kashyap 663cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_mmc0", 6641609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 0, CLK_SET_RATE_PARENT, 0), 665cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_mmc1", 6661609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 1, CLK_SET_RATE_PARENT, 0), 667cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_mmc2", 6681609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 2, CLK_SET_RATE_PARENT, 0), 669cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBPHY301, "sclk_usbphy301", "dout_usbphy301", 6701609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 7, CLK_SET_RATE_PARENT, 0), 671cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBPHY300, "sclk_usbphy300", "dout_usbphy300", 6721609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 8, CLK_SET_RATE_PARENT, 0), 673cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBD300, "sclk_usbd300", "dout_usbd300", 6741609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 9, CLK_SET_RATE_PARENT, 0), 675cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBD301, "sclk_usbd301", "dout_usbd301", 6761609027fSChander Kashyap GATE_TOP_SCLK_FSYS, 10, CLK_SET_RATE_PARENT, 0), 6771609027fSChander Kashyap 678cba9d2faSAndrzej Hajda GATE(CLK_SCLK_USBD301, "sclk_unipro", "dout_unipro", 6791609027fSChander Kashyap SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0), 6801609027fSChander Kashyap 681cba9d2faSAndrzej Hajda GATE(CLK_SCLK_GSCL_WA, "sclk_gscl_wa", "aclK333_432_gscl", 6821609027fSChander Kashyap GATE_TOP_SCLK_GSCL, 6, CLK_SET_RATE_PARENT, 0), 683cba9d2faSAndrzej Hajda GATE(CLK_SCLK_GSCL_WB, "sclk_gscl_wb", "aclk333_432_gscl", 6841609027fSChander Kashyap GATE_TOP_SCLK_GSCL, 7, CLK_SET_RATE_PARENT, 0), 6851609027fSChander Kashyap 6861609027fSChander Kashyap /* Display */ 687cba9d2faSAndrzej Hajda GATE(CLK_SCLK_FIMD1, "sclk_fimd1", "dout_fimd1", 6881609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 0, CLK_SET_RATE_PARENT, 0), 689cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MIPI1, "sclk_mipi1", "dout_mipi1", 6901609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 3, CLK_SET_RATE_PARENT, 0), 691cba9d2faSAndrzej Hajda GATE(CLK_SCLK_HDMI, "sclk_hdmi", "mout_hdmi", 6921609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 9, CLK_SET_RATE_PARENT, 0), 693cba9d2faSAndrzej Hajda GATE(CLK_SCLK_PIXEL, "sclk_pixel", "dout_hdmi_pixel", 6941609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 10, CLK_SET_RATE_PARENT, 0), 695cba9d2faSAndrzej Hajda GATE(CLK_SCLK_DP1, "sclk_dp1", "dout_dp1", 6961609027fSChander Kashyap GATE_TOP_SCLK_DISP1, 20, CLK_SET_RATE_PARENT, 0), 6971609027fSChander Kashyap 6981609027fSChander Kashyap /* Maudio Block */ 699cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MAUDIO0, "sclk_maudio0", "dout_maudio0", 7001609027fSChander Kashyap GATE_TOP_SCLK_MAU, 0, CLK_SET_RATE_PARENT, 0), 701cba9d2faSAndrzej Hajda GATE(CLK_SCLK_MAUPCM0, "sclk_maupcm0", "dout_maupcm0", 7021609027fSChander Kashyap GATE_TOP_SCLK_MAU, 1, CLK_SET_RATE_PARENT, 0), 7031609027fSChander Kashyap /* FSYS */ 704cba9d2faSAndrzej Hajda GATE(CLK_TSI, "tsi", "aclk200_fsys", GATE_BUS_FSYS0, 0, 0, 0), 705cba9d2faSAndrzej Hajda GATE(CLK_PDMA0, "pdma0", "aclk200_fsys", GATE_BUS_FSYS0, 1, 0, 0), 706cba9d2faSAndrzej Hajda GATE(CLK_PDMA1, "pdma1", "aclk200_fsys", GATE_BUS_FSYS0, 2, 0, 0), 707cba9d2faSAndrzej Hajda GATE(CLK_UFS, "ufs", "aclk200_fsys2", GATE_BUS_FSYS0, 3, 0, 0), 708cba9d2faSAndrzej Hajda GATE(CLK_RTIC, "rtic", "aclk200_fsys", GATE_BUS_FSYS0, 5, 0, 0), 709cba9d2faSAndrzej Hajda GATE(CLK_MMC0, "mmc0", "aclk200_fsys2", GATE_BUS_FSYS0, 12, 0, 0), 710cba9d2faSAndrzej Hajda GATE(CLK_MMC1, "mmc1", "aclk200_fsys2", GATE_BUS_FSYS0, 13, 0, 0), 711cba9d2faSAndrzej Hajda GATE(CLK_MMC2, "mmc2", "aclk200_fsys2", GATE_BUS_FSYS0, 14, 0, 0), 712cba9d2faSAndrzej Hajda GATE(CLK_SROMC, "sromc", "aclk200_fsys2", 7131609027fSChander Kashyap GATE_BUS_FSYS0, 19, CLK_IGNORE_UNUSED, 0), 714cba9d2faSAndrzej Hajda GATE(CLK_USBH20, "usbh20", "aclk200_fsys", GATE_BUS_FSYS0, 20, 0, 0), 715cba9d2faSAndrzej Hajda GATE(CLK_USBD300, "usbd300", "aclk200_fsys", GATE_BUS_FSYS0, 21, 0, 0), 716cba9d2faSAndrzej Hajda GATE(CLK_USBD301, "usbd301", "aclk200_fsys", GATE_BUS_FSYS0, 28, 0, 0), 7171609027fSChander Kashyap 7181609027fSChander Kashyap /* UART */ 719cba9d2faSAndrzej Hajda GATE(CLK_UART0, "uart0", "aclk66_peric", GATE_BUS_PERIC, 4, 0, 0), 720cba9d2faSAndrzej Hajda GATE(CLK_UART1, "uart1", "aclk66_peric", GATE_BUS_PERIC, 5, 0, 0), 721cba9d2faSAndrzej Hajda GATE_A(CLK_UART2, "uart2", "aclk66_peric", 7221609027fSChander Kashyap GATE_BUS_PERIC, 6, CLK_IGNORE_UNUSED, 0, "uart2"), 723cba9d2faSAndrzej Hajda GATE(CLK_UART3, "uart3", "aclk66_peric", GATE_BUS_PERIC, 7, 0, 0), 7241609027fSChander Kashyap /* I2C */ 725cba9d2faSAndrzej Hajda GATE(CLK_I2C0, "i2c0", "aclk66_peric", GATE_BUS_PERIC, 9, 0, 0), 726cba9d2faSAndrzej Hajda GATE(CLK_I2C1, "i2c1", "aclk66_peric", GATE_BUS_PERIC, 10, 0, 0), 727cba9d2faSAndrzej Hajda GATE(CLK_I2C2, "i2c2", "aclk66_peric", GATE_BUS_PERIC, 11, 0, 0), 728cba9d2faSAndrzej Hajda GATE(CLK_I2C3, "i2c3", "aclk66_peric", GATE_BUS_PERIC, 12, 0, 0), 729cba9d2faSAndrzej Hajda GATE(CLK_I2C4, "i2c4", "aclk66_peric", GATE_BUS_PERIC, 13, 0, 0), 730cba9d2faSAndrzej Hajda GATE(CLK_I2C5, "i2c5", "aclk66_peric", GATE_BUS_PERIC, 14, 0, 0), 731cba9d2faSAndrzej Hajda GATE(CLK_I2C6, "i2c6", "aclk66_peric", GATE_BUS_PERIC, 15, 0, 0), 732cba9d2faSAndrzej Hajda GATE(CLK_I2C7, "i2c7", "aclk66_peric", GATE_BUS_PERIC, 16, 0, 0), 733cba9d2faSAndrzej Hajda GATE(CLK_I2C_HDMI, "i2c_hdmi", "aclk66_peric", GATE_BUS_PERIC, 17, 0, 734cba9d2faSAndrzej Hajda 0), 735cba9d2faSAndrzej Hajda GATE(CLK_TSADC, "tsadc", "aclk66_peric", GATE_BUS_PERIC, 18, 0, 0), 7361609027fSChander Kashyap /* SPI */ 737cba9d2faSAndrzej Hajda GATE(CLK_SPI0, "spi0", "aclk66_peric", GATE_BUS_PERIC, 19, 0, 0), 738cba9d2faSAndrzej Hajda GATE(CLK_SPI1, "spi1", "aclk66_peric", GATE_BUS_PERIC, 20, 0, 0), 739cba9d2faSAndrzej Hajda GATE(CLK_SPI2, "spi2", "aclk66_peric", GATE_BUS_PERIC, 21, 0, 0), 740cba9d2faSAndrzej Hajda GATE(CLK_KEYIF, "keyif", "aclk66_peric", GATE_BUS_PERIC, 22, 0, 0), 7411609027fSChander Kashyap /* I2S */ 742cba9d2faSAndrzej Hajda GATE(CLK_I2S1, "i2s1", "aclk66_peric", GATE_BUS_PERIC, 23, 0, 0), 743cba9d2faSAndrzej Hajda GATE(CLK_I2S2, "i2s2", "aclk66_peric", GATE_BUS_PERIC, 24, 0, 0), 7441609027fSChander Kashyap /* PCM */ 745cba9d2faSAndrzej Hajda GATE(CLK_PCM1, "pcm1", "aclk66_peric", GATE_BUS_PERIC, 25, 0, 0), 746cba9d2faSAndrzej Hajda GATE(CLK_PCM2, "pcm2", "aclk66_peric", GATE_BUS_PERIC, 26, 0, 0), 7471609027fSChander Kashyap /* PWM */ 748cba9d2faSAndrzej Hajda GATE(CLK_PWM, "pwm", "aclk66_peric", GATE_BUS_PERIC, 27, 0, 0), 7491609027fSChander Kashyap /* SPDIF */ 750cba9d2faSAndrzej Hajda GATE(CLK_SPDIF, "spdif", "aclk66_peric", GATE_BUS_PERIC, 29, 0, 0), 7511609027fSChander Kashyap 752cba9d2faSAndrzej Hajda GATE(CLK_I2C8, "i2c8", "aclk66_peric", GATE_BUS_PERIC1, 0, 0, 0), 753cba9d2faSAndrzej Hajda GATE(CLK_I2C9, "i2c9", "aclk66_peric", GATE_BUS_PERIC1, 1, 0, 0), 754cba9d2faSAndrzej Hajda GATE(CLK_I2C10, "i2c10", "aclk66_peric", GATE_BUS_PERIC1, 2, 0, 0), 7551609027fSChander Kashyap 756cba9d2faSAndrzej Hajda GATE(CLK_CHIPID, "chipid", "aclk66_psgen", 7571609027fSChander Kashyap GATE_BUS_PERIS0, 12, CLK_IGNORE_UNUSED, 0), 758cba9d2faSAndrzej Hajda GATE(CLK_SYSREG, "sysreg", "aclk66_psgen", 7591609027fSChander Kashyap GATE_BUS_PERIS0, 13, CLK_IGNORE_UNUSED, 0), 760cba9d2faSAndrzej Hajda GATE(CLK_TZPC0, "tzpc0", "aclk66_psgen", GATE_BUS_PERIS0, 18, 0, 0), 761cba9d2faSAndrzej Hajda GATE(CLK_TZPC1, "tzpc1", "aclk66_psgen", GATE_BUS_PERIS0, 19, 0, 0), 762cba9d2faSAndrzej Hajda GATE(CLK_TZPC2, "tzpc2", "aclk66_psgen", GATE_BUS_PERIS0, 20, 0, 0), 763cba9d2faSAndrzej Hajda GATE(CLK_TZPC3, "tzpc3", "aclk66_psgen", GATE_BUS_PERIS0, 21, 0, 0), 764cba9d2faSAndrzej Hajda GATE(CLK_TZPC4, "tzpc4", "aclk66_psgen", GATE_BUS_PERIS0, 22, 0, 0), 765cba9d2faSAndrzej Hajda GATE(CLK_TZPC5, "tzpc5", "aclk66_psgen", GATE_BUS_PERIS0, 23, 0, 0), 766cba9d2faSAndrzej Hajda GATE(CLK_TZPC6, "tzpc6", "aclk66_psgen", GATE_BUS_PERIS0, 24, 0, 0), 767cba9d2faSAndrzej Hajda GATE(CLK_TZPC7, "tzpc7", "aclk66_psgen", GATE_BUS_PERIS0, 25, 0, 0), 768cba9d2faSAndrzej Hajda GATE(CLK_TZPC8, "tzpc8", "aclk66_psgen", GATE_BUS_PERIS0, 26, 0, 0), 769cba9d2faSAndrzej Hajda GATE(CLK_TZPC9, "tzpc9", "aclk66_psgen", GATE_BUS_PERIS0, 27, 0, 0), 7701609027fSChander Kashyap 771cba9d2faSAndrzej Hajda GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk66_psgen", GATE_BUS_PERIS1, 0, 0, 772cba9d2faSAndrzej Hajda 0), 773cba9d2faSAndrzej Hajda GATE(CLK_SECKEY, "seckey", "aclk66_psgen", GATE_BUS_PERIS1, 1, 0, 0), 774cba9d2faSAndrzej Hajda GATE(CLK_WDT, "wdt", "aclk66_psgen", GATE_BUS_PERIS1, 3, 0, 0), 775cba9d2faSAndrzej Hajda GATE(CLK_RTC, "rtc", "aclk66_psgen", GATE_BUS_PERIS1, 4, 0, 0), 776cba9d2faSAndrzej Hajda GATE(CLK_TMU, "tmu", "aclk66_psgen", GATE_BUS_PERIS1, 5, 0, 0), 777cba9d2faSAndrzej Hajda GATE(CLK_TMU_GPU, "tmu_gpu", "aclk66_psgen", GATE_BUS_PERIS1, 6, 0, 0), 7781609027fSChander Kashyap 779cba9d2faSAndrzej Hajda GATE(CLK_GSCL0, "gscl0", "aclk300_gscl", GATE_IP_GSCL0, 0, 0, 0), 780cba9d2faSAndrzej Hajda GATE(CLK_GSCL1, "gscl1", "aclk300_gscl", GATE_IP_GSCL0, 1, 0, 0), 781cba9d2faSAndrzej Hajda GATE(CLK_CLK_3AA, "clk_3aa", "aclk300_gscl", GATE_IP_GSCL0, 4, 0, 0), 7821609027fSChander Kashyap 783cba9d2faSAndrzej Hajda GATE(CLK_SMMU_3AA, "smmu_3aa", "aclk333_432_gscl", GATE_IP_GSCL1, 2, 0, 784cba9d2faSAndrzej Hajda 0), 785cba9d2faSAndrzej Hajda GATE(CLK_SMMU_FIMCL0, "smmu_fimcl0", "aclk333_432_gscl", 7861609027fSChander Kashyap GATE_IP_GSCL1, 3, 0, 0), 787cba9d2faSAndrzej Hajda GATE(CLK_SMMU_FIMCL1, "smmu_fimcl1", "aclk333_432_gscl", 7881609027fSChander Kashyap GATE_IP_GSCL1, 4, 0, 0), 789cba9d2faSAndrzej Hajda GATE(CLK_SMMU_GSCL0, "smmu_gscl0", "aclk300_gscl", GATE_IP_GSCL1, 6, 0, 790cba9d2faSAndrzej Hajda 0), 791cba9d2faSAndrzej Hajda GATE(CLK_SMMU_GSCL1, "smmu_gscl1", "aclk300_gscl", GATE_IP_GSCL1, 7, 0, 792cba9d2faSAndrzej Hajda 0), 793cba9d2faSAndrzej Hajda GATE(CLK_GSCL_WA, "gscl_wa", "aclk300_gscl", GATE_IP_GSCL1, 12, 0, 0), 794cba9d2faSAndrzej Hajda GATE(CLK_GSCL_WB, "gscl_wb", "aclk300_gscl", GATE_IP_GSCL1, 13, 0, 0), 795cba9d2faSAndrzej Hajda GATE(CLK_SMMU_FIMCL3, "smmu_fimcl3,", "aclk333_432_gscl", 7961609027fSChander Kashyap GATE_IP_GSCL1, 16, 0, 0), 797cba9d2faSAndrzej Hajda GATE(CLK_FIMC_LITE3, "fimc_lite3", "aclk333_432_gscl", 7981609027fSChander Kashyap GATE_IP_GSCL1, 17, 0, 0), 7991609027fSChander Kashyap 800cba9d2faSAndrzej Hajda GATE(CLK_FIMD1, "fimd1", "aclk300_disp1", GATE_IP_DISP1, 0, 0, 0), 801cba9d2faSAndrzej Hajda GATE(CLK_DSIM1, "dsim1", "aclk200_disp1", GATE_IP_DISP1, 3, 0, 0), 802cba9d2faSAndrzej Hajda GATE(CLK_DP1, "dp1", "aclk200_disp1", GATE_IP_DISP1, 4, 0, 0), 803cba9d2faSAndrzej Hajda GATE(CLK_MIXER, "mixer", "aclk166", GATE_IP_DISP1, 5, 0, 0), 804cba9d2faSAndrzej Hajda GATE(CLK_HDMI, "hdmi", "aclk200_disp1", GATE_IP_DISP1, 6, 0, 0), 805cba9d2faSAndrzej Hajda GATE(CLK_SMMU_FIMD1, "smmu_fimd1", "aclk300_disp1", GATE_IP_DISP1, 8, 0, 806cba9d2faSAndrzej Hajda 0), 8071609027fSChander Kashyap 8083a767b35SShaik Ameer Basha /* ISP */ 8093a767b35SShaik Ameer Basha GATE(CLK_SCLK_UART_ISP, "sclk_uart_isp", "dout_uart_isp", 8103a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 0, CLK_SET_RATE_PARENT, 0), 8113a767b35SShaik Ameer Basha GATE(CLK_SCLK_SPI0_ISP, "sclk_spi0_isp", "dout_spi0_isp_pre", 8123a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 1, CLK_SET_RATE_PARENT, 0), 8133a767b35SShaik Ameer Basha GATE(CLK_SCLK_SPI1_ISP, "sclk_spi1_isp", "dout_spi1_isp_pre", 8143a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 2, CLK_SET_RATE_PARENT, 0), 8153a767b35SShaik Ameer Basha GATE(CLK_SCLK_PWM_ISP, "sclk_pwm_isp", "dout_pwm_isp", 8163a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 3, CLK_SET_RATE_PARENT, 0), 8173a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR0, "sclk_isp_sensor0", "dout_isp_sensor0", 8183a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 4, CLK_SET_RATE_PARENT, 0), 8193a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR1, "sclk_isp_sensor1", "dout_isp_sensor1", 8203a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 8, CLK_SET_RATE_PARENT, 0), 8213a767b35SShaik Ameer Basha GATE(CLK_SCLK_ISP_SENSOR2, "sclk_isp_sensor2", "dout_isp_sensor2", 8223a767b35SShaik Ameer Basha GATE_TOP_SCLK_ISP, 12, CLK_SET_RATE_PARENT, 0), 8233a767b35SShaik Ameer Basha 824cba9d2faSAndrzej Hajda GATE(CLK_MFC, "mfc", "aclk333", GATE_IP_MFC, 0, 0, 0), 825cba9d2faSAndrzej Hajda GATE(CLK_SMMU_MFCL, "smmu_mfcl", "aclk333", GATE_IP_MFC, 1, 0, 0), 826cba9d2faSAndrzej Hajda GATE(CLK_SMMU_MFCR, "smmu_mfcr", "aclk333", GATE_IP_MFC, 2, 0, 0), 8271609027fSChander Kashyap 828cba9d2faSAndrzej Hajda GATE(CLK_G3D, "g3d", "aclkg3d", GATE_IP_G3D, 9, 0, 0), 8291609027fSChander Kashyap 830cba9d2faSAndrzej Hajda GATE(CLK_ROTATOR, "rotator", "aclk266", GATE_IP_GEN, 1, 0, 0), 831cba9d2faSAndrzej Hajda GATE(CLK_JPEG, "jpeg", "aclk300_jpeg", GATE_IP_GEN, 2, 0, 0), 832cba9d2faSAndrzej Hajda GATE(CLK_JPEG2, "jpeg2", "aclk300_jpeg", GATE_IP_GEN, 3, 0, 0), 833cba9d2faSAndrzej Hajda GATE(CLK_MDMA1, "mdma1", "aclk266", GATE_IP_GEN, 4, 0, 0), 834cba9d2faSAndrzej Hajda GATE(CLK_SMMU_ROTATOR, "smmu_rotator", "aclk266", GATE_IP_GEN, 6, 0, 0), 835cba9d2faSAndrzej Hajda GATE(CLK_SMMU_JPEG, "smmu_jpeg", "aclk300_jpeg", GATE_IP_GEN, 7, 0, 0), 836cba9d2faSAndrzej Hajda GATE(CLK_SMMU_MDMA1, "smmu_mdma1", "aclk266", GATE_IP_GEN, 9, 0, 0), 8371609027fSChander Kashyap 838cba9d2faSAndrzej Hajda GATE(CLK_MSCL0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0), 839cba9d2faSAndrzej Hajda GATE(CLK_MSCL1, "mscl1", "aclk400_mscl", GATE_IP_MSCL, 1, 0, 0), 840cba9d2faSAndrzej Hajda GATE(CLK_MSCL2, "mscl2", "aclk400_mscl", GATE_IP_MSCL, 2, 0, 0), 841cba9d2faSAndrzej Hajda GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "aclk400_mscl", GATE_IP_MSCL, 8, 0, 842cba9d2faSAndrzej Hajda 0), 843cba9d2faSAndrzej Hajda GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "aclk400_mscl", GATE_IP_MSCL, 9, 0, 844cba9d2faSAndrzej Hajda 0), 845cba9d2faSAndrzej Hajda GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "aclk400_mscl", GATE_IP_MSCL, 10, 0, 846cba9d2faSAndrzej Hajda 0), 847cba9d2faSAndrzej Hajda GATE(CLK_SMMU_MIXER, "smmu_mixer", "aclk200_disp1", GATE_IP_DISP1, 9, 0, 848cba9d2faSAndrzej Hajda 0), 8491609027fSChander Kashyap }; 8501609027fSChander Kashyap 851202e5ae9SSachin Kamat static struct samsung_pll_clock exynos5420_plls[nr_plls] __initdata = { 852cba9d2faSAndrzej Hajda [apll] = PLL(pll_2550, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK, 8533ff6e0d8SYadwinder Singh Brar APLL_CON0, NULL), 854cba9d2faSAndrzej Hajda [cpll] = PLL(pll_2550, CLK_FOUT_CPLL, "fout_cpll", "fin_pll", CPLL_LOCK, 855cdf64eeeSChander Kashyap CPLL_CON0, NULL), 856cba9d2faSAndrzej Hajda [dpll] = PLL(pll_2550, CLK_FOUT_DPLL, "fout_dpll", "fin_pll", DPLL_LOCK, 8573ff6e0d8SYadwinder Singh Brar DPLL_CON0, NULL), 858cba9d2faSAndrzej Hajda [epll] = PLL(pll_2650, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK, 8593ff6e0d8SYadwinder Singh Brar EPLL_CON0, NULL), 860cba9d2faSAndrzej Hajda [rpll] = PLL(pll_2650, CLK_FOUT_RPLL, "fout_rpll", "fin_pll", RPLL_LOCK, 8613ff6e0d8SYadwinder Singh Brar RPLL_CON0, NULL), 862cba9d2faSAndrzej Hajda [ipll] = PLL(pll_2550, CLK_FOUT_IPLL, "fout_ipll", "fin_pll", IPLL_LOCK, 8633ff6e0d8SYadwinder Singh Brar IPLL_CON0, NULL), 864cba9d2faSAndrzej Hajda [spll] = PLL(pll_2550, CLK_FOUT_SPLL, "fout_spll", "fin_pll", SPLL_LOCK, 8653ff6e0d8SYadwinder Singh Brar SPLL_CON0, NULL), 866cba9d2faSAndrzej Hajda [vpll] = PLL(pll_2550, CLK_FOUT_VPLL, "fout_vpll", "fin_pll", VPLL_LOCK, 8673ff6e0d8SYadwinder Singh Brar VPLL_CON0, NULL), 868cba9d2faSAndrzej Hajda [mpll] = PLL(pll_2550, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK, 8693ff6e0d8SYadwinder Singh Brar MPLL_CON0, NULL), 870cba9d2faSAndrzej Hajda [bpll] = PLL(pll_2550, CLK_FOUT_BPLL, "fout_bpll", "fin_pll", BPLL_LOCK, 8713ff6e0d8SYadwinder Singh Brar BPLL_CON0, NULL), 872cba9d2faSAndrzej Hajda [kpll] = PLL(pll_2550, CLK_FOUT_KPLL, "fout_kpll", "fin_pll", KPLL_LOCK, 8733ff6e0d8SYadwinder Singh Brar KPLL_CON0, NULL), 874c898c6b7SYadwinder Singh Brar }; 875c898c6b7SYadwinder Singh Brar 876202e5ae9SSachin Kamat static struct of_device_id ext_clk_match[] __initdata = { 8771609027fSChander Kashyap { .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, }, 8781609027fSChander Kashyap { }, 8791609027fSChander Kashyap }; 8801609027fSChander Kashyap 8811609027fSChander Kashyap /* register exynos5420 clocks */ 882c7306229SSachin Kamat static void __init exynos5420_clk_init(struct device_node *np) 8831609027fSChander Kashyap { 884976face4SRahul Sharma struct samsung_clk_provider *ctx; 885976face4SRahul Sharma 8861609027fSChander Kashyap if (np) { 8871609027fSChander Kashyap reg_base = of_iomap(np, 0); 8881609027fSChander Kashyap if (!reg_base) 8891609027fSChander Kashyap panic("%s: failed to map registers\n", __func__); 8901609027fSChander Kashyap } else { 8911609027fSChander Kashyap panic("%s: unable to determine soc\n", __func__); 8921609027fSChander Kashyap } 8931609027fSChander Kashyap 894976face4SRahul Sharma ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS); 895976face4SRahul Sharma if (!ctx) 896976face4SRahul Sharma panic("%s: unable to allocate context.\n", __func__); 897976face4SRahul Sharma 898976face4SRahul Sharma samsung_clk_of_register_fixed_ext(ctx, exynos5420_fixed_rate_ext_clks, 8991609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_rate_ext_clks), 9001609027fSChander Kashyap ext_clk_match); 901976face4SRahul Sharma samsung_clk_register_pll(ctx, exynos5420_plls, 902976face4SRahul Sharma ARRAY_SIZE(exynos5420_plls), 903c898c6b7SYadwinder Singh Brar reg_base); 904976face4SRahul Sharma samsung_clk_register_fixed_rate(ctx, exynos5420_fixed_rate_clks, 9051609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_rate_clks)); 906976face4SRahul Sharma samsung_clk_register_fixed_factor(ctx, exynos5420_fixed_factor_clks, 9071609027fSChander Kashyap ARRAY_SIZE(exynos5420_fixed_factor_clks)); 908976face4SRahul Sharma samsung_clk_register_mux(ctx, exynos5420_mux_clks, 9091609027fSChander Kashyap ARRAY_SIZE(exynos5420_mux_clks)); 910976face4SRahul Sharma samsung_clk_register_div(ctx, exynos5420_div_clks, 9111609027fSChander Kashyap ARRAY_SIZE(exynos5420_div_clks)); 912976face4SRahul Sharma samsung_clk_register_gate(ctx, exynos5420_gate_clks, 9131609027fSChander Kashyap ARRAY_SIZE(exynos5420_gate_clks)); 914388c7885STomasz Figa 915388c7885STomasz Figa exynos5420_clk_sleep_init(); 9161609027fSChander Kashyap } 9171609027fSChander Kashyap CLK_OF_DECLARE(exynos5420_clk, "samsung,exynos5420-clock", exynos5420_clk_init); 918