1 /* 2 * EMMA Mobile EV2 common clock framework support 3 * 4 * Copyright (C) 2013 Takashi Yoshii <takashi.yoshii.ze@renesas.com> 5 * Copyright (C) 2012 Magnus Damm 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19 */ 20 #include <linux/clk-provider.h> 21 #include <linux/clkdev.h> 22 #include <linux/io.h> 23 #include <linux/of.h> 24 #include <linux/of_address.h> 25 26 /* EMEV2 SMU registers */ 27 #define USIAU0_RSTCTRL 0x094 28 #define USIBU1_RSTCTRL 0x0ac 29 #define USIBU2_RSTCTRL 0x0b0 30 #define USIBU3_RSTCTRL 0x0b4 31 #define IIC0_RSTCTRL 0x0dc 32 #define IIC1_RSTCTRL 0x0e0 33 #define STI_RSTCTRL 0x124 34 #define STI_CLKSEL 0x688 35 36 static DEFINE_SPINLOCK(lock); 37 38 /* not pretty, but hey */ 39 static void __iomem *smu_base; 40 41 static void __init emev2_smu_write(unsigned long value, int offs) 42 { 43 BUG_ON(!smu_base || (offs >= PAGE_SIZE)); 44 writel_relaxed(value, smu_base + offs); 45 } 46 47 static const struct of_device_id smu_id[] __initconst = { 48 { .compatible = "renesas,emev2-smu", }, 49 {}, 50 }; 51 52 static void __init emev2_smu_init(void) 53 { 54 struct device_node *np; 55 56 np = of_find_matching_node(NULL, smu_id); 57 BUG_ON(!np); 58 smu_base = of_iomap(np, 0); 59 BUG_ON(!smu_base); 60 of_node_put(np); 61 62 /* setup STI timer to run on 32.768 kHz and deassert reset */ 63 emev2_smu_write(0, STI_CLKSEL); 64 emev2_smu_write(1, STI_RSTCTRL); 65 66 /* deassert reset for UART0->UART3 */ 67 emev2_smu_write(2, USIAU0_RSTCTRL); 68 emev2_smu_write(2, USIBU1_RSTCTRL); 69 emev2_smu_write(2, USIBU2_RSTCTRL); 70 emev2_smu_write(2, USIBU3_RSTCTRL); 71 72 /* deassert reset for IIC0->IIC1 */ 73 emev2_smu_write(1, IIC0_RSTCTRL); 74 emev2_smu_write(1, IIC1_RSTCTRL); 75 } 76 77 static void __init emev2_smu_clkdiv_init(struct device_node *np) 78 { 79 u32 reg[2]; 80 struct clk *clk; 81 const char *parent_name = of_clk_get_parent_name(np, 0); 82 if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2))) 83 return; 84 if (!smu_base) 85 emev2_smu_init(); 86 clk = clk_register_divider(NULL, np->name, parent_name, 0, 87 smu_base + reg[0], reg[1], 8, 0, &lock); 88 of_clk_add_provider(np, of_clk_src_simple_get, clk); 89 clk_register_clkdev(clk, np->name, NULL); 90 pr_debug("## %s %s %p\n", __func__, np->name, clk); 91 } 92 CLK_OF_DECLARE(emev2_smu_clkdiv, "renesas,emev2-smu-clkdiv", 93 emev2_smu_clkdiv_init); 94 95 static void __init emev2_smu_gclk_init(struct device_node *np) 96 { 97 u32 reg[2]; 98 struct clk *clk; 99 const char *parent_name = of_clk_get_parent_name(np, 0); 100 if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2))) 101 return; 102 if (!smu_base) 103 emev2_smu_init(); 104 clk = clk_register_gate(NULL, np->name, parent_name, 0, 105 smu_base + reg[0], reg[1], 0, &lock); 106 of_clk_add_provider(np, of_clk_src_simple_get, clk); 107 clk_register_clkdev(clk, np->name, NULL); 108 pr_debug("## %s %s %p\n", __func__, np->name, clk); 109 } 110 CLK_OF_DECLARE(emev2_smu_gclk, "renesas,emev2-smu-gclk", emev2_smu_gclk_init); 111