1# SPDX-License-Identifier: GPL-2.0 2 3config CLK_RENESAS 4 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS 5 default y if ARCH_RENESAS 6 select CLK_EMEV2 if ARCH_EMEV2 7 select CLK_RZA1 if ARCH_R7S72100 8 select CLK_R7S9210 if ARCH_R7S9210 9 select CLK_R8A73A4 if ARCH_R8A73A4 10 select CLK_R8A7740 if ARCH_R8A7740 11 select CLK_R8A7742 if ARCH_R8A7742 12 select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744 13 select CLK_R8A7745 if ARCH_R8A7745 14 select CLK_R8A77470 if ARCH_R8A77470 15 select CLK_R8A774A1 if ARCH_R8A774A1 16 select CLK_R8A774B1 if ARCH_R8A774B1 17 select CLK_R8A774C0 if ARCH_R8A774C0 18 select CLK_R8A774E1 if ARCH_R8A774E1 19 select CLK_R8A7778 if ARCH_R8A7778 20 select CLK_R8A7779 if ARCH_R8A7779 21 select CLK_R8A7790 if ARCH_R8A7790 22 select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793 23 select CLK_R8A7792 if ARCH_R8A7792 24 select CLK_R8A7794 if ARCH_R8A7794 25 select CLK_R8A7795 if ARCH_R8A77951 26 select CLK_R8A77960 if ARCH_R8A77960 27 select CLK_R8A77961 if ARCH_R8A77961 28 select CLK_R8A77965 if ARCH_R8A77965 29 select CLK_R8A77970 if ARCH_R8A77970 30 select CLK_R8A77980 if ARCH_R8A77980 31 select CLK_R8A77990 if ARCH_R8A77990 32 select CLK_R8A77995 if ARCH_R8A77995 33 select CLK_R8A779A0 if ARCH_R8A779A0 34 select CLK_R8A779F0 if ARCH_R8A779F0 35 select CLK_R8A779G0 if ARCH_R8A779G0 36 select CLK_R9A06G032 if ARCH_R9A06G032 37 select CLK_R9A07G043 if ARCH_R9A07G043 38 select CLK_R9A07G044 if ARCH_R9A07G044 39 select CLK_R9A07G054 if ARCH_R9A07G054 40 select CLK_R9A09G011 if ARCH_R9A09G011 41 select CLK_SH73A0 if ARCH_SH73A0 42 43if CLK_RENESAS 44 45# SoC 46config CLK_EMEV2 47 bool "Emma Mobile EV2 clock support" if COMPILE_TEST 48 49config CLK_RZA1 50 bool "RZ/A1H clock support" if COMPILE_TEST 51 select CLK_RENESAS_CPG_MSTP 52 53config CLK_R7S9210 54 bool "RZ/A2 clock support" if COMPILE_TEST 55 select CLK_RENESAS_CPG_MSSR 56 57config CLK_R8A73A4 58 bool "R-Mobile APE6 clock support" if COMPILE_TEST 59 select CLK_RENESAS_CPG_MSTP 60 select CLK_RENESAS_DIV6 61 62config CLK_R8A7740 63 bool "R-Mobile A1 clock support" if COMPILE_TEST 64 select CLK_RENESAS_CPG_MSTP 65 select CLK_RENESAS_DIV6 66 67config CLK_R8A7742 68 bool "RZ/G1H clock support" if COMPILE_TEST 69 select CLK_RCAR_GEN2_CPG 70 71config CLK_R8A7743 72 bool "RZ/G1M clock support" if COMPILE_TEST 73 select CLK_RCAR_GEN2_CPG 74 75config CLK_R8A7745 76 bool "RZ/G1E clock support" if COMPILE_TEST 77 select CLK_RCAR_GEN2_CPG 78 79config CLK_R8A77470 80 bool "RZ/G1C clock support" if COMPILE_TEST 81 select CLK_RCAR_GEN2_CPG 82 83config CLK_R8A774A1 84 bool "RZ/G2M clock support" if COMPILE_TEST 85 select CLK_RCAR_GEN3_CPG 86 87config CLK_R8A774B1 88 bool "RZ/G2N clock support" if COMPILE_TEST 89 select CLK_RCAR_GEN3_CPG 90 91config CLK_R8A774C0 92 bool "RZ/G2E clock support" if COMPILE_TEST 93 select CLK_RCAR_GEN3_CPG 94 95config CLK_R8A774E1 96 bool "RZ/G2H clock support" if COMPILE_TEST 97 select CLK_RCAR_GEN3_CPG 98 99config CLK_R8A7778 100 bool "R-Car M1A clock support" if COMPILE_TEST 101 select CLK_RENESAS_CPG_MSTP 102 103config CLK_R8A7779 104 bool "R-Car H1 clock support" if COMPILE_TEST 105 select CLK_RENESAS_CPG_MSTP 106 107config CLK_R8A7790 108 bool "R-Car H2 clock support" if COMPILE_TEST 109 select CLK_RCAR_GEN2_CPG 110 111config CLK_R8A7791 112 bool "R-Car M2-W/N clock support" if COMPILE_TEST 113 select CLK_RCAR_GEN2_CPG 114 115config CLK_R8A7792 116 bool "R-Car V2H clock support" if COMPILE_TEST 117 select CLK_RCAR_GEN2_CPG 118 119config CLK_R8A7794 120 bool "R-Car E2 clock support" if COMPILE_TEST 121 select CLK_RCAR_GEN2_CPG 122 123config CLK_R8A7795 124 bool "R-Car H3 clock support" if COMPILE_TEST 125 select CLK_RCAR_GEN3_CPG 126 127config CLK_R8A77960 128 bool "R-Car M3-W clock support" if COMPILE_TEST 129 select CLK_RCAR_GEN3_CPG 130 131config CLK_R8A77961 132 bool "R-Car M3-W+ clock support" if COMPILE_TEST 133 select CLK_RCAR_GEN3_CPG 134 135config CLK_R8A77965 136 bool "R-Car M3-N clock support" if COMPILE_TEST 137 select CLK_RCAR_GEN3_CPG 138 139config CLK_R8A77970 140 bool "R-Car V3M clock support" if COMPILE_TEST 141 select CLK_RCAR_GEN3_CPG 142 143config CLK_R8A77980 144 bool "R-Car V3H clock support" if COMPILE_TEST 145 select CLK_RCAR_GEN3_CPG 146 147config CLK_R8A77990 148 bool "R-Car E3 clock support" if COMPILE_TEST 149 select CLK_RCAR_GEN3_CPG 150 151config CLK_R8A77995 152 bool "R-Car D3 clock support" if COMPILE_TEST 153 select CLK_RCAR_GEN3_CPG 154 155config CLK_R8A779A0 156 bool "R-Car V3U clock support" if COMPILE_TEST 157 select CLK_RCAR_GEN4_CPG 158 159config CLK_R8A779F0 160 bool "R-Car S4-8 clock support" if COMPILE_TEST 161 select CLK_RCAR_GEN4_CPG 162 163config CLK_R8A779G0 164 bool "R-Car V4H clock support" if COMPILE_TEST 165 select CLK_RCAR_GEN4_CPG 166 167config CLK_R9A06G032 168 bool "RZ/N1D clock support" if COMPILE_TEST 169 170config CLK_R9A07G043 171 bool "RZ/G2UL clock support" if COMPILE_TEST 172 select CLK_RZG2L 173 174config CLK_R9A07G044 175 bool "RZ/G2L clock support" if COMPILE_TEST 176 select CLK_RZG2L 177 178config CLK_R9A07G054 179 bool "RZ/V2L clock support" if COMPILE_TEST 180 select CLK_RZG2L 181 182config CLK_R9A09G011 183 bool "RZ/V2M clock support" if COMPILE_TEST 184 select CLK_RZG2L 185 186config CLK_SH73A0 187 bool "SH-Mobile AG5 clock support" if COMPILE_TEST 188 select CLK_RENESAS_CPG_MSTP 189 select CLK_RENESAS_DIV6 190 191 192# Family 193config CLK_RCAR_CPG_LIB 194 bool "CPG/MSSR library functions" if COMPILE_TEST 195 196config CLK_RCAR_GEN2_CPG 197 bool "R-Car Gen2 CPG clock support" if COMPILE_TEST 198 select CLK_RENESAS_CPG_MSSR 199 200config CLK_RCAR_GEN3_CPG 201 bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST 202 select CLK_RCAR_CPG_LIB 203 select CLK_RENESAS_CPG_MSSR 204 205config CLK_RCAR_GEN4_CPG 206 bool "R-Car Gen4 clock support" if COMPILE_TEST 207 select CLK_RCAR_CPG_LIB 208 select CLK_RENESAS_CPG_MSSR 209 210config CLK_RCAR_USB2_CLOCK_SEL 211 bool "Renesas R-Car USB2 clock selector support" 212 depends on ARCH_RENESAS || COMPILE_TEST 213 select RESET_CONTROLLER 214 help 215 This is a driver for R-Car USB2 clock selector 216 217config CLK_RZG2L 218 bool "Renesas RZ/{G2L,G2UL,V2L} family clock support" if COMPILE_TEST 219 select RESET_CONTROLLER 220 221# Generic 222config CLK_RENESAS_CPG_MSSR 223 bool "CPG/MSSR clock support" if COMPILE_TEST 224 select CLK_RENESAS_DIV6 225 226config CLK_RENESAS_CPG_MSTP 227 bool "MSTP clock support" if COMPILE_TEST 228 229config CLK_RENESAS_DIV6 230 bool "DIV6 clock support" if COMPILE_TEST 231 232endif # CLK_RENESAS 233