1d14b15b5SJeffrey Hugo // SPDX-License-Identifier: GPL-2.0 2d14b15b5SJeffrey Hugo /* 3d14b15b5SJeffrey Hugo * Copyright (c) 2019, The Linux Foundation. All rights reserved. 4d14b15b5SJeffrey Hugo */ 5d14b15b5SJeffrey Hugo 6d14b15b5SJeffrey Hugo #include <linux/kernel.h> 7d14b15b5SJeffrey Hugo #include <linux/bitops.h> 8d14b15b5SJeffrey Hugo #include <linux/err.h> 9d14b15b5SJeffrey Hugo #include <linux/platform_device.h> 10d14b15b5SJeffrey Hugo #include <linux/module.h> 11d14b15b5SJeffrey Hugo #include <linux/of.h> 12d14b15b5SJeffrey Hugo #include <linux/of_device.h> 13d14b15b5SJeffrey Hugo #include <linux/clk-provider.h> 14d14b15b5SJeffrey Hugo #include <linux/regmap.h> 15d14b15b5SJeffrey Hugo #include <linux/reset-controller.h> 16d14b15b5SJeffrey Hugo 17d14b15b5SJeffrey Hugo #include <dt-bindings/clock/qcom,mmcc-msm8998.h> 18d14b15b5SJeffrey Hugo 19d14b15b5SJeffrey Hugo #include "common.h" 20d14b15b5SJeffrey Hugo #include "clk-regmap.h" 21d14b15b5SJeffrey Hugo #include "clk-regmap-divider.h" 22d14b15b5SJeffrey Hugo #include "clk-alpha-pll.h" 23d14b15b5SJeffrey Hugo #include "clk-rcg.h" 24d14b15b5SJeffrey Hugo #include "clk-branch.h" 25d14b15b5SJeffrey Hugo #include "reset.h" 26d14b15b5SJeffrey Hugo #include "gdsc.h" 27d14b15b5SJeffrey Hugo 28d14b15b5SJeffrey Hugo enum { 29d14b15b5SJeffrey Hugo P_XO, 30d14b15b5SJeffrey Hugo P_GPLL0, 31d14b15b5SJeffrey Hugo P_GPLL0_DIV, 32d14b15b5SJeffrey Hugo P_MMPLL0_OUT_EVEN, 33d14b15b5SJeffrey Hugo P_MMPLL1_OUT_EVEN, 34d14b15b5SJeffrey Hugo P_MMPLL3_OUT_EVEN, 35d14b15b5SJeffrey Hugo P_MMPLL4_OUT_EVEN, 36d14b15b5SJeffrey Hugo P_MMPLL5_OUT_EVEN, 37d14b15b5SJeffrey Hugo P_MMPLL6_OUT_EVEN, 38d14b15b5SJeffrey Hugo P_MMPLL7_OUT_EVEN, 39d14b15b5SJeffrey Hugo P_MMPLL10_OUT_EVEN, 40d14b15b5SJeffrey Hugo P_DSI0PLL, 41d14b15b5SJeffrey Hugo P_DSI1PLL, 42d14b15b5SJeffrey Hugo P_DSI0PLL_BYTE, 43d14b15b5SJeffrey Hugo P_DSI1PLL_BYTE, 44d14b15b5SJeffrey Hugo P_HDMIPLL, 45d14b15b5SJeffrey Hugo P_DPVCO, 46d14b15b5SJeffrey Hugo P_DPLINK, 47d14b15b5SJeffrey Hugo P_CORE_BI_PLL_TEST_SE, 48d14b15b5SJeffrey Hugo }; 49d14b15b5SJeffrey Hugo 50d14b15b5SJeffrey Hugo static struct clk_fixed_factor gpll0_div = { 51d14b15b5SJeffrey Hugo .mult = 1, 52d14b15b5SJeffrey Hugo .div = 2, 53d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 54d14b15b5SJeffrey Hugo .name = "mmss_gpll0_div", 55d14b15b5SJeffrey Hugo .parent_data = &(const struct clk_parent_data){ 56d14b15b5SJeffrey Hugo .fw_name = "gpll0", 57d14b15b5SJeffrey Hugo .name = "gpll0" 58d14b15b5SJeffrey Hugo }, 59d14b15b5SJeffrey Hugo .num_parents = 1, 60d14b15b5SJeffrey Hugo .ops = &clk_fixed_factor_ops, 61d14b15b5SJeffrey Hugo }, 62d14b15b5SJeffrey Hugo }; 63d14b15b5SJeffrey Hugo 64d14b15b5SJeffrey Hugo static const struct clk_div_table post_div_table_fabia_even[] = { 65d14b15b5SJeffrey Hugo { 0x0, 1 }, 66d14b15b5SJeffrey Hugo { 0x1, 2 }, 67d14b15b5SJeffrey Hugo { 0x3, 4 }, 68d14b15b5SJeffrey Hugo { 0x7, 8 }, 69d14b15b5SJeffrey Hugo { } 70d14b15b5SJeffrey Hugo }; 71d14b15b5SJeffrey Hugo 72d14b15b5SJeffrey Hugo static struct clk_alpha_pll mmpll0 = { 73d14b15b5SJeffrey Hugo .offset = 0xc000, 74d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 75d14b15b5SJeffrey Hugo .clkr = { 76d14b15b5SJeffrey Hugo .enable_reg = 0x1e0, 77d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 78d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 79d14b15b5SJeffrey Hugo .name = "mmpll0", 80d14b15b5SJeffrey Hugo .parent_data = &(const struct clk_parent_data){ 81d14b15b5SJeffrey Hugo .fw_name = "xo", 82d14b15b5SJeffrey Hugo .name = "xo" 83d14b15b5SJeffrey Hugo }, 84d14b15b5SJeffrey Hugo .num_parents = 1, 85d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_fixed_fabia_ops, 86d14b15b5SJeffrey Hugo }, 87d14b15b5SJeffrey Hugo }, 88d14b15b5SJeffrey Hugo }; 89d14b15b5SJeffrey Hugo 90d14b15b5SJeffrey Hugo static struct clk_alpha_pll_postdiv mmpll0_out_even = { 91d14b15b5SJeffrey Hugo .offset = 0xc000, 92d14b15b5SJeffrey Hugo .post_div_shift = 8, 93d14b15b5SJeffrey Hugo .post_div_table = post_div_table_fabia_even, 94d14b15b5SJeffrey Hugo .num_post_div = ARRAY_SIZE(post_div_table_fabia_even), 95d14b15b5SJeffrey Hugo .width = 4, 96d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 97d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 98d14b15b5SJeffrey Hugo .name = "mmpll0_out_even", 99d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mmpll0.clkr.hw }, 100d14b15b5SJeffrey Hugo .num_parents = 1, 101d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_postdiv_fabia_ops, 102d14b15b5SJeffrey Hugo }, 103d14b15b5SJeffrey Hugo }; 104d14b15b5SJeffrey Hugo 105d14b15b5SJeffrey Hugo static struct clk_alpha_pll mmpll1 = { 106d14b15b5SJeffrey Hugo .offset = 0xc050, 107d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 108d14b15b5SJeffrey Hugo .clkr = { 109d14b15b5SJeffrey Hugo .enable_reg = 0x1e0, 110d14b15b5SJeffrey Hugo .enable_mask = BIT(1), 111d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 112d14b15b5SJeffrey Hugo .name = "mmpll1", 113d14b15b5SJeffrey Hugo .parent_data = &(const struct clk_parent_data){ 114d14b15b5SJeffrey Hugo .fw_name = "xo", 115d14b15b5SJeffrey Hugo .name = "xo" 116d14b15b5SJeffrey Hugo }, 117d14b15b5SJeffrey Hugo .num_parents = 1, 118d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_fixed_fabia_ops, 119d14b15b5SJeffrey Hugo }, 120d14b15b5SJeffrey Hugo }, 121d14b15b5SJeffrey Hugo }; 122d14b15b5SJeffrey Hugo 123d14b15b5SJeffrey Hugo static struct clk_alpha_pll_postdiv mmpll1_out_even = { 124d14b15b5SJeffrey Hugo .offset = 0xc050, 125d14b15b5SJeffrey Hugo .post_div_shift = 8, 126d14b15b5SJeffrey Hugo .post_div_table = post_div_table_fabia_even, 127d14b15b5SJeffrey Hugo .num_post_div = ARRAY_SIZE(post_div_table_fabia_even), 128d14b15b5SJeffrey Hugo .width = 4, 129d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 130d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 131d14b15b5SJeffrey Hugo .name = "mmpll1_out_even", 132d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mmpll1.clkr.hw }, 133d14b15b5SJeffrey Hugo .num_parents = 1, 134d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_postdiv_fabia_ops, 135d14b15b5SJeffrey Hugo }, 136d14b15b5SJeffrey Hugo }; 137d14b15b5SJeffrey Hugo 138d14b15b5SJeffrey Hugo static struct clk_alpha_pll mmpll3 = { 139d14b15b5SJeffrey Hugo .offset = 0x0, 140d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 141d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 142d14b15b5SJeffrey Hugo .name = "mmpll3", 143d14b15b5SJeffrey Hugo .parent_data = &(const struct clk_parent_data){ 144d14b15b5SJeffrey Hugo .fw_name = "xo", 145d14b15b5SJeffrey Hugo .name = "xo" 146d14b15b5SJeffrey Hugo }, 147d14b15b5SJeffrey Hugo .num_parents = 1, 148d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_fixed_fabia_ops, 149d14b15b5SJeffrey Hugo }, 150d14b15b5SJeffrey Hugo }; 151d14b15b5SJeffrey Hugo 152d14b15b5SJeffrey Hugo static struct clk_alpha_pll_postdiv mmpll3_out_even = { 153d14b15b5SJeffrey Hugo .offset = 0x0, 154d14b15b5SJeffrey Hugo .post_div_shift = 8, 155d14b15b5SJeffrey Hugo .post_div_table = post_div_table_fabia_even, 156d14b15b5SJeffrey Hugo .num_post_div = ARRAY_SIZE(post_div_table_fabia_even), 157d14b15b5SJeffrey Hugo .width = 4, 158d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 159d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 160d14b15b5SJeffrey Hugo .name = "mmpll3_out_even", 161d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mmpll3.clkr.hw }, 162d14b15b5SJeffrey Hugo .num_parents = 1, 163d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_postdiv_fabia_ops, 164d14b15b5SJeffrey Hugo }, 165d14b15b5SJeffrey Hugo }; 166d14b15b5SJeffrey Hugo 167d14b15b5SJeffrey Hugo static struct clk_alpha_pll mmpll4 = { 168d14b15b5SJeffrey Hugo .offset = 0x50, 169d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 170d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 171d14b15b5SJeffrey Hugo .name = "mmpll4", 172d14b15b5SJeffrey Hugo .parent_data = &(const struct clk_parent_data){ 173d14b15b5SJeffrey Hugo .fw_name = "xo", 174d14b15b5SJeffrey Hugo .name = "xo" 175d14b15b5SJeffrey Hugo }, 176d14b15b5SJeffrey Hugo .num_parents = 1, 177d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_fixed_fabia_ops, 178d14b15b5SJeffrey Hugo }, 179d14b15b5SJeffrey Hugo }; 180d14b15b5SJeffrey Hugo 181d14b15b5SJeffrey Hugo static struct clk_alpha_pll_postdiv mmpll4_out_even = { 182d14b15b5SJeffrey Hugo .offset = 0x50, 183d14b15b5SJeffrey Hugo .post_div_shift = 8, 184d14b15b5SJeffrey Hugo .post_div_table = post_div_table_fabia_even, 185d14b15b5SJeffrey Hugo .num_post_div = ARRAY_SIZE(post_div_table_fabia_even), 186d14b15b5SJeffrey Hugo .width = 4, 187d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 188d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 189d14b15b5SJeffrey Hugo .name = "mmpll4_out_even", 190d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mmpll4.clkr.hw }, 191d14b15b5SJeffrey Hugo .num_parents = 1, 192d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_postdiv_fabia_ops, 193d14b15b5SJeffrey Hugo }, 194d14b15b5SJeffrey Hugo }; 195d14b15b5SJeffrey Hugo 196d14b15b5SJeffrey Hugo static struct clk_alpha_pll mmpll5 = { 197d14b15b5SJeffrey Hugo .offset = 0xa0, 198d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 199d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 200d14b15b5SJeffrey Hugo .name = "mmpll5", 201d14b15b5SJeffrey Hugo .parent_data = &(const struct clk_parent_data){ 202d14b15b5SJeffrey Hugo .fw_name = "xo", 203d14b15b5SJeffrey Hugo .name = "xo" 204d14b15b5SJeffrey Hugo }, 205d14b15b5SJeffrey Hugo .num_parents = 1, 206d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_fixed_fabia_ops, 207d14b15b5SJeffrey Hugo }, 208d14b15b5SJeffrey Hugo }; 209d14b15b5SJeffrey Hugo 210d14b15b5SJeffrey Hugo static struct clk_alpha_pll_postdiv mmpll5_out_even = { 211d14b15b5SJeffrey Hugo .offset = 0xa0, 212d14b15b5SJeffrey Hugo .post_div_shift = 8, 213d14b15b5SJeffrey Hugo .post_div_table = post_div_table_fabia_even, 214d14b15b5SJeffrey Hugo .num_post_div = ARRAY_SIZE(post_div_table_fabia_even), 215d14b15b5SJeffrey Hugo .width = 4, 216d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 217d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 218d14b15b5SJeffrey Hugo .name = "mmpll5_out_even", 219d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mmpll5.clkr.hw }, 220d14b15b5SJeffrey Hugo .num_parents = 1, 221d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_postdiv_fabia_ops, 222d14b15b5SJeffrey Hugo }, 223d14b15b5SJeffrey Hugo }; 224d14b15b5SJeffrey Hugo 225d14b15b5SJeffrey Hugo static struct clk_alpha_pll mmpll6 = { 226d14b15b5SJeffrey Hugo .offset = 0xf0, 227d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 228d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 229d14b15b5SJeffrey Hugo .name = "mmpll6", 230d14b15b5SJeffrey Hugo .parent_data = &(const struct clk_parent_data){ 231d14b15b5SJeffrey Hugo .fw_name = "xo", 232d14b15b5SJeffrey Hugo .name = "xo" 233d14b15b5SJeffrey Hugo }, 234d14b15b5SJeffrey Hugo .num_parents = 1, 235d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_fixed_fabia_ops, 236d14b15b5SJeffrey Hugo }, 237d14b15b5SJeffrey Hugo }; 238d14b15b5SJeffrey Hugo 239d14b15b5SJeffrey Hugo static struct clk_alpha_pll_postdiv mmpll6_out_even = { 240d14b15b5SJeffrey Hugo .offset = 0xf0, 241d14b15b5SJeffrey Hugo .post_div_shift = 8, 242d14b15b5SJeffrey Hugo .post_div_table = post_div_table_fabia_even, 243d14b15b5SJeffrey Hugo .num_post_div = ARRAY_SIZE(post_div_table_fabia_even), 244d14b15b5SJeffrey Hugo .width = 4, 245d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 246d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 247d14b15b5SJeffrey Hugo .name = "mmpll6_out_even", 248d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mmpll6.clkr.hw }, 249d14b15b5SJeffrey Hugo .num_parents = 1, 250d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_postdiv_fabia_ops, 251d14b15b5SJeffrey Hugo }, 252d14b15b5SJeffrey Hugo }; 253d14b15b5SJeffrey Hugo 254d14b15b5SJeffrey Hugo static struct clk_alpha_pll mmpll7 = { 255d14b15b5SJeffrey Hugo .offset = 0x140, 256d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 257d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 258d14b15b5SJeffrey Hugo .name = "mmpll7", 259d14b15b5SJeffrey Hugo .parent_data = &(const struct clk_parent_data){ 260d14b15b5SJeffrey Hugo .fw_name = "xo", 261d14b15b5SJeffrey Hugo .name = "xo" 262d14b15b5SJeffrey Hugo }, 263d14b15b5SJeffrey Hugo .num_parents = 1, 264d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_fixed_fabia_ops, 265d14b15b5SJeffrey Hugo }, 266d14b15b5SJeffrey Hugo }; 267d14b15b5SJeffrey Hugo 268d14b15b5SJeffrey Hugo static struct clk_alpha_pll_postdiv mmpll7_out_even = { 269d14b15b5SJeffrey Hugo .offset = 0x140, 270d14b15b5SJeffrey Hugo .post_div_shift = 8, 271d14b15b5SJeffrey Hugo .post_div_table = post_div_table_fabia_even, 272d14b15b5SJeffrey Hugo .num_post_div = ARRAY_SIZE(post_div_table_fabia_even), 273d14b15b5SJeffrey Hugo .width = 4, 274d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 275d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 276d14b15b5SJeffrey Hugo .name = "mmpll7_out_even", 277d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mmpll7.clkr.hw }, 278d14b15b5SJeffrey Hugo .num_parents = 1, 279d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_postdiv_fabia_ops, 280d14b15b5SJeffrey Hugo }, 281d14b15b5SJeffrey Hugo }; 282d14b15b5SJeffrey Hugo 283d14b15b5SJeffrey Hugo static struct clk_alpha_pll mmpll10 = { 284d14b15b5SJeffrey Hugo .offset = 0x190, 285d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 286d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 287d14b15b5SJeffrey Hugo .name = "mmpll10", 288d14b15b5SJeffrey Hugo .parent_data = &(const struct clk_parent_data){ 289d14b15b5SJeffrey Hugo .fw_name = "xo", 290d14b15b5SJeffrey Hugo .name = "xo" 291d14b15b5SJeffrey Hugo }, 292d14b15b5SJeffrey Hugo .num_parents = 1, 293d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_fixed_fabia_ops, 294d14b15b5SJeffrey Hugo }, 295d14b15b5SJeffrey Hugo }; 296d14b15b5SJeffrey Hugo 297d14b15b5SJeffrey Hugo static struct clk_alpha_pll_postdiv mmpll10_out_even = { 298d14b15b5SJeffrey Hugo .offset = 0x190, 299d14b15b5SJeffrey Hugo .post_div_shift = 8, 300d14b15b5SJeffrey Hugo .post_div_table = post_div_table_fabia_even, 301d14b15b5SJeffrey Hugo .num_post_div = ARRAY_SIZE(post_div_table_fabia_even), 302d14b15b5SJeffrey Hugo .width = 4, 303d14b15b5SJeffrey Hugo .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 304d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 305d14b15b5SJeffrey Hugo .name = "mmpll10_out_even", 306d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mmpll10.clkr.hw }, 307d14b15b5SJeffrey Hugo .num_parents = 1, 308d14b15b5SJeffrey Hugo .ops = &clk_alpha_pll_postdiv_fabia_ops, 309d14b15b5SJeffrey Hugo }, 310d14b15b5SJeffrey Hugo }; 311d14b15b5SJeffrey Hugo 312d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_hdmi_map[] = { 313d14b15b5SJeffrey Hugo { P_XO, 0 }, 314d14b15b5SJeffrey Hugo { P_HDMIPLL, 1 }, 315d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 316d14b15b5SJeffrey Hugo }; 317d14b15b5SJeffrey Hugo 318d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_hdmi[] = { 319d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 320d14b15b5SJeffrey Hugo { .fw_name = "hdmipll", .name = "hdmipll" }, 321d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 322d14b15b5SJeffrey Hugo }; 323d14b15b5SJeffrey Hugo 324d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_dsi0pll_dsi1pll_map[] = { 325d14b15b5SJeffrey Hugo { P_XO, 0 }, 326d14b15b5SJeffrey Hugo { P_DSI0PLL, 1 }, 327d14b15b5SJeffrey Hugo { P_DSI1PLL, 2 }, 328d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 329d14b15b5SJeffrey Hugo }; 330d14b15b5SJeffrey Hugo 331d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_dsi0pll_dsi1pll[] = { 332d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 333d14b15b5SJeffrey Hugo { .fw_name = "dsi0dsi", .name = "dsi0dsi" }, 334d14b15b5SJeffrey Hugo { .fw_name = "dsi1dsi", .name = "dsi1dsi" }, 335d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 336d14b15b5SJeffrey Hugo }; 337d14b15b5SJeffrey Hugo 338d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_dsibyte_map[] = { 339d14b15b5SJeffrey Hugo { P_XO, 0 }, 340d14b15b5SJeffrey Hugo { P_DSI0PLL_BYTE, 1 }, 341d14b15b5SJeffrey Hugo { P_DSI1PLL_BYTE, 2 }, 342d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 343d14b15b5SJeffrey Hugo }; 344d14b15b5SJeffrey Hugo 345d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_dsibyte[] = { 346d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 347d14b15b5SJeffrey Hugo { .fw_name = "dsi0byte", .name = "dsi0byte" }, 348d14b15b5SJeffrey Hugo { .fw_name = "dsi1byte", .name = "dsi1byte" }, 349d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 350d14b15b5SJeffrey Hugo }; 351d14b15b5SJeffrey Hugo 352d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_dp_map[] = { 353d14b15b5SJeffrey Hugo { P_XO, 0 }, 354d14b15b5SJeffrey Hugo { P_DPLINK, 1 }, 355d14b15b5SJeffrey Hugo { P_DPVCO, 2 }, 356d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 357d14b15b5SJeffrey Hugo }; 358d14b15b5SJeffrey Hugo 359d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_dp[] = { 360d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 361d14b15b5SJeffrey Hugo { .fw_name = "dplink", .name = "dplink" }, 362d14b15b5SJeffrey Hugo { .fw_name = "dpvco", .name = "dpvco" }, 363d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 364d14b15b5SJeffrey Hugo }; 365d14b15b5SJeffrey Hugo 366d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_gpll0_gpll0_div_map[] = { 367d14b15b5SJeffrey Hugo { P_XO, 0 }, 368d14b15b5SJeffrey Hugo { P_GPLL0, 5 }, 369d14b15b5SJeffrey Hugo { P_GPLL0_DIV, 6 }, 370d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 371d14b15b5SJeffrey Hugo }; 372d14b15b5SJeffrey Hugo 373d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_gpll0_gpll0_div[] = { 374d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 375d14b15b5SJeffrey Hugo { .fw_name = "gpll0", .name = "gpll0" }, 376d14b15b5SJeffrey Hugo { .hw = &gpll0_div.hw }, 377d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 378d14b15b5SJeffrey Hugo }; 379d14b15b5SJeffrey Hugo 380d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_mmpll0_gpll0_gpll0_div_map[] = { 381d14b15b5SJeffrey Hugo { P_XO, 0 }, 382d14b15b5SJeffrey Hugo { P_MMPLL0_OUT_EVEN, 1 }, 383d14b15b5SJeffrey Hugo { P_GPLL0, 5 }, 384d14b15b5SJeffrey Hugo { P_GPLL0_DIV, 6 }, 385d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 386d14b15b5SJeffrey Hugo }; 387d14b15b5SJeffrey Hugo 388d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_mmpll0_gpll0_gpll0_div[] = { 389d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 390d14b15b5SJeffrey Hugo { .hw = &mmpll0_out_even.clkr.hw }, 391d14b15b5SJeffrey Hugo { .fw_name = "gpll0", .name = "gpll0" }, 392d14b15b5SJeffrey Hugo { .hw = &gpll0_div.hw }, 393d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 394d14b15b5SJeffrey Hugo }; 395d14b15b5SJeffrey Hugo 396d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div_map[] = { 397d14b15b5SJeffrey Hugo { P_XO, 0 }, 398d14b15b5SJeffrey Hugo { P_MMPLL0_OUT_EVEN, 1 }, 399d14b15b5SJeffrey Hugo { P_MMPLL1_OUT_EVEN, 2 }, 400d14b15b5SJeffrey Hugo { P_GPLL0, 5 }, 401d14b15b5SJeffrey Hugo { P_GPLL0_DIV, 6 }, 402d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 403d14b15b5SJeffrey Hugo }; 404d14b15b5SJeffrey Hugo 405d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div[] = { 406d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 407d14b15b5SJeffrey Hugo { .hw = &mmpll0_out_even.clkr.hw }, 408d14b15b5SJeffrey Hugo { .hw = &mmpll1_out_even.clkr.hw }, 409d14b15b5SJeffrey Hugo { .fw_name = "gpll0", .name = "gpll0" }, 410d14b15b5SJeffrey Hugo { .hw = &gpll0_div.hw }, 411d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 412d14b15b5SJeffrey Hugo }; 413d14b15b5SJeffrey Hugo 414d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div_map[] = { 415d14b15b5SJeffrey Hugo { P_XO, 0 }, 416d14b15b5SJeffrey Hugo { P_MMPLL0_OUT_EVEN, 1 }, 417d14b15b5SJeffrey Hugo { P_MMPLL5_OUT_EVEN, 2 }, 418d14b15b5SJeffrey Hugo { P_GPLL0, 5 }, 419d14b15b5SJeffrey Hugo { P_GPLL0_DIV, 6 }, 420d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 421d14b15b5SJeffrey Hugo }; 422d14b15b5SJeffrey Hugo 423d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div[] = { 424d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 425d14b15b5SJeffrey Hugo { .hw = &mmpll0_out_even.clkr.hw }, 426d14b15b5SJeffrey Hugo { .hw = &mmpll5_out_even.clkr.hw }, 427d14b15b5SJeffrey Hugo { .fw_name = "gpll0", .name = "gpll0" }, 428d14b15b5SJeffrey Hugo { .hw = &gpll0_div.hw }, 429d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 430d14b15b5SJeffrey Hugo }; 431d14b15b5SJeffrey Hugo 432d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div_map[] = { 433d14b15b5SJeffrey Hugo { P_XO, 0 }, 434d14b15b5SJeffrey Hugo { P_MMPLL0_OUT_EVEN, 1 }, 435d14b15b5SJeffrey Hugo { P_MMPLL3_OUT_EVEN, 3 }, 436d14b15b5SJeffrey Hugo { P_MMPLL6_OUT_EVEN, 4 }, 437d14b15b5SJeffrey Hugo { P_GPLL0, 5 }, 438d14b15b5SJeffrey Hugo { P_GPLL0_DIV, 6 }, 439d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 440d14b15b5SJeffrey Hugo }; 441d14b15b5SJeffrey Hugo 442d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div[] = { 443d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 444d14b15b5SJeffrey Hugo { .hw = &mmpll0_out_even.clkr.hw }, 445d14b15b5SJeffrey Hugo { .hw = &mmpll3_out_even.clkr.hw }, 446d14b15b5SJeffrey Hugo { .hw = &mmpll6_out_even.clkr.hw }, 447d14b15b5SJeffrey Hugo { .fw_name = "gpll0", .name = "gpll0" }, 448d14b15b5SJeffrey Hugo { .hw = &gpll0_div.hw }, 449d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 450d14b15b5SJeffrey Hugo }; 451d14b15b5SJeffrey Hugo 452d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map[] = { 453d14b15b5SJeffrey Hugo { P_XO, 0 }, 454d14b15b5SJeffrey Hugo { P_MMPLL4_OUT_EVEN, 1 }, 455d14b15b5SJeffrey Hugo { P_MMPLL7_OUT_EVEN, 2 }, 456d14b15b5SJeffrey Hugo { P_MMPLL10_OUT_EVEN, 3 }, 457d14b15b5SJeffrey Hugo { P_GPLL0, 5 }, 458d14b15b5SJeffrey Hugo { P_GPLL0_DIV, 6 }, 459d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 460d14b15b5SJeffrey Hugo }; 461d14b15b5SJeffrey Hugo 462d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div[] = { 463d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 464d14b15b5SJeffrey Hugo { .hw = &mmpll4_out_even.clkr.hw }, 465d14b15b5SJeffrey Hugo { .hw = &mmpll7_out_even.clkr.hw }, 466d14b15b5SJeffrey Hugo { .hw = &mmpll10_out_even.clkr.hw }, 467d14b15b5SJeffrey Hugo { .fw_name = "gpll0", .name = "gpll0" }, 468d14b15b5SJeffrey Hugo { .hw = &gpll0_div.hw }, 469d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 470d14b15b5SJeffrey Hugo }; 471d14b15b5SJeffrey Hugo 472d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div_map[] = { 473d14b15b5SJeffrey Hugo { P_XO, 0 }, 474d14b15b5SJeffrey Hugo { P_MMPLL0_OUT_EVEN, 1 }, 475d14b15b5SJeffrey Hugo { P_MMPLL7_OUT_EVEN, 2 }, 476d14b15b5SJeffrey Hugo { P_MMPLL10_OUT_EVEN, 3 }, 477d14b15b5SJeffrey Hugo { P_GPLL0, 5 }, 478d14b15b5SJeffrey Hugo { P_GPLL0_DIV, 6 }, 479d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 480d14b15b5SJeffrey Hugo }; 481d14b15b5SJeffrey Hugo 482d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div[] = { 483d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 484d14b15b5SJeffrey Hugo { .hw = &mmpll0_out_even.clkr.hw }, 485d14b15b5SJeffrey Hugo { .hw = &mmpll7_out_even.clkr.hw }, 486d14b15b5SJeffrey Hugo { .hw = &mmpll10_out_even.clkr.hw }, 487d14b15b5SJeffrey Hugo { .fw_name = "gpll0", .name = "gpll0" }, 488d14b15b5SJeffrey Hugo { .hw = &gpll0_div.hw }, 489d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 490d14b15b5SJeffrey Hugo }; 491d14b15b5SJeffrey Hugo 492d14b15b5SJeffrey Hugo static const struct parent_map mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map[] = { 493d14b15b5SJeffrey Hugo { P_XO, 0 }, 494d14b15b5SJeffrey Hugo { P_MMPLL0_OUT_EVEN, 1 }, 495d14b15b5SJeffrey Hugo { P_MMPLL4_OUT_EVEN, 2 }, 496d14b15b5SJeffrey Hugo { P_MMPLL7_OUT_EVEN, 3 }, 497d14b15b5SJeffrey Hugo { P_MMPLL10_OUT_EVEN, 4 }, 498d14b15b5SJeffrey Hugo { P_GPLL0, 5 }, 499d14b15b5SJeffrey Hugo { P_GPLL0_DIV, 6 }, 500d14b15b5SJeffrey Hugo { P_CORE_BI_PLL_TEST_SE, 7 } 501d14b15b5SJeffrey Hugo }; 502d14b15b5SJeffrey Hugo 503d14b15b5SJeffrey Hugo static const struct clk_parent_data mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div[] = { 504d14b15b5SJeffrey Hugo { .fw_name = "xo", .name = "xo" }, 505d14b15b5SJeffrey Hugo { .hw = &mmpll0_out_even.clkr.hw }, 506d14b15b5SJeffrey Hugo { .hw = &mmpll4_out_even.clkr.hw }, 507d14b15b5SJeffrey Hugo { .hw = &mmpll7_out_even.clkr.hw }, 508d14b15b5SJeffrey Hugo { .hw = &mmpll10_out_even.clkr.hw }, 509d14b15b5SJeffrey Hugo { .fw_name = "gpll0", .name = "gpll0" }, 510d14b15b5SJeffrey Hugo { .hw = &gpll0_div.hw }, 511d14b15b5SJeffrey Hugo { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, 512d14b15b5SJeffrey Hugo }; 513d14b15b5SJeffrey Hugo 514d14b15b5SJeffrey Hugo static struct clk_rcg2 byte0_clk_src = { 515d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2120, 516d14b15b5SJeffrey Hugo .hid_width = 5, 517d14b15b5SJeffrey Hugo .parent_map = mmss_xo_dsibyte_map, 518d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 519d14b15b5SJeffrey Hugo .name = "byte0_clk_src", 520d14b15b5SJeffrey Hugo .parent_data = mmss_xo_dsibyte, 521d14b15b5SJeffrey Hugo .num_parents = 4, 522d14b15b5SJeffrey Hugo .ops = &clk_byte2_ops, 523d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 524d14b15b5SJeffrey Hugo }, 525d14b15b5SJeffrey Hugo }; 526d14b15b5SJeffrey Hugo 527d14b15b5SJeffrey Hugo static struct clk_rcg2 byte1_clk_src = { 528d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2140, 529d14b15b5SJeffrey Hugo .hid_width = 5, 530d14b15b5SJeffrey Hugo .parent_map = mmss_xo_dsibyte_map, 531d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 532d14b15b5SJeffrey Hugo .name = "byte1_clk_src", 533d14b15b5SJeffrey Hugo .parent_data = mmss_xo_dsibyte, 534d14b15b5SJeffrey Hugo .num_parents = 4, 535d14b15b5SJeffrey Hugo .ops = &clk_byte2_ops, 536d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 537d14b15b5SJeffrey Hugo }, 538d14b15b5SJeffrey Hugo }; 539d14b15b5SJeffrey Hugo 540d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_cci_clk_src[] = { 541d14b15b5SJeffrey Hugo F(37500000, P_GPLL0, 16, 0, 0), 542d14b15b5SJeffrey Hugo F(50000000, P_GPLL0, 12, 0, 0), 543d14b15b5SJeffrey Hugo F(100000000, P_GPLL0, 6, 0, 0), 544d14b15b5SJeffrey Hugo { } 545d14b15b5SJeffrey Hugo }; 546d14b15b5SJeffrey Hugo 547d14b15b5SJeffrey Hugo static struct clk_rcg2 cci_clk_src = { 548d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3300, 549d14b15b5SJeffrey Hugo .hid_width = 5, 550d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div_map, 551d14b15b5SJeffrey Hugo .freq_tbl = ftbl_cci_clk_src, 552d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 553d14b15b5SJeffrey Hugo .name = "cci_clk_src", 554d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div, 555d14b15b5SJeffrey Hugo .num_parents = 7, 556d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 557d14b15b5SJeffrey Hugo }, 558d14b15b5SJeffrey Hugo }; 559d14b15b5SJeffrey Hugo 560d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_cpp_clk_src[] = { 561d14b15b5SJeffrey Hugo F(100000000, P_GPLL0, 6, 0, 0), 562d14b15b5SJeffrey Hugo F(200000000, P_GPLL0, 3, 0, 0), 563d14b15b5SJeffrey Hugo F(384000000, P_MMPLL4_OUT_EVEN, 2, 0, 0), 564d14b15b5SJeffrey Hugo F(404000000, P_MMPLL0_OUT_EVEN, 2, 0, 0), 565d14b15b5SJeffrey Hugo F(480000000, P_MMPLL7_OUT_EVEN, 2, 0, 0), 566d14b15b5SJeffrey Hugo F(576000000, P_MMPLL10_OUT_EVEN, 1, 0, 0), 567d14b15b5SJeffrey Hugo F(600000000, P_GPLL0, 1, 0, 0), 568d14b15b5SJeffrey Hugo { } 569d14b15b5SJeffrey Hugo }; 570d14b15b5SJeffrey Hugo 571d14b15b5SJeffrey Hugo static struct clk_rcg2 cpp_clk_src = { 572d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3640, 573d14b15b5SJeffrey Hugo .hid_width = 5, 574d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 575d14b15b5SJeffrey Hugo .freq_tbl = ftbl_cpp_clk_src, 576d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 577d14b15b5SJeffrey Hugo .name = "cpp_clk_src", 578d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 579d14b15b5SJeffrey Hugo .num_parents = 8, 580d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 581d14b15b5SJeffrey Hugo }, 582d14b15b5SJeffrey Hugo }; 583d14b15b5SJeffrey Hugo 584d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_csi_clk_src[] = { 585d14b15b5SJeffrey Hugo F(164571429, P_MMPLL10_OUT_EVEN, 3.5, 0, 0), 586d14b15b5SJeffrey Hugo F(256000000, P_MMPLL4_OUT_EVEN, 3, 0, 0), 587d14b15b5SJeffrey Hugo F(274290000, P_MMPLL7_OUT_EVEN, 3.5, 0, 0), 588d14b15b5SJeffrey Hugo F(300000000, P_GPLL0, 2, 0, 0), 589d14b15b5SJeffrey Hugo F(384000000, P_MMPLL4_OUT_EVEN, 2, 0, 0), 590d14b15b5SJeffrey Hugo F(576000000, P_MMPLL10_OUT_EVEN, 1, 0, 0), 591d14b15b5SJeffrey Hugo { } 592d14b15b5SJeffrey Hugo }; 593d14b15b5SJeffrey Hugo 594d14b15b5SJeffrey Hugo static struct clk_rcg2 csi0_clk_src = { 595d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3090, 596d14b15b5SJeffrey Hugo .hid_width = 5, 597d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 598d14b15b5SJeffrey Hugo .freq_tbl = ftbl_csi_clk_src, 599d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 600d14b15b5SJeffrey Hugo .name = "csi0_clk_src", 601d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 602d14b15b5SJeffrey Hugo .num_parents = 8, 603d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 604d14b15b5SJeffrey Hugo }, 605d14b15b5SJeffrey Hugo }; 606d14b15b5SJeffrey Hugo 607d14b15b5SJeffrey Hugo static struct clk_rcg2 csi1_clk_src = { 608d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3100, 609d14b15b5SJeffrey Hugo .hid_width = 5, 610d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 611d14b15b5SJeffrey Hugo .freq_tbl = ftbl_csi_clk_src, 612d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 613d14b15b5SJeffrey Hugo .name = "csi1_clk_src", 614d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 615d14b15b5SJeffrey Hugo .num_parents = 8, 616d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 617d14b15b5SJeffrey Hugo }, 618d14b15b5SJeffrey Hugo }; 619d14b15b5SJeffrey Hugo 620d14b15b5SJeffrey Hugo static struct clk_rcg2 csi2_clk_src = { 621d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3160, 622d14b15b5SJeffrey Hugo .hid_width = 5, 623d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 624d14b15b5SJeffrey Hugo .freq_tbl = ftbl_csi_clk_src, 625d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 626d14b15b5SJeffrey Hugo .name = "csi2_clk_src", 627d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 628d14b15b5SJeffrey Hugo .num_parents = 8, 629d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 630d14b15b5SJeffrey Hugo }, 631d14b15b5SJeffrey Hugo }; 632d14b15b5SJeffrey Hugo 633d14b15b5SJeffrey Hugo static struct clk_rcg2 csi3_clk_src = { 634d14b15b5SJeffrey Hugo .cmd_rcgr = 0x31c0, 635d14b15b5SJeffrey Hugo .hid_width = 5, 636d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 637d14b15b5SJeffrey Hugo .freq_tbl = ftbl_csi_clk_src, 638d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 639d14b15b5SJeffrey Hugo .name = "csi3_clk_src", 640d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 641d14b15b5SJeffrey Hugo .num_parents = 8, 642d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 643d14b15b5SJeffrey Hugo }, 644d14b15b5SJeffrey Hugo }; 645d14b15b5SJeffrey Hugo 646d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_csiphy_clk_src[] = { 647d14b15b5SJeffrey Hugo F(164571429, P_MMPLL10_OUT_EVEN, 3.5, 0, 0), 648d14b15b5SJeffrey Hugo F(256000000, P_MMPLL4_OUT_EVEN, 3, 0, 0), 649d14b15b5SJeffrey Hugo F(274290000, P_MMPLL7_OUT_EVEN, 3.5, 0, 0), 650d14b15b5SJeffrey Hugo F(300000000, P_GPLL0, 2, 0, 0), 651d14b15b5SJeffrey Hugo F(384000000, P_MMPLL4_OUT_EVEN, 2, 0, 0), 652d14b15b5SJeffrey Hugo { } 653d14b15b5SJeffrey Hugo }; 654d14b15b5SJeffrey Hugo 655d14b15b5SJeffrey Hugo static struct clk_rcg2 csiphy_clk_src = { 656d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3800, 657d14b15b5SJeffrey Hugo .hid_width = 5, 658d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 659d14b15b5SJeffrey Hugo .freq_tbl = ftbl_csiphy_clk_src, 660d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 661d14b15b5SJeffrey Hugo .name = "csiphy_clk_src", 662d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 663d14b15b5SJeffrey Hugo .num_parents = 8, 664d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 665d14b15b5SJeffrey Hugo }, 666d14b15b5SJeffrey Hugo }; 667d14b15b5SJeffrey Hugo 668d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_csiphytimer_clk_src[] = { 669d14b15b5SJeffrey Hugo F(200000000, P_GPLL0, 3, 0, 0), 670d14b15b5SJeffrey Hugo F(269333333, P_MMPLL0_OUT_EVEN, 3, 0, 0), 671d14b15b5SJeffrey Hugo { } 672d14b15b5SJeffrey Hugo }; 673d14b15b5SJeffrey Hugo 674d14b15b5SJeffrey Hugo static struct clk_rcg2 csi0phytimer_clk_src = { 675d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3000, 676d14b15b5SJeffrey Hugo .hid_width = 5, 677d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 678d14b15b5SJeffrey Hugo .freq_tbl = ftbl_csiphytimer_clk_src, 679d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 680d14b15b5SJeffrey Hugo .name = "csi0phytimer_clk_src", 681d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 682d14b15b5SJeffrey Hugo .num_parents = 8, 683d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 684d14b15b5SJeffrey Hugo }, 685d14b15b5SJeffrey Hugo }; 686d14b15b5SJeffrey Hugo 687d14b15b5SJeffrey Hugo static struct clk_rcg2 csi1phytimer_clk_src = { 688d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3030, 689d14b15b5SJeffrey Hugo .hid_width = 5, 690d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 691d14b15b5SJeffrey Hugo .freq_tbl = ftbl_csiphytimer_clk_src, 692d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 693d14b15b5SJeffrey Hugo .name = "csi1phytimer_clk_src", 694d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 695d14b15b5SJeffrey Hugo .num_parents = 8, 696d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 697d14b15b5SJeffrey Hugo }, 698d14b15b5SJeffrey Hugo }; 699d14b15b5SJeffrey Hugo 700d14b15b5SJeffrey Hugo static struct clk_rcg2 csi2phytimer_clk_src = { 701d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3060, 702d14b15b5SJeffrey Hugo .hid_width = 5, 703d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 704d14b15b5SJeffrey Hugo .freq_tbl = ftbl_csiphytimer_clk_src, 705d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 706d14b15b5SJeffrey Hugo .name = "csi2phytimer_clk_src", 707d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 708d14b15b5SJeffrey Hugo .num_parents = 8, 709d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 710d14b15b5SJeffrey Hugo }, 711d14b15b5SJeffrey Hugo }; 712d14b15b5SJeffrey Hugo 713d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_dp_aux_clk_src[] = { 714d14b15b5SJeffrey Hugo F(19200000, P_XO, 1, 0, 0), 715d14b15b5SJeffrey Hugo { } 716d14b15b5SJeffrey Hugo }; 717d14b15b5SJeffrey Hugo 718d14b15b5SJeffrey Hugo static struct clk_rcg2 dp_aux_clk_src = { 719d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2260, 720d14b15b5SJeffrey Hugo .hid_width = 5, 721d14b15b5SJeffrey Hugo .parent_map = mmss_xo_gpll0_gpll0_div_map, 722d14b15b5SJeffrey Hugo .freq_tbl = ftbl_dp_aux_clk_src, 723d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 724d14b15b5SJeffrey Hugo .name = "dp_aux_clk_src", 725d14b15b5SJeffrey Hugo .parent_data = mmss_xo_gpll0_gpll0_div, 726d14b15b5SJeffrey Hugo .num_parents = 4, 727d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 728d14b15b5SJeffrey Hugo }, 729d14b15b5SJeffrey Hugo }; 730d14b15b5SJeffrey Hugo 731d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_dp_crypto_clk_src[] = { 732d14b15b5SJeffrey Hugo F(101250, P_DPLINK, 1, 5, 16), 733d14b15b5SJeffrey Hugo F(168750, P_DPLINK, 1, 5, 16), 734d14b15b5SJeffrey Hugo F(337500, P_DPLINK, 1, 5, 16), 735d14b15b5SJeffrey Hugo { } 736d14b15b5SJeffrey Hugo }; 737d14b15b5SJeffrey Hugo 738d14b15b5SJeffrey Hugo static struct clk_rcg2 dp_crypto_clk_src = { 739d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2220, 740d14b15b5SJeffrey Hugo .hid_width = 5, 741d14b15b5SJeffrey Hugo .parent_map = mmss_xo_dp_map, 742d14b15b5SJeffrey Hugo .freq_tbl = ftbl_dp_crypto_clk_src, 743d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 744d14b15b5SJeffrey Hugo .name = "dp_crypto_clk_src", 745d14b15b5SJeffrey Hugo .parent_data = mmss_xo_dp, 746d14b15b5SJeffrey Hugo .num_parents = 4, 747d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 748d14b15b5SJeffrey Hugo }, 749d14b15b5SJeffrey Hugo }; 750d14b15b5SJeffrey Hugo 751d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_dp_link_clk_src[] = { 752d14b15b5SJeffrey Hugo F(162000, P_DPLINK, 2, 0, 0), 753d14b15b5SJeffrey Hugo F(270000, P_DPLINK, 2, 0, 0), 754d14b15b5SJeffrey Hugo F(540000, P_DPLINK, 2, 0, 0), 755d14b15b5SJeffrey Hugo { } 756d14b15b5SJeffrey Hugo }; 757d14b15b5SJeffrey Hugo 758d14b15b5SJeffrey Hugo static struct clk_rcg2 dp_link_clk_src = { 759d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2200, 760d14b15b5SJeffrey Hugo .hid_width = 5, 761d14b15b5SJeffrey Hugo .parent_map = mmss_xo_dp_map, 762d14b15b5SJeffrey Hugo .freq_tbl = ftbl_dp_link_clk_src, 763d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 764d14b15b5SJeffrey Hugo .name = "dp_link_clk_src", 765d14b15b5SJeffrey Hugo .parent_data = mmss_xo_dp, 766d14b15b5SJeffrey Hugo .num_parents = 4, 767d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 768d14b15b5SJeffrey Hugo }, 769d14b15b5SJeffrey Hugo }; 770d14b15b5SJeffrey Hugo 771d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_dp_pixel_clk_src[] = { 772d14b15b5SJeffrey Hugo F(154000000, P_DPVCO, 1, 0, 0), 773d14b15b5SJeffrey Hugo F(337500000, P_DPVCO, 2, 0, 0), 774d14b15b5SJeffrey Hugo F(675000000, P_DPVCO, 2, 0, 0), 775d14b15b5SJeffrey Hugo { } 776d14b15b5SJeffrey Hugo }; 777d14b15b5SJeffrey Hugo 778d14b15b5SJeffrey Hugo static struct clk_rcg2 dp_pixel_clk_src = { 779d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2240, 780d14b15b5SJeffrey Hugo .hid_width = 5, 781d14b15b5SJeffrey Hugo .parent_map = mmss_xo_dp_map, 782d14b15b5SJeffrey Hugo .freq_tbl = ftbl_dp_pixel_clk_src, 783d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 784d14b15b5SJeffrey Hugo .name = "dp_pixel_clk_src", 785d14b15b5SJeffrey Hugo .parent_data = mmss_xo_dp, 786d14b15b5SJeffrey Hugo .num_parents = 4, 787d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 788d14b15b5SJeffrey Hugo }, 789d14b15b5SJeffrey Hugo }; 790d14b15b5SJeffrey Hugo 791d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_esc_clk_src[] = { 792d14b15b5SJeffrey Hugo F(19200000, P_XO, 1, 0, 0), 793d14b15b5SJeffrey Hugo { } 794d14b15b5SJeffrey Hugo }; 795d14b15b5SJeffrey Hugo 796d14b15b5SJeffrey Hugo static struct clk_rcg2 esc0_clk_src = { 797d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2160, 798d14b15b5SJeffrey Hugo .hid_width = 5, 799d14b15b5SJeffrey Hugo .parent_map = mmss_xo_dsibyte_map, 800d14b15b5SJeffrey Hugo .freq_tbl = ftbl_esc_clk_src, 801d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 802d14b15b5SJeffrey Hugo .name = "esc0_clk_src", 803d14b15b5SJeffrey Hugo .parent_data = mmss_xo_dsibyte, 804d14b15b5SJeffrey Hugo .num_parents = 4, 805d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 806d14b15b5SJeffrey Hugo }, 807d14b15b5SJeffrey Hugo }; 808d14b15b5SJeffrey Hugo 809d14b15b5SJeffrey Hugo static struct clk_rcg2 esc1_clk_src = { 810d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2180, 811d14b15b5SJeffrey Hugo .hid_width = 5, 812d14b15b5SJeffrey Hugo .parent_map = mmss_xo_dsibyte_map, 813d14b15b5SJeffrey Hugo .freq_tbl = ftbl_esc_clk_src, 814d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 815d14b15b5SJeffrey Hugo .name = "esc1_clk_src", 816d14b15b5SJeffrey Hugo .parent_data = mmss_xo_dsibyte, 817d14b15b5SJeffrey Hugo .num_parents = 4, 818d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 819d14b15b5SJeffrey Hugo }, 820d14b15b5SJeffrey Hugo }; 821d14b15b5SJeffrey Hugo 822d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_extpclk_clk_src[] = { 823d14b15b5SJeffrey Hugo { .src = P_HDMIPLL }, 824d14b15b5SJeffrey Hugo { } 825d14b15b5SJeffrey Hugo }; 826d14b15b5SJeffrey Hugo 827d14b15b5SJeffrey Hugo static struct clk_rcg2 extpclk_clk_src = { 828d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2060, 829d14b15b5SJeffrey Hugo .hid_width = 5, 830d14b15b5SJeffrey Hugo .parent_map = mmss_xo_hdmi_map, 831d14b15b5SJeffrey Hugo .freq_tbl = ftbl_extpclk_clk_src, 832d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 833d14b15b5SJeffrey Hugo .name = "extpclk_clk_src", 834d14b15b5SJeffrey Hugo .parent_data = mmss_xo_hdmi, 835d14b15b5SJeffrey Hugo .num_parents = 3, 836d14b15b5SJeffrey Hugo .ops = &clk_byte_ops, 837d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 838d14b15b5SJeffrey Hugo }, 839d14b15b5SJeffrey Hugo }; 840d14b15b5SJeffrey Hugo 841d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_fd_core_clk_src[] = { 842d14b15b5SJeffrey Hugo F(100000000, P_GPLL0, 6, 0, 0), 843d14b15b5SJeffrey Hugo F(200000000, P_GPLL0, 3, 0, 0), 844d14b15b5SJeffrey Hugo F(404000000, P_MMPLL0_OUT_EVEN, 2, 0, 0), 845d14b15b5SJeffrey Hugo F(480000000, P_MMPLL7_OUT_EVEN, 2, 0, 0), 846d14b15b5SJeffrey Hugo F(576000000, P_MMPLL10_OUT_EVEN, 1, 0, 0), 847d14b15b5SJeffrey Hugo { } 848d14b15b5SJeffrey Hugo }; 849d14b15b5SJeffrey Hugo 850d14b15b5SJeffrey Hugo static struct clk_rcg2 fd_core_clk_src = { 851d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3b00, 852d14b15b5SJeffrey Hugo .hid_width = 5, 853d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 854d14b15b5SJeffrey Hugo .freq_tbl = ftbl_fd_core_clk_src, 855d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 856d14b15b5SJeffrey Hugo .name = "fd_core_clk_src", 857d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 858d14b15b5SJeffrey Hugo .num_parents = 8, 859d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 860d14b15b5SJeffrey Hugo }, 861d14b15b5SJeffrey Hugo }; 862d14b15b5SJeffrey Hugo 863d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_hdmi_clk_src[] = { 864d14b15b5SJeffrey Hugo F(19200000, P_XO, 1, 0, 0), 865d14b15b5SJeffrey Hugo { } 866d14b15b5SJeffrey Hugo }; 867d14b15b5SJeffrey Hugo 868d14b15b5SJeffrey Hugo static struct clk_rcg2 hdmi_clk_src = { 869d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2100, 870d14b15b5SJeffrey Hugo .hid_width = 5, 871d14b15b5SJeffrey Hugo .parent_map = mmss_xo_gpll0_gpll0_div_map, 872d14b15b5SJeffrey Hugo .freq_tbl = ftbl_hdmi_clk_src, 873d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 874d14b15b5SJeffrey Hugo .name = "hdmi_clk_src", 875d14b15b5SJeffrey Hugo .parent_data = mmss_xo_gpll0_gpll0_div, 876d14b15b5SJeffrey Hugo .num_parents = 4, 877d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 878d14b15b5SJeffrey Hugo }, 879d14b15b5SJeffrey Hugo }; 880d14b15b5SJeffrey Hugo 881d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_jpeg0_clk_src[] = { 882d14b15b5SJeffrey Hugo F(75000000, P_GPLL0, 8, 0, 0), 883d14b15b5SJeffrey Hugo F(150000000, P_GPLL0, 4, 0, 0), 884d14b15b5SJeffrey Hugo F(320000000, P_MMPLL7_OUT_EVEN, 3, 0, 0), 885d14b15b5SJeffrey Hugo F(480000000, P_MMPLL7_OUT_EVEN, 2, 0, 0), 886d14b15b5SJeffrey Hugo { } 887d14b15b5SJeffrey Hugo }; 888d14b15b5SJeffrey Hugo 889d14b15b5SJeffrey Hugo static struct clk_rcg2 jpeg0_clk_src = { 890d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3500, 891d14b15b5SJeffrey Hugo .hid_width = 5, 892d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 893d14b15b5SJeffrey Hugo .freq_tbl = ftbl_jpeg0_clk_src, 894d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 895d14b15b5SJeffrey Hugo .name = "jpeg0_clk_src", 896d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 897d14b15b5SJeffrey Hugo .num_parents = 8, 898d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 899d14b15b5SJeffrey Hugo }, 900d14b15b5SJeffrey Hugo }; 901d14b15b5SJeffrey Hugo 902d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_maxi_clk_src[] = { 903d14b15b5SJeffrey Hugo F(19200000, P_XO, 1, 0, 0), 904d14b15b5SJeffrey Hugo F(75000000, P_GPLL0_DIV, 4, 0, 0), 905d14b15b5SJeffrey Hugo F(171428571, P_GPLL0, 3.5, 0, 0), 906d14b15b5SJeffrey Hugo F(323200000, P_MMPLL0_OUT_EVEN, 2.5, 0, 0), 907d14b15b5SJeffrey Hugo F(406000000, P_MMPLL1_OUT_EVEN, 2, 0, 0), 908d14b15b5SJeffrey Hugo { } 909d14b15b5SJeffrey Hugo }; 910d14b15b5SJeffrey Hugo 911d14b15b5SJeffrey Hugo static struct clk_rcg2 maxi_clk_src = { 912d14b15b5SJeffrey Hugo .cmd_rcgr = 0xf020, 913d14b15b5SJeffrey Hugo .hid_width = 5, 914d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div_map, 915d14b15b5SJeffrey Hugo .freq_tbl = ftbl_maxi_clk_src, 916d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 917d14b15b5SJeffrey Hugo .name = "maxi_clk_src", 918d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div, 919d14b15b5SJeffrey Hugo .num_parents = 6, 920d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 921d14b15b5SJeffrey Hugo }, 922d14b15b5SJeffrey Hugo }; 923d14b15b5SJeffrey Hugo 924d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_mclk_clk_src[] = { 925d14b15b5SJeffrey Hugo F(4800000, P_XO, 4, 0, 0), 926d14b15b5SJeffrey Hugo F(6000000, P_GPLL0_DIV, 10, 1, 5), 927d14b15b5SJeffrey Hugo F(8000000, P_GPLL0_DIV, 1, 2, 75), 928d14b15b5SJeffrey Hugo F(9600000, P_XO, 2, 0, 0), 929d14b15b5SJeffrey Hugo F(16666667, P_GPLL0_DIV, 2, 1, 9), 930d14b15b5SJeffrey Hugo F(19200000, P_XO, 1, 0, 0), 931d14b15b5SJeffrey Hugo F(24000000, P_GPLL0_DIV, 1, 2, 25), 932d14b15b5SJeffrey Hugo F(33333333, P_GPLL0_DIV, 1, 2, 9), 933d14b15b5SJeffrey Hugo F(48000000, P_GPLL0, 1, 2, 25), 934d14b15b5SJeffrey Hugo F(66666667, P_GPLL0, 1, 2, 9), 935d14b15b5SJeffrey Hugo { } 936d14b15b5SJeffrey Hugo }; 937d14b15b5SJeffrey Hugo 938d14b15b5SJeffrey Hugo static struct clk_rcg2 mclk0_clk_src = { 939d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3360, 940d14b15b5SJeffrey Hugo .hid_width = 5, 941d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 942d14b15b5SJeffrey Hugo .freq_tbl = ftbl_mclk_clk_src, 943d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 944d14b15b5SJeffrey Hugo .name = "mclk0_clk_src", 945d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 946d14b15b5SJeffrey Hugo .num_parents = 7, 947d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 948d14b15b5SJeffrey Hugo }, 949d14b15b5SJeffrey Hugo }; 950d14b15b5SJeffrey Hugo 951d14b15b5SJeffrey Hugo static struct clk_rcg2 mclk1_clk_src = { 952d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3390, 953d14b15b5SJeffrey Hugo .hid_width = 5, 954d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 955d14b15b5SJeffrey Hugo .freq_tbl = ftbl_mclk_clk_src, 956d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 957d14b15b5SJeffrey Hugo .name = "mclk1_clk_src", 958d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 959d14b15b5SJeffrey Hugo .num_parents = 7, 960d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 961d14b15b5SJeffrey Hugo }, 962d14b15b5SJeffrey Hugo }; 963d14b15b5SJeffrey Hugo 964d14b15b5SJeffrey Hugo static struct clk_rcg2 mclk2_clk_src = { 965d14b15b5SJeffrey Hugo .cmd_rcgr = 0x33c0, 966d14b15b5SJeffrey Hugo .hid_width = 5, 967d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 968d14b15b5SJeffrey Hugo .freq_tbl = ftbl_mclk_clk_src, 969d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 970d14b15b5SJeffrey Hugo .name = "mclk2_clk_src", 971d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 972d14b15b5SJeffrey Hugo .num_parents = 7, 973d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 974d14b15b5SJeffrey Hugo }, 975d14b15b5SJeffrey Hugo }; 976d14b15b5SJeffrey Hugo 977d14b15b5SJeffrey Hugo static struct clk_rcg2 mclk3_clk_src = { 978d14b15b5SJeffrey Hugo .cmd_rcgr = 0x33f0, 979d14b15b5SJeffrey Hugo .hid_width = 5, 980d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 981d14b15b5SJeffrey Hugo .freq_tbl = ftbl_mclk_clk_src, 982d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 983d14b15b5SJeffrey Hugo .name = "mclk3_clk_src", 984d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 985d14b15b5SJeffrey Hugo .num_parents = 7, 986d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 987d14b15b5SJeffrey Hugo }, 988d14b15b5SJeffrey Hugo }; 989d14b15b5SJeffrey Hugo 990d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_mdp_clk_src[] = { 991d14b15b5SJeffrey Hugo F(85714286, P_GPLL0, 7, 0, 0), 992d14b15b5SJeffrey Hugo F(100000000, P_GPLL0, 6, 0, 0), 993d14b15b5SJeffrey Hugo F(150000000, P_GPLL0, 4, 0, 0), 994d14b15b5SJeffrey Hugo F(171428571, P_GPLL0, 3.5, 0, 0), 995d14b15b5SJeffrey Hugo F(200000000, P_GPLL0, 3, 0, 0), 996d14b15b5SJeffrey Hugo F(275000000, P_MMPLL5_OUT_EVEN, 3, 0, 0), 997d14b15b5SJeffrey Hugo F(300000000, P_GPLL0, 2, 0, 0), 998d14b15b5SJeffrey Hugo F(330000000, P_MMPLL5_OUT_EVEN, 2.5, 0, 0), 999d14b15b5SJeffrey Hugo F(412500000, P_MMPLL5_OUT_EVEN, 2, 0, 0), 1000d14b15b5SJeffrey Hugo { } 1001d14b15b5SJeffrey Hugo }; 1002d14b15b5SJeffrey Hugo 1003d14b15b5SJeffrey Hugo static struct clk_rcg2 mdp_clk_src = { 1004d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2040, 1005d14b15b5SJeffrey Hugo .hid_width = 5, 1006d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div_map, 1007d14b15b5SJeffrey Hugo .freq_tbl = ftbl_mdp_clk_src, 1008d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1009d14b15b5SJeffrey Hugo .name = "mdp_clk_src", 1010d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div, 1011d14b15b5SJeffrey Hugo .num_parents = 6, 1012d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1013d14b15b5SJeffrey Hugo }, 1014d14b15b5SJeffrey Hugo }; 1015d14b15b5SJeffrey Hugo 1016d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_vsync_clk_src[] = { 1017d14b15b5SJeffrey Hugo F(19200000, P_XO, 1, 0, 0), 1018d14b15b5SJeffrey Hugo { } 1019d14b15b5SJeffrey Hugo }; 1020d14b15b5SJeffrey Hugo 1021d14b15b5SJeffrey Hugo static struct clk_rcg2 vsync_clk_src = { 1022d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2080, 1023d14b15b5SJeffrey Hugo .hid_width = 5, 1024d14b15b5SJeffrey Hugo .parent_map = mmss_xo_gpll0_gpll0_div_map, 1025d14b15b5SJeffrey Hugo .freq_tbl = ftbl_vsync_clk_src, 1026d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1027d14b15b5SJeffrey Hugo .name = "vsync_clk_src", 1028d14b15b5SJeffrey Hugo .parent_data = mmss_xo_gpll0_gpll0_div, 1029d14b15b5SJeffrey Hugo .num_parents = 4, 1030d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1031d14b15b5SJeffrey Hugo }, 1032d14b15b5SJeffrey Hugo }; 1033d14b15b5SJeffrey Hugo 1034d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_ahb_clk_src[] = { 1035d14b15b5SJeffrey Hugo F(19200000, P_XO, 1, 0, 0), 1036d14b15b5SJeffrey Hugo F(40000000, P_GPLL0, 15, 0, 0), 1037d14b15b5SJeffrey Hugo F(80800000, P_MMPLL0_OUT_EVEN, 10, 0, 0), 1038d14b15b5SJeffrey Hugo { } 1039d14b15b5SJeffrey Hugo }; 1040d14b15b5SJeffrey Hugo 1041d14b15b5SJeffrey Hugo static struct clk_rcg2 ahb_clk_src = { 1042d14b15b5SJeffrey Hugo .cmd_rcgr = 0x5000, 1043d14b15b5SJeffrey Hugo .hid_width = 5, 1044d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_gpll0_gpll0_div_map, 1045d14b15b5SJeffrey Hugo .freq_tbl = ftbl_ahb_clk_src, 1046d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1047d14b15b5SJeffrey Hugo .name = "ahb_clk_src", 1048d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_gpll0_gpll0_div, 1049d14b15b5SJeffrey Hugo .num_parents = 5, 1050d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1051d14b15b5SJeffrey Hugo }, 1052d14b15b5SJeffrey Hugo }; 1053d14b15b5SJeffrey Hugo 1054d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_axi_clk_src[] = { 1055d14b15b5SJeffrey Hugo F(75000000, P_GPLL0, 8, 0, 0), 1056d14b15b5SJeffrey Hugo F(171428571, P_GPLL0, 3.5, 0, 0), 1057d14b15b5SJeffrey Hugo F(240000000, P_GPLL0, 2.5, 0, 0), 1058d14b15b5SJeffrey Hugo F(323200000, P_MMPLL0_OUT_EVEN, 2.5, 0, 0), 1059d14b15b5SJeffrey Hugo F(406000000, P_MMPLL0_OUT_EVEN, 2, 0, 0), 1060d14b15b5SJeffrey Hugo { } 1061d14b15b5SJeffrey Hugo }; 1062d14b15b5SJeffrey Hugo 1063d14b15b5SJeffrey Hugo /* RO to linux */ 1064d14b15b5SJeffrey Hugo static struct clk_rcg2 axi_clk_src = { 1065d14b15b5SJeffrey Hugo .cmd_rcgr = 0xd000, 1066d14b15b5SJeffrey Hugo .hid_width = 5, 1067d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div_map, 1068d14b15b5SJeffrey Hugo .freq_tbl = ftbl_axi_clk_src, 1069d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1070d14b15b5SJeffrey Hugo .name = "axi_clk_src", 1071d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div, 1072d14b15b5SJeffrey Hugo .num_parents = 6, 1073d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1074d14b15b5SJeffrey Hugo }, 1075d14b15b5SJeffrey Hugo }; 1076d14b15b5SJeffrey Hugo 1077d14b15b5SJeffrey Hugo static struct clk_rcg2 pclk0_clk_src = { 1078d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2000, 1079d14b15b5SJeffrey Hugo .mnd_width = 8, 1080d14b15b5SJeffrey Hugo .hid_width = 5, 1081d14b15b5SJeffrey Hugo .parent_map = mmss_xo_dsi0pll_dsi1pll_map, 1082d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1083d14b15b5SJeffrey Hugo .name = "pclk0_clk_src", 1084d14b15b5SJeffrey Hugo .parent_data = mmss_xo_dsi0pll_dsi1pll, 1085d14b15b5SJeffrey Hugo .num_parents = 4, 1086d14b15b5SJeffrey Hugo .ops = &clk_pixel_ops, 1087d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1088d14b15b5SJeffrey Hugo }, 1089d14b15b5SJeffrey Hugo }; 1090d14b15b5SJeffrey Hugo 1091d14b15b5SJeffrey Hugo static struct clk_rcg2 pclk1_clk_src = { 1092d14b15b5SJeffrey Hugo .cmd_rcgr = 0x2020, 1093d14b15b5SJeffrey Hugo .mnd_width = 8, 1094d14b15b5SJeffrey Hugo .hid_width = 5, 1095d14b15b5SJeffrey Hugo .parent_map = mmss_xo_dsi0pll_dsi1pll_map, 1096d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1097d14b15b5SJeffrey Hugo .name = "pclk1_clk_src", 1098d14b15b5SJeffrey Hugo .parent_data = mmss_xo_dsi0pll_dsi1pll, 1099d14b15b5SJeffrey Hugo .num_parents = 4, 1100d14b15b5SJeffrey Hugo .ops = &clk_pixel_ops, 1101d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1102d14b15b5SJeffrey Hugo }, 1103d14b15b5SJeffrey Hugo }; 1104d14b15b5SJeffrey Hugo 1105d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_rot_clk_src[] = { 1106d14b15b5SJeffrey Hugo F(171428571, P_GPLL0, 3.5, 0, 0), 1107d14b15b5SJeffrey Hugo F(275000000, P_MMPLL5_OUT_EVEN, 3, 0, 0), 1108d14b15b5SJeffrey Hugo F(330000000, P_MMPLL5_OUT_EVEN, 2.5, 0, 0), 1109d14b15b5SJeffrey Hugo F(412500000, P_MMPLL5_OUT_EVEN, 2, 0, 0), 1110d14b15b5SJeffrey Hugo { } 1111d14b15b5SJeffrey Hugo }; 1112d14b15b5SJeffrey Hugo 1113d14b15b5SJeffrey Hugo static struct clk_rcg2 rot_clk_src = { 1114d14b15b5SJeffrey Hugo .cmd_rcgr = 0x21a0, 1115d14b15b5SJeffrey Hugo .hid_width = 5, 1116d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div_map, 1117d14b15b5SJeffrey Hugo .freq_tbl = ftbl_rot_clk_src, 1118d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1119d14b15b5SJeffrey Hugo .name = "rot_clk_src", 1120d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div, 1121d14b15b5SJeffrey Hugo .num_parents = 6, 1122d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1123d14b15b5SJeffrey Hugo }, 1124d14b15b5SJeffrey Hugo }; 1125d14b15b5SJeffrey Hugo 1126d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_video_core_clk_src[] = { 1127d14b15b5SJeffrey Hugo F(200000000, P_GPLL0, 3, 0, 0), 1128d14b15b5SJeffrey Hugo F(269330000, P_MMPLL0_OUT_EVEN, 3, 0, 0), 1129d14b15b5SJeffrey Hugo F(355200000, P_MMPLL6_OUT_EVEN, 2.5, 0, 0), 1130d14b15b5SJeffrey Hugo F(444000000, P_MMPLL6_OUT_EVEN, 2, 0, 0), 1131d14b15b5SJeffrey Hugo F(533000000, P_MMPLL3_OUT_EVEN, 2, 0, 0), 1132d14b15b5SJeffrey Hugo { } 1133d14b15b5SJeffrey Hugo }; 1134d14b15b5SJeffrey Hugo 1135d14b15b5SJeffrey Hugo static struct clk_rcg2 video_core_clk_src = { 1136d14b15b5SJeffrey Hugo .cmd_rcgr = 0x1000, 1137d14b15b5SJeffrey Hugo .hid_width = 5, 1138d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div_map, 1139d14b15b5SJeffrey Hugo .freq_tbl = ftbl_video_core_clk_src, 1140d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1141d14b15b5SJeffrey Hugo .name = "video_core_clk_src", 1142d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div, 1143d14b15b5SJeffrey Hugo .num_parents = 7, 1144d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1145d14b15b5SJeffrey Hugo }, 1146d14b15b5SJeffrey Hugo }; 1147d14b15b5SJeffrey Hugo 1148d14b15b5SJeffrey Hugo static struct clk_rcg2 video_subcore0_clk_src = { 1149d14b15b5SJeffrey Hugo .cmd_rcgr = 0x1060, 1150d14b15b5SJeffrey Hugo .hid_width = 5, 1151d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div_map, 1152d14b15b5SJeffrey Hugo .freq_tbl = ftbl_video_core_clk_src, 1153d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1154d14b15b5SJeffrey Hugo .name = "video_subcore0_clk_src", 1155d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div, 1156d14b15b5SJeffrey Hugo .num_parents = 7, 1157d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1158d14b15b5SJeffrey Hugo }, 1159d14b15b5SJeffrey Hugo }; 1160d14b15b5SJeffrey Hugo 1161d14b15b5SJeffrey Hugo static struct clk_rcg2 video_subcore1_clk_src = { 1162d14b15b5SJeffrey Hugo .cmd_rcgr = 0x1080, 1163d14b15b5SJeffrey Hugo .hid_width = 5, 1164d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div_map, 1165d14b15b5SJeffrey Hugo .freq_tbl = ftbl_video_core_clk_src, 1166d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1167d14b15b5SJeffrey Hugo .name = "video_subcore1_clk_src", 1168d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div, 1169d14b15b5SJeffrey Hugo .num_parents = 7, 1170d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1171d14b15b5SJeffrey Hugo }, 1172d14b15b5SJeffrey Hugo }; 1173d14b15b5SJeffrey Hugo 1174d14b15b5SJeffrey Hugo static const struct freq_tbl ftbl_vfe_clk_src[] = { 1175d14b15b5SJeffrey Hugo F(200000000, P_GPLL0, 3, 0, 0), 1176d14b15b5SJeffrey Hugo F(300000000, P_GPLL0, 2, 0, 0), 1177d14b15b5SJeffrey Hugo F(320000000, P_MMPLL7_OUT_EVEN, 3, 0, 0), 1178d14b15b5SJeffrey Hugo F(384000000, P_MMPLL4_OUT_EVEN, 2, 0, 0), 1179d14b15b5SJeffrey Hugo F(404000000, P_MMPLL0_OUT_EVEN, 2, 0, 0), 1180d14b15b5SJeffrey Hugo F(480000000, P_MMPLL7_OUT_EVEN, 2, 0, 0), 1181d14b15b5SJeffrey Hugo F(576000000, P_MMPLL10_OUT_EVEN, 1, 0, 0), 1182d14b15b5SJeffrey Hugo F(600000000, P_GPLL0, 1, 0, 0), 1183d14b15b5SJeffrey Hugo { } 1184d14b15b5SJeffrey Hugo }; 1185d14b15b5SJeffrey Hugo 1186d14b15b5SJeffrey Hugo static struct clk_rcg2 vfe0_clk_src = { 1187d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3600, 1188d14b15b5SJeffrey Hugo .hid_width = 5, 1189d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 1190d14b15b5SJeffrey Hugo .freq_tbl = ftbl_vfe_clk_src, 1191d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1192d14b15b5SJeffrey Hugo .name = "vfe0_clk_src", 1193d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 1194d14b15b5SJeffrey Hugo .num_parents = 8, 1195d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1196d14b15b5SJeffrey Hugo }, 1197d14b15b5SJeffrey Hugo }; 1198d14b15b5SJeffrey Hugo 1199d14b15b5SJeffrey Hugo static struct clk_rcg2 vfe1_clk_src = { 1200d14b15b5SJeffrey Hugo .cmd_rcgr = 0x3620, 1201d14b15b5SJeffrey Hugo .hid_width = 5, 1202d14b15b5SJeffrey Hugo .parent_map = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map, 1203d14b15b5SJeffrey Hugo .freq_tbl = ftbl_vfe_clk_src, 1204d14b15b5SJeffrey Hugo .clkr.hw.init = &(struct clk_init_data){ 1205d14b15b5SJeffrey Hugo .name = "vfe1_clk_src", 1206d14b15b5SJeffrey Hugo .parent_data = mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div, 1207d14b15b5SJeffrey Hugo .num_parents = 8, 1208d14b15b5SJeffrey Hugo .ops = &clk_rcg2_ops, 1209d14b15b5SJeffrey Hugo }, 1210d14b15b5SJeffrey Hugo }; 1211d14b15b5SJeffrey Hugo 1212d14b15b5SJeffrey Hugo static struct clk_branch misc_ahb_clk = { 1213d14b15b5SJeffrey Hugo .halt_reg = 0x328, 1214*fa92f3b0SAngeloGioacchino Del Regno .hwcg_reg = 0x328, 1215*fa92f3b0SAngeloGioacchino Del Regno .hwcg_bit = 1, 1216d14b15b5SJeffrey Hugo .clkr = { 1217d14b15b5SJeffrey Hugo .enable_reg = 0x328, 1218d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1219d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1220d14b15b5SJeffrey Hugo .name = "misc_ahb_clk", 1221d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1222d14b15b5SJeffrey Hugo .num_parents = 1, 1223d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1224d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1225d14b15b5SJeffrey Hugo }, 1226d14b15b5SJeffrey Hugo }, 1227d14b15b5SJeffrey Hugo }; 1228d14b15b5SJeffrey Hugo 1229d14b15b5SJeffrey Hugo static struct clk_branch video_core_clk = { 1230d14b15b5SJeffrey Hugo .halt_reg = 0x1028, 1231d14b15b5SJeffrey Hugo .clkr = { 1232d14b15b5SJeffrey Hugo .enable_reg = 0x1028, 1233d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1234d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1235d14b15b5SJeffrey Hugo .name = "video_core_clk", 1236d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &video_core_clk_src.clkr.hw }, 1237d14b15b5SJeffrey Hugo .num_parents = 1, 1238d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1239d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1240d14b15b5SJeffrey Hugo }, 1241d14b15b5SJeffrey Hugo }, 1242d14b15b5SJeffrey Hugo }; 1243d14b15b5SJeffrey Hugo 1244d14b15b5SJeffrey Hugo static struct clk_branch video_ahb_clk = { 1245d14b15b5SJeffrey Hugo .halt_reg = 0x1030, 1246*fa92f3b0SAngeloGioacchino Del Regno .hwcg_reg = 0x1030, 1247*fa92f3b0SAngeloGioacchino Del Regno .hwcg_bit = 1, 1248d14b15b5SJeffrey Hugo .clkr = { 1249d14b15b5SJeffrey Hugo .enable_reg = 0x1030, 1250d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1251d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1252d14b15b5SJeffrey Hugo .name = "video_ahb_clk", 1253d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1254d14b15b5SJeffrey Hugo .num_parents = 1, 1255d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1256d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1257d14b15b5SJeffrey Hugo }, 1258d14b15b5SJeffrey Hugo }, 1259d14b15b5SJeffrey Hugo }; 1260d14b15b5SJeffrey Hugo 1261d14b15b5SJeffrey Hugo static struct clk_branch video_axi_clk = { 1262d14b15b5SJeffrey Hugo .halt_reg = 0x1034, 1263d14b15b5SJeffrey Hugo .clkr = { 1264d14b15b5SJeffrey Hugo .enable_reg = 0x1034, 1265d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1266d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1267d14b15b5SJeffrey Hugo .name = "video_axi_clk", 1268d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &axi_clk_src.clkr.hw }, 1269d14b15b5SJeffrey Hugo .num_parents = 1, 1270d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1271d14b15b5SJeffrey Hugo }, 1272d14b15b5SJeffrey Hugo }, 1273d14b15b5SJeffrey Hugo }; 1274d14b15b5SJeffrey Hugo 1275d14b15b5SJeffrey Hugo static struct clk_branch video_maxi_clk = { 1276d14b15b5SJeffrey Hugo .halt_reg = 0x1038, 1277d14b15b5SJeffrey Hugo .clkr = { 1278d14b15b5SJeffrey Hugo .enable_reg = 0x1038, 1279d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1280d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1281d14b15b5SJeffrey Hugo .name = "video_maxi_clk", 1282d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &maxi_clk_src.clkr.hw }, 1283d14b15b5SJeffrey Hugo .num_parents = 1, 1284d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1285d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1286d14b15b5SJeffrey Hugo }, 1287d14b15b5SJeffrey Hugo }, 1288d14b15b5SJeffrey Hugo }; 1289d14b15b5SJeffrey Hugo 1290d14b15b5SJeffrey Hugo static struct clk_branch video_subcore0_clk = { 1291d14b15b5SJeffrey Hugo .halt_reg = 0x1048, 1292d14b15b5SJeffrey Hugo .clkr = { 1293d14b15b5SJeffrey Hugo .enable_reg = 0x1048, 1294d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1295d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1296d14b15b5SJeffrey Hugo .name = "video_subcore0_clk", 1297d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &video_subcore0_clk_src.clkr.hw }, 1298d14b15b5SJeffrey Hugo .num_parents = 1, 1299d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1300d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1301d14b15b5SJeffrey Hugo }, 1302d14b15b5SJeffrey Hugo }, 1303d14b15b5SJeffrey Hugo }; 1304d14b15b5SJeffrey Hugo 1305d14b15b5SJeffrey Hugo static struct clk_branch video_subcore1_clk = { 1306d14b15b5SJeffrey Hugo .halt_reg = 0x104c, 1307d14b15b5SJeffrey Hugo .clkr = { 1308d14b15b5SJeffrey Hugo .enable_reg = 0x104c, 1309d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1310d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1311d14b15b5SJeffrey Hugo .name = "video_subcore1_clk", 1312d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &video_subcore1_clk_src.clkr.hw }, 1313d14b15b5SJeffrey Hugo .num_parents = 1, 1314d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1315d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1316d14b15b5SJeffrey Hugo }, 1317d14b15b5SJeffrey Hugo }, 1318d14b15b5SJeffrey Hugo }; 1319d14b15b5SJeffrey Hugo 1320d14b15b5SJeffrey Hugo static struct clk_branch mdss_ahb_clk = { 1321d14b15b5SJeffrey Hugo .halt_reg = 0x2308, 1322*fa92f3b0SAngeloGioacchino Del Regno .hwcg_reg = 0x2308, 1323*fa92f3b0SAngeloGioacchino Del Regno .hwcg_bit = 1, 1324d14b15b5SJeffrey Hugo .clkr = { 1325d14b15b5SJeffrey Hugo .enable_reg = 0x2308, 1326d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1327d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1328d14b15b5SJeffrey Hugo .name = "mdss_ahb_clk", 1329d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1330d14b15b5SJeffrey Hugo .num_parents = 1, 1331d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1332d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1333d14b15b5SJeffrey Hugo }, 1334d14b15b5SJeffrey Hugo }, 1335d14b15b5SJeffrey Hugo }; 1336d14b15b5SJeffrey Hugo 1337d14b15b5SJeffrey Hugo static struct clk_branch mdss_hdmi_dp_ahb_clk = { 1338d14b15b5SJeffrey Hugo .halt_reg = 0x230c, 1339d14b15b5SJeffrey Hugo .clkr = { 1340d14b15b5SJeffrey Hugo .enable_reg = 0x230c, 1341d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1342d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1343d14b15b5SJeffrey Hugo .name = "mdss_hdmi_dp_ahb_clk", 1344d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1345d14b15b5SJeffrey Hugo .num_parents = 1, 1346d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1347d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1348d14b15b5SJeffrey Hugo }, 1349d14b15b5SJeffrey Hugo }, 1350d14b15b5SJeffrey Hugo }; 1351d14b15b5SJeffrey Hugo 1352d14b15b5SJeffrey Hugo static struct clk_branch mdss_axi_clk = { 1353d14b15b5SJeffrey Hugo .halt_reg = 0x2310, 1354d14b15b5SJeffrey Hugo .clkr = { 1355d14b15b5SJeffrey Hugo .enable_reg = 0x2310, 1356d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1357d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1358d14b15b5SJeffrey Hugo .name = "mdss_axi_clk", 1359d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &axi_clk_src.clkr.hw }, 1360d14b15b5SJeffrey Hugo .num_parents = 1, 1361d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1362d14b15b5SJeffrey Hugo }, 1363d14b15b5SJeffrey Hugo }, 1364d14b15b5SJeffrey Hugo }; 1365d14b15b5SJeffrey Hugo 1366d14b15b5SJeffrey Hugo static struct clk_branch mdss_pclk0_clk = { 1367d14b15b5SJeffrey Hugo .halt_reg = 0x2314, 1368d14b15b5SJeffrey Hugo .clkr = { 1369d14b15b5SJeffrey Hugo .enable_reg = 0x2314, 1370d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1371d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1372d14b15b5SJeffrey Hugo .name = "mdss_pclk0_clk", 1373d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &pclk0_clk_src.clkr.hw }, 1374d14b15b5SJeffrey Hugo .num_parents = 1, 1375d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1376d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1377d14b15b5SJeffrey Hugo }, 1378d14b15b5SJeffrey Hugo }, 1379d14b15b5SJeffrey Hugo }; 1380d14b15b5SJeffrey Hugo 1381d14b15b5SJeffrey Hugo static struct clk_branch mdss_pclk1_clk = { 1382d14b15b5SJeffrey Hugo .halt_reg = 0x2318, 1383d14b15b5SJeffrey Hugo .clkr = { 1384d14b15b5SJeffrey Hugo .enable_reg = 0x2318, 1385d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1386d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1387d14b15b5SJeffrey Hugo .name = "mdss_pclk1_clk", 1388d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &pclk1_clk_src.clkr.hw }, 1389d14b15b5SJeffrey Hugo .num_parents = 1, 1390d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1391d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1392d14b15b5SJeffrey Hugo }, 1393d14b15b5SJeffrey Hugo }, 1394d14b15b5SJeffrey Hugo }; 1395d14b15b5SJeffrey Hugo 1396d14b15b5SJeffrey Hugo static struct clk_branch mdss_mdp_clk = { 1397d14b15b5SJeffrey Hugo .halt_reg = 0x231c, 1398d14b15b5SJeffrey Hugo .clkr = { 1399d14b15b5SJeffrey Hugo .enable_reg = 0x231c, 1400d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1401d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1402d14b15b5SJeffrey Hugo .name = "mdss_mdp_clk", 1403d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mdp_clk_src.clkr.hw }, 1404d14b15b5SJeffrey Hugo .num_parents = 1, 1405d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1406d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1407d14b15b5SJeffrey Hugo }, 1408d14b15b5SJeffrey Hugo }, 1409d14b15b5SJeffrey Hugo }; 1410d14b15b5SJeffrey Hugo 1411d14b15b5SJeffrey Hugo static struct clk_branch mdss_mdp_lut_clk = { 1412d14b15b5SJeffrey Hugo .halt_reg = 0x2320, 1413d14b15b5SJeffrey Hugo .clkr = { 1414d14b15b5SJeffrey Hugo .enable_reg = 0x2320, 1415d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1416d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1417d14b15b5SJeffrey Hugo .name = "mdss_mdp_lut_clk", 1418d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mdp_clk_src.clkr.hw }, 1419d14b15b5SJeffrey Hugo .num_parents = 1, 1420d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1421d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1422d14b15b5SJeffrey Hugo }, 1423d14b15b5SJeffrey Hugo }, 1424d14b15b5SJeffrey Hugo }; 1425d14b15b5SJeffrey Hugo 1426d14b15b5SJeffrey Hugo static struct clk_branch mdss_extpclk_clk = { 1427d14b15b5SJeffrey Hugo .halt_reg = 0x2324, 1428d14b15b5SJeffrey Hugo .clkr = { 1429d14b15b5SJeffrey Hugo .enable_reg = 0x2324, 1430d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1431d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1432d14b15b5SJeffrey Hugo .name = "mdss_extpclk_clk", 1433d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &extpclk_clk_src.clkr.hw }, 1434d14b15b5SJeffrey Hugo .num_parents = 1, 1435d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1436d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1437d14b15b5SJeffrey Hugo }, 1438d14b15b5SJeffrey Hugo }, 1439d14b15b5SJeffrey Hugo }; 1440d14b15b5SJeffrey Hugo 1441d14b15b5SJeffrey Hugo static struct clk_branch mdss_vsync_clk = { 1442d14b15b5SJeffrey Hugo .halt_reg = 0x2328, 1443d14b15b5SJeffrey Hugo .clkr = { 1444d14b15b5SJeffrey Hugo .enable_reg = 0x2328, 1445d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1446d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1447d14b15b5SJeffrey Hugo .name = "mdss_vsync_clk", 1448d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &vsync_clk_src.clkr.hw }, 1449d14b15b5SJeffrey Hugo .num_parents = 1, 1450d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1451d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1452d14b15b5SJeffrey Hugo }, 1453d14b15b5SJeffrey Hugo }, 1454d14b15b5SJeffrey Hugo }; 1455d14b15b5SJeffrey Hugo 1456d14b15b5SJeffrey Hugo static struct clk_branch mdss_hdmi_clk = { 1457d14b15b5SJeffrey Hugo .halt_reg = 0x2338, 1458d14b15b5SJeffrey Hugo .clkr = { 1459d14b15b5SJeffrey Hugo .enable_reg = 0x2338, 1460d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1461d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1462d14b15b5SJeffrey Hugo .name = "mdss_hdmi_clk", 1463d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &hdmi_clk_src.clkr.hw }, 1464d14b15b5SJeffrey Hugo .num_parents = 1, 1465d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1466d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1467d14b15b5SJeffrey Hugo }, 1468d14b15b5SJeffrey Hugo }, 1469d14b15b5SJeffrey Hugo }; 1470d14b15b5SJeffrey Hugo 1471d14b15b5SJeffrey Hugo static struct clk_branch mdss_byte0_clk = { 1472d14b15b5SJeffrey Hugo .halt_reg = 0x233c, 1473d14b15b5SJeffrey Hugo .clkr = { 1474d14b15b5SJeffrey Hugo .enable_reg = 0x233c, 1475d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1476d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1477d14b15b5SJeffrey Hugo .name = "mdss_byte0_clk", 1478d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &byte0_clk_src.clkr.hw }, 1479d14b15b5SJeffrey Hugo .num_parents = 1, 1480d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1481d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1482d14b15b5SJeffrey Hugo }, 1483d14b15b5SJeffrey Hugo }, 1484d14b15b5SJeffrey Hugo }; 1485d14b15b5SJeffrey Hugo 1486d14b15b5SJeffrey Hugo static struct clk_branch mdss_byte1_clk = { 1487d14b15b5SJeffrey Hugo .halt_reg = 0x2340, 1488d14b15b5SJeffrey Hugo .clkr = { 1489d14b15b5SJeffrey Hugo .enable_reg = 0x2340, 1490d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1491d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1492d14b15b5SJeffrey Hugo .name = "mdss_byte1_clk", 1493d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &byte1_clk_src.clkr.hw }, 1494d14b15b5SJeffrey Hugo .num_parents = 1, 1495d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1496d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1497d14b15b5SJeffrey Hugo }, 1498d14b15b5SJeffrey Hugo }, 1499d14b15b5SJeffrey Hugo }; 1500d14b15b5SJeffrey Hugo 1501d14b15b5SJeffrey Hugo static struct clk_branch mdss_esc0_clk = { 1502d14b15b5SJeffrey Hugo .halt_reg = 0x2344, 1503d14b15b5SJeffrey Hugo .clkr = { 1504d14b15b5SJeffrey Hugo .enable_reg = 0x2344, 1505d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1506d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1507d14b15b5SJeffrey Hugo .name = "mdss_esc0_clk", 1508d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &esc0_clk_src.clkr.hw }, 1509d14b15b5SJeffrey Hugo .num_parents = 1, 1510d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1511d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1512d14b15b5SJeffrey Hugo }, 1513d14b15b5SJeffrey Hugo }, 1514d14b15b5SJeffrey Hugo }; 1515d14b15b5SJeffrey Hugo 1516d14b15b5SJeffrey Hugo static struct clk_branch mdss_esc1_clk = { 1517d14b15b5SJeffrey Hugo .halt_reg = 0x2348, 1518d14b15b5SJeffrey Hugo .clkr = { 1519d14b15b5SJeffrey Hugo .enable_reg = 0x2348, 1520d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1521d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1522d14b15b5SJeffrey Hugo .name = "mdss_esc1_clk", 1523d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &esc1_clk_src.clkr.hw }, 1524d14b15b5SJeffrey Hugo .num_parents = 1, 1525d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1526d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1527d14b15b5SJeffrey Hugo }, 1528d14b15b5SJeffrey Hugo }, 1529d14b15b5SJeffrey Hugo }; 1530d14b15b5SJeffrey Hugo 1531d14b15b5SJeffrey Hugo static struct clk_branch mdss_rot_clk = { 1532d14b15b5SJeffrey Hugo .halt_reg = 0x2350, 1533d14b15b5SJeffrey Hugo .clkr = { 1534d14b15b5SJeffrey Hugo .enable_reg = 0x2350, 1535d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1536d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1537d14b15b5SJeffrey Hugo .name = "mdss_rot_clk", 1538d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &rot_clk_src.clkr.hw }, 1539d14b15b5SJeffrey Hugo .num_parents = 1, 1540d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1541d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1542d14b15b5SJeffrey Hugo }, 1543d14b15b5SJeffrey Hugo }, 1544d14b15b5SJeffrey Hugo }; 1545d14b15b5SJeffrey Hugo 1546d14b15b5SJeffrey Hugo static struct clk_branch mdss_dp_link_clk = { 1547d14b15b5SJeffrey Hugo .halt_reg = 0x2354, 1548d14b15b5SJeffrey Hugo .clkr = { 1549d14b15b5SJeffrey Hugo .enable_reg = 0x2354, 1550d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1551d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1552d14b15b5SJeffrey Hugo .name = "mdss_dp_link_clk", 1553d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &dp_link_clk_src.clkr.hw }, 1554d14b15b5SJeffrey Hugo .num_parents = 1, 1555d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1556d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1557d14b15b5SJeffrey Hugo }, 1558d14b15b5SJeffrey Hugo }, 1559d14b15b5SJeffrey Hugo }; 1560d14b15b5SJeffrey Hugo 1561d14b15b5SJeffrey Hugo static struct clk_branch mdss_dp_link_intf_clk = { 1562d14b15b5SJeffrey Hugo .halt_reg = 0x2358, 1563d14b15b5SJeffrey Hugo .clkr = { 1564d14b15b5SJeffrey Hugo .enable_reg = 0x2358, 1565d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1566d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1567d14b15b5SJeffrey Hugo .name = "mdss_dp_link_intf_clk", 1568d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &dp_link_clk_src.clkr.hw }, 1569d14b15b5SJeffrey Hugo .num_parents = 1, 1570d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1571d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1572d14b15b5SJeffrey Hugo }, 1573d14b15b5SJeffrey Hugo }, 1574d14b15b5SJeffrey Hugo }; 1575d14b15b5SJeffrey Hugo 1576d14b15b5SJeffrey Hugo static struct clk_branch mdss_dp_crypto_clk = { 1577d14b15b5SJeffrey Hugo .halt_reg = 0x235c, 1578d14b15b5SJeffrey Hugo .clkr = { 1579d14b15b5SJeffrey Hugo .enable_reg = 0x235c, 1580d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1581d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1582d14b15b5SJeffrey Hugo .name = "mdss_dp_crypto_clk", 1583d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &dp_crypto_clk_src.clkr.hw }, 1584d14b15b5SJeffrey Hugo .num_parents = 1, 1585d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1586d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1587d14b15b5SJeffrey Hugo }, 1588d14b15b5SJeffrey Hugo }, 1589d14b15b5SJeffrey Hugo }; 1590d14b15b5SJeffrey Hugo 1591d14b15b5SJeffrey Hugo static struct clk_branch mdss_dp_pixel_clk = { 1592d14b15b5SJeffrey Hugo .halt_reg = 0x2360, 1593d14b15b5SJeffrey Hugo .clkr = { 1594d14b15b5SJeffrey Hugo .enable_reg = 0x2360, 1595d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1596d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1597d14b15b5SJeffrey Hugo .name = "mdss_dp_pixel_clk", 1598d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &dp_pixel_clk_src.clkr.hw }, 1599d14b15b5SJeffrey Hugo .num_parents = 1, 1600d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1601d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1602d14b15b5SJeffrey Hugo }, 1603d14b15b5SJeffrey Hugo }, 1604d14b15b5SJeffrey Hugo }; 1605d14b15b5SJeffrey Hugo 1606d14b15b5SJeffrey Hugo static struct clk_branch mdss_dp_aux_clk = { 1607d14b15b5SJeffrey Hugo .halt_reg = 0x2364, 1608d14b15b5SJeffrey Hugo .clkr = { 1609d14b15b5SJeffrey Hugo .enable_reg = 0x2364, 1610d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1611d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1612d14b15b5SJeffrey Hugo .name = "mdss_dp_aux_clk", 1613d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &dp_aux_clk_src.clkr.hw }, 1614d14b15b5SJeffrey Hugo .num_parents = 1, 1615d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1616d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1617d14b15b5SJeffrey Hugo }, 1618d14b15b5SJeffrey Hugo }, 1619d14b15b5SJeffrey Hugo }; 1620d14b15b5SJeffrey Hugo 1621d14b15b5SJeffrey Hugo static struct clk_branch mdss_byte0_intf_clk = { 1622d14b15b5SJeffrey Hugo .halt_reg = 0x2374, 1623d14b15b5SJeffrey Hugo .clkr = { 1624d14b15b5SJeffrey Hugo .enable_reg = 0x2374, 1625d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1626d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1627d14b15b5SJeffrey Hugo .name = "mdss_byte0_intf_clk", 1628d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &byte0_clk_src.clkr.hw }, 1629d14b15b5SJeffrey Hugo .num_parents = 1, 1630d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1631d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1632d14b15b5SJeffrey Hugo }, 1633d14b15b5SJeffrey Hugo }, 1634d14b15b5SJeffrey Hugo }; 1635d14b15b5SJeffrey Hugo 1636d14b15b5SJeffrey Hugo static struct clk_branch mdss_byte1_intf_clk = { 1637d14b15b5SJeffrey Hugo .halt_reg = 0x2378, 1638d14b15b5SJeffrey Hugo .clkr = { 1639d14b15b5SJeffrey Hugo .enable_reg = 0x2378, 1640d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1641d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1642d14b15b5SJeffrey Hugo .name = "mdss_byte1_intf_clk", 1643d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &byte1_clk_src.clkr.hw }, 1644d14b15b5SJeffrey Hugo .num_parents = 1, 1645d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1646d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1647d14b15b5SJeffrey Hugo }, 1648d14b15b5SJeffrey Hugo }, 1649d14b15b5SJeffrey Hugo }; 1650d14b15b5SJeffrey Hugo 1651d14b15b5SJeffrey Hugo static struct clk_branch camss_csi0phytimer_clk = { 1652d14b15b5SJeffrey Hugo .halt_reg = 0x3024, 1653d14b15b5SJeffrey Hugo .clkr = { 1654d14b15b5SJeffrey Hugo .enable_reg = 0x3024, 1655d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1656d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1657d14b15b5SJeffrey Hugo .name = "camss_csi0phytimer_clk", 1658d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi0phytimer_clk_src.clkr.hw }, 1659d14b15b5SJeffrey Hugo .num_parents = 1, 1660d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1661d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1662d14b15b5SJeffrey Hugo }, 1663d14b15b5SJeffrey Hugo }, 1664d14b15b5SJeffrey Hugo }; 1665d14b15b5SJeffrey Hugo 1666d14b15b5SJeffrey Hugo static struct clk_branch camss_csi1phytimer_clk = { 1667d14b15b5SJeffrey Hugo .halt_reg = 0x3054, 1668d14b15b5SJeffrey Hugo .clkr = { 1669d14b15b5SJeffrey Hugo .enable_reg = 0x3054, 1670d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1671d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1672d14b15b5SJeffrey Hugo .name = "camss_csi1phytimer_clk", 1673d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi1phytimer_clk_src.clkr.hw }, 1674d14b15b5SJeffrey Hugo .num_parents = 1, 1675d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1676d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1677d14b15b5SJeffrey Hugo }, 1678d14b15b5SJeffrey Hugo }, 1679d14b15b5SJeffrey Hugo }; 1680d14b15b5SJeffrey Hugo 1681d14b15b5SJeffrey Hugo static struct clk_branch camss_csi2phytimer_clk = { 1682d14b15b5SJeffrey Hugo .halt_reg = 0x3084, 1683d14b15b5SJeffrey Hugo .clkr = { 1684d14b15b5SJeffrey Hugo .enable_reg = 0x3084, 1685d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1686d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1687d14b15b5SJeffrey Hugo .name = "camss_csi2phytimer_clk", 1688d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi2phytimer_clk_src.clkr.hw }, 1689d14b15b5SJeffrey Hugo .num_parents = 1, 1690d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1691d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1692d14b15b5SJeffrey Hugo }, 1693d14b15b5SJeffrey Hugo }, 1694d14b15b5SJeffrey Hugo }; 1695d14b15b5SJeffrey Hugo 1696d14b15b5SJeffrey Hugo static struct clk_branch camss_csi0_clk = { 1697d14b15b5SJeffrey Hugo .halt_reg = 0x30b4, 1698d14b15b5SJeffrey Hugo .clkr = { 1699d14b15b5SJeffrey Hugo .enable_reg = 0x30b4, 1700d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1701d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1702d14b15b5SJeffrey Hugo .name = "camss_csi0_clk", 1703d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi0_clk_src.clkr.hw }, 1704d14b15b5SJeffrey Hugo .num_parents = 1, 1705d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1706d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1707d14b15b5SJeffrey Hugo }, 1708d14b15b5SJeffrey Hugo }, 1709d14b15b5SJeffrey Hugo }; 1710d14b15b5SJeffrey Hugo 1711d14b15b5SJeffrey Hugo static struct clk_branch camss_csi0_ahb_clk = { 1712d14b15b5SJeffrey Hugo .halt_reg = 0x30bc, 1713d14b15b5SJeffrey Hugo .clkr = { 1714d14b15b5SJeffrey Hugo .enable_reg = 0x30bc, 1715d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1716d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1717d14b15b5SJeffrey Hugo .name = "camss_csi0_ahb_clk", 1718d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1719d14b15b5SJeffrey Hugo .num_parents = 1, 1720d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1721d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1722d14b15b5SJeffrey Hugo }, 1723d14b15b5SJeffrey Hugo }, 1724d14b15b5SJeffrey Hugo }; 1725d14b15b5SJeffrey Hugo 1726d14b15b5SJeffrey Hugo static struct clk_branch camss_csi0rdi_clk = { 1727d14b15b5SJeffrey Hugo .halt_reg = 0x30d4, 1728d14b15b5SJeffrey Hugo .clkr = { 1729d14b15b5SJeffrey Hugo .enable_reg = 0x30d4, 1730d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1731d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1732d14b15b5SJeffrey Hugo .name = "camss_csi0rdi_clk", 1733d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi0_clk_src.clkr.hw }, 1734d14b15b5SJeffrey Hugo .num_parents = 1, 1735d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1736d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1737d14b15b5SJeffrey Hugo }, 1738d14b15b5SJeffrey Hugo }, 1739d14b15b5SJeffrey Hugo }; 1740d14b15b5SJeffrey Hugo 1741d14b15b5SJeffrey Hugo static struct clk_branch camss_csi0pix_clk = { 1742d14b15b5SJeffrey Hugo .halt_reg = 0x30e4, 1743d14b15b5SJeffrey Hugo .clkr = { 1744d14b15b5SJeffrey Hugo .enable_reg = 0x30e4, 1745d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1746d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1747d14b15b5SJeffrey Hugo .name = "camss_csi0pix_clk", 1748d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi0_clk_src.clkr.hw }, 1749d14b15b5SJeffrey Hugo .num_parents = 1, 1750d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1751d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1752d14b15b5SJeffrey Hugo }, 1753d14b15b5SJeffrey Hugo }, 1754d14b15b5SJeffrey Hugo }; 1755d14b15b5SJeffrey Hugo 1756d14b15b5SJeffrey Hugo static struct clk_branch camss_csi1_clk = { 1757d14b15b5SJeffrey Hugo .halt_reg = 0x3124, 1758d14b15b5SJeffrey Hugo .clkr = { 1759d14b15b5SJeffrey Hugo .enable_reg = 0x3124, 1760d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1761d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1762d14b15b5SJeffrey Hugo .name = "camss_csi1_clk", 1763d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi1_clk_src.clkr.hw }, 1764d14b15b5SJeffrey Hugo .num_parents = 1, 1765d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1766d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1767d14b15b5SJeffrey Hugo }, 1768d14b15b5SJeffrey Hugo }, 1769d14b15b5SJeffrey Hugo }; 1770d14b15b5SJeffrey Hugo 1771d14b15b5SJeffrey Hugo static struct clk_branch camss_csi1_ahb_clk = { 1772d14b15b5SJeffrey Hugo .halt_reg = 0x3128, 1773d14b15b5SJeffrey Hugo .clkr = { 1774d14b15b5SJeffrey Hugo .enable_reg = 0x3128, 1775d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1776d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1777d14b15b5SJeffrey Hugo .name = "camss_csi1_ahb_clk", 1778d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1779d14b15b5SJeffrey Hugo .num_parents = 1, 1780d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1781d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1782d14b15b5SJeffrey Hugo }, 1783d14b15b5SJeffrey Hugo }, 1784d14b15b5SJeffrey Hugo }; 1785d14b15b5SJeffrey Hugo 1786d14b15b5SJeffrey Hugo static struct clk_branch camss_csi1rdi_clk = { 1787d14b15b5SJeffrey Hugo .halt_reg = 0x3144, 1788d14b15b5SJeffrey Hugo .clkr = { 1789d14b15b5SJeffrey Hugo .enable_reg = 0x3144, 1790d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1791d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1792d14b15b5SJeffrey Hugo .name = "camss_csi1rdi_clk", 1793d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi1_clk_src.clkr.hw }, 1794d14b15b5SJeffrey Hugo .num_parents = 1, 1795d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1796d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1797d14b15b5SJeffrey Hugo }, 1798d14b15b5SJeffrey Hugo }, 1799d14b15b5SJeffrey Hugo }; 1800d14b15b5SJeffrey Hugo 1801d14b15b5SJeffrey Hugo static struct clk_branch camss_csi1pix_clk = { 1802d14b15b5SJeffrey Hugo .halt_reg = 0x3154, 1803d14b15b5SJeffrey Hugo .clkr = { 1804d14b15b5SJeffrey Hugo .enable_reg = 0x3154, 1805d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1806d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1807d14b15b5SJeffrey Hugo .name = "camss_csi1pix_clk", 1808d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi1_clk_src.clkr.hw }, 1809d14b15b5SJeffrey Hugo .num_parents = 1, 1810d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1811d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1812d14b15b5SJeffrey Hugo }, 1813d14b15b5SJeffrey Hugo }, 1814d14b15b5SJeffrey Hugo }; 1815d14b15b5SJeffrey Hugo 1816d14b15b5SJeffrey Hugo static struct clk_branch camss_csi2_clk = { 1817d14b15b5SJeffrey Hugo .halt_reg = 0x3184, 1818d14b15b5SJeffrey Hugo .clkr = { 1819d14b15b5SJeffrey Hugo .enable_reg = 0x3184, 1820d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1821d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1822d14b15b5SJeffrey Hugo .name = "camss_csi2_clk", 1823d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi2_clk_src.clkr.hw }, 1824d14b15b5SJeffrey Hugo .num_parents = 1, 1825d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1826d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1827d14b15b5SJeffrey Hugo }, 1828d14b15b5SJeffrey Hugo }, 1829d14b15b5SJeffrey Hugo }; 1830d14b15b5SJeffrey Hugo 1831d14b15b5SJeffrey Hugo static struct clk_branch camss_csi2_ahb_clk = { 1832d14b15b5SJeffrey Hugo .halt_reg = 0x3188, 1833d14b15b5SJeffrey Hugo .clkr = { 1834d14b15b5SJeffrey Hugo .enable_reg = 0x3188, 1835d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1836d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1837d14b15b5SJeffrey Hugo .name = "camss_csi2_ahb_clk", 1838d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1839d14b15b5SJeffrey Hugo .num_parents = 1, 1840d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1841d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1842d14b15b5SJeffrey Hugo }, 1843d14b15b5SJeffrey Hugo }, 1844d14b15b5SJeffrey Hugo }; 1845d14b15b5SJeffrey Hugo 1846d14b15b5SJeffrey Hugo static struct clk_branch camss_csi2rdi_clk = { 1847d14b15b5SJeffrey Hugo .halt_reg = 0x31a4, 1848d14b15b5SJeffrey Hugo .clkr = { 1849d14b15b5SJeffrey Hugo .enable_reg = 0x31a4, 1850d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1851d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1852d14b15b5SJeffrey Hugo .name = "camss_csi2rdi_clk", 1853d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi2_clk_src.clkr.hw }, 1854d14b15b5SJeffrey Hugo .num_parents = 1, 1855d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1856d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1857d14b15b5SJeffrey Hugo }, 1858d14b15b5SJeffrey Hugo }, 1859d14b15b5SJeffrey Hugo }; 1860d14b15b5SJeffrey Hugo 1861d14b15b5SJeffrey Hugo static struct clk_branch camss_csi2pix_clk = { 1862d14b15b5SJeffrey Hugo .halt_reg = 0x31b4, 1863d14b15b5SJeffrey Hugo .clkr = { 1864d14b15b5SJeffrey Hugo .enable_reg = 0x31b4, 1865d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1866d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1867d14b15b5SJeffrey Hugo .name = "camss_csi2pix_clk", 1868d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi2_clk_src.clkr.hw }, 1869d14b15b5SJeffrey Hugo .num_parents = 1, 1870d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1871d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1872d14b15b5SJeffrey Hugo }, 1873d14b15b5SJeffrey Hugo }, 1874d14b15b5SJeffrey Hugo }; 1875d14b15b5SJeffrey Hugo 1876d14b15b5SJeffrey Hugo static struct clk_branch camss_csi3_clk = { 1877d14b15b5SJeffrey Hugo .halt_reg = 0x31e4, 1878d14b15b5SJeffrey Hugo .clkr = { 1879d14b15b5SJeffrey Hugo .enable_reg = 0x31e4, 1880d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1881d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1882d14b15b5SJeffrey Hugo .name = "camss_csi3_clk", 1883d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi3_clk_src.clkr.hw }, 1884d14b15b5SJeffrey Hugo .num_parents = 1, 1885d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1886d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1887d14b15b5SJeffrey Hugo }, 1888d14b15b5SJeffrey Hugo }, 1889d14b15b5SJeffrey Hugo }; 1890d14b15b5SJeffrey Hugo 1891d14b15b5SJeffrey Hugo static struct clk_branch camss_csi3_ahb_clk = { 1892d14b15b5SJeffrey Hugo .halt_reg = 0x31e8, 1893d14b15b5SJeffrey Hugo .clkr = { 1894d14b15b5SJeffrey Hugo .enable_reg = 0x31e8, 1895d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1896d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1897d14b15b5SJeffrey Hugo .name = "camss_csi3_ahb_clk", 1898d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1899d14b15b5SJeffrey Hugo .num_parents = 1, 1900d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1901d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1902d14b15b5SJeffrey Hugo }, 1903d14b15b5SJeffrey Hugo }, 1904d14b15b5SJeffrey Hugo }; 1905d14b15b5SJeffrey Hugo 1906d14b15b5SJeffrey Hugo static struct clk_branch camss_csi3rdi_clk = { 1907d14b15b5SJeffrey Hugo .halt_reg = 0x3204, 1908d14b15b5SJeffrey Hugo .clkr = { 1909d14b15b5SJeffrey Hugo .enable_reg = 0x3204, 1910d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1911d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1912d14b15b5SJeffrey Hugo .name = "camss_csi3rdi_clk", 1913d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi3_clk_src.clkr.hw }, 1914d14b15b5SJeffrey Hugo .num_parents = 1, 1915d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1916d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1917d14b15b5SJeffrey Hugo }, 1918d14b15b5SJeffrey Hugo }, 1919d14b15b5SJeffrey Hugo }; 1920d14b15b5SJeffrey Hugo 1921d14b15b5SJeffrey Hugo static struct clk_branch camss_csi3pix_clk = { 1922d14b15b5SJeffrey Hugo .halt_reg = 0x3214, 1923d14b15b5SJeffrey Hugo .clkr = { 1924d14b15b5SJeffrey Hugo .enable_reg = 0x3214, 1925d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1926d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1927d14b15b5SJeffrey Hugo .name = "camss_csi3pix_clk", 1928d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csi3_clk_src.clkr.hw }, 1929d14b15b5SJeffrey Hugo .num_parents = 1, 1930d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1931d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1932d14b15b5SJeffrey Hugo }, 1933d14b15b5SJeffrey Hugo }, 1934d14b15b5SJeffrey Hugo }; 1935d14b15b5SJeffrey Hugo 1936d14b15b5SJeffrey Hugo static struct clk_branch camss_ispif_ahb_clk = { 1937d14b15b5SJeffrey Hugo .halt_reg = 0x3224, 1938d14b15b5SJeffrey Hugo .clkr = { 1939d14b15b5SJeffrey Hugo .enable_reg = 0x3224, 1940d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1941d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1942d14b15b5SJeffrey Hugo .name = "camss_ispif_ahb_clk", 1943d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1944d14b15b5SJeffrey Hugo .num_parents = 1, 1945d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1946d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1947d14b15b5SJeffrey Hugo }, 1948d14b15b5SJeffrey Hugo }, 1949d14b15b5SJeffrey Hugo }; 1950d14b15b5SJeffrey Hugo 1951d14b15b5SJeffrey Hugo static struct clk_branch camss_cci_clk = { 1952d14b15b5SJeffrey Hugo .halt_reg = 0x3344, 1953d14b15b5SJeffrey Hugo .clkr = { 1954d14b15b5SJeffrey Hugo .enable_reg = 0x3344, 1955d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1956d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1957d14b15b5SJeffrey Hugo .name = "camss_cci_clk", 1958d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &cci_clk_src.clkr.hw }, 1959d14b15b5SJeffrey Hugo .num_parents = 1, 1960d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1961d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1962d14b15b5SJeffrey Hugo }, 1963d14b15b5SJeffrey Hugo }, 1964d14b15b5SJeffrey Hugo }; 1965d14b15b5SJeffrey Hugo 1966d14b15b5SJeffrey Hugo static struct clk_branch camss_cci_ahb_clk = { 1967d14b15b5SJeffrey Hugo .halt_reg = 0x3348, 1968d14b15b5SJeffrey Hugo .clkr = { 1969d14b15b5SJeffrey Hugo .enable_reg = 0x3348, 1970d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1971d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1972d14b15b5SJeffrey Hugo .name = "camss_cci_ahb_clk", 1973d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 1974d14b15b5SJeffrey Hugo .num_parents = 1, 1975d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1976d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1977d14b15b5SJeffrey Hugo }, 1978d14b15b5SJeffrey Hugo }, 1979d14b15b5SJeffrey Hugo }; 1980d14b15b5SJeffrey Hugo 1981d14b15b5SJeffrey Hugo static struct clk_branch camss_mclk0_clk = { 1982d14b15b5SJeffrey Hugo .halt_reg = 0x3384, 1983d14b15b5SJeffrey Hugo .clkr = { 1984d14b15b5SJeffrey Hugo .enable_reg = 0x3384, 1985d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 1986d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 1987d14b15b5SJeffrey Hugo .name = "camss_mclk0_clk", 1988d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mclk0_clk_src.clkr.hw }, 1989d14b15b5SJeffrey Hugo .num_parents = 1, 1990d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 1991d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 1992d14b15b5SJeffrey Hugo }, 1993d14b15b5SJeffrey Hugo }, 1994d14b15b5SJeffrey Hugo }; 1995d14b15b5SJeffrey Hugo 1996d14b15b5SJeffrey Hugo static struct clk_branch camss_mclk1_clk = { 1997d14b15b5SJeffrey Hugo .halt_reg = 0x33b4, 1998d14b15b5SJeffrey Hugo .clkr = { 1999d14b15b5SJeffrey Hugo .enable_reg = 0x33b4, 2000d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2001d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2002d14b15b5SJeffrey Hugo .name = "camss_mclk1_clk", 2003d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mclk1_clk_src.clkr.hw }, 2004d14b15b5SJeffrey Hugo .num_parents = 1, 2005d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2006d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2007d14b15b5SJeffrey Hugo }, 2008d14b15b5SJeffrey Hugo }, 2009d14b15b5SJeffrey Hugo }; 2010d14b15b5SJeffrey Hugo 2011d14b15b5SJeffrey Hugo static struct clk_branch camss_mclk2_clk = { 2012d14b15b5SJeffrey Hugo .halt_reg = 0x33e4, 2013d14b15b5SJeffrey Hugo .clkr = { 2014d14b15b5SJeffrey Hugo .enable_reg = 0x33e4, 2015d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2016d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2017d14b15b5SJeffrey Hugo .name = "camss_mclk2_clk", 2018d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mclk2_clk_src.clkr.hw }, 2019d14b15b5SJeffrey Hugo .num_parents = 1, 2020d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2021d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2022d14b15b5SJeffrey Hugo }, 2023d14b15b5SJeffrey Hugo }, 2024d14b15b5SJeffrey Hugo }; 2025d14b15b5SJeffrey Hugo 2026d14b15b5SJeffrey Hugo static struct clk_branch camss_mclk3_clk = { 2027d14b15b5SJeffrey Hugo .halt_reg = 0x3414, 2028d14b15b5SJeffrey Hugo .clkr = { 2029d14b15b5SJeffrey Hugo .enable_reg = 0x3414, 2030d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2031d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2032d14b15b5SJeffrey Hugo .name = "camss_mclk3_clk", 2033d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &mclk3_clk_src.clkr.hw }, 2034d14b15b5SJeffrey Hugo .num_parents = 1, 2035d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2036d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2037d14b15b5SJeffrey Hugo }, 2038d14b15b5SJeffrey Hugo }, 2039d14b15b5SJeffrey Hugo }; 2040d14b15b5SJeffrey Hugo 2041d14b15b5SJeffrey Hugo static struct clk_branch camss_top_ahb_clk = { 2042d14b15b5SJeffrey Hugo .halt_reg = 0x3484, 2043d14b15b5SJeffrey Hugo .clkr = { 2044d14b15b5SJeffrey Hugo .enable_reg = 0x3484, 2045d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2046d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2047d14b15b5SJeffrey Hugo .name = "camss_top_ahb_clk", 2048d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2049d14b15b5SJeffrey Hugo .num_parents = 1, 2050d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2051d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2052d14b15b5SJeffrey Hugo }, 2053d14b15b5SJeffrey Hugo }, 2054d14b15b5SJeffrey Hugo }; 2055d14b15b5SJeffrey Hugo 2056d14b15b5SJeffrey Hugo static struct clk_branch camss_ahb_clk = { 2057d14b15b5SJeffrey Hugo .halt_reg = 0x348c, 2058d14b15b5SJeffrey Hugo .clkr = { 2059d14b15b5SJeffrey Hugo .enable_reg = 0x348c, 2060d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2061d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2062d14b15b5SJeffrey Hugo .name = "camss_ahb_clk", 2063d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2064d14b15b5SJeffrey Hugo .num_parents = 1, 2065d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2066d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2067d14b15b5SJeffrey Hugo }, 2068d14b15b5SJeffrey Hugo }, 2069d14b15b5SJeffrey Hugo }; 2070d14b15b5SJeffrey Hugo 2071d14b15b5SJeffrey Hugo static struct clk_branch camss_micro_ahb_clk = { 2072d14b15b5SJeffrey Hugo .halt_reg = 0x3494, 2073d14b15b5SJeffrey Hugo .clkr = { 2074d14b15b5SJeffrey Hugo .enable_reg = 0x3494, 2075d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2076d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2077d14b15b5SJeffrey Hugo .name = "camss_micro_ahb_clk", 2078d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2079d14b15b5SJeffrey Hugo .num_parents = 1, 2080d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2081d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2082d14b15b5SJeffrey Hugo }, 2083d14b15b5SJeffrey Hugo }, 2084d14b15b5SJeffrey Hugo }; 2085d14b15b5SJeffrey Hugo 2086d14b15b5SJeffrey Hugo static struct clk_branch camss_jpeg0_clk = { 2087d14b15b5SJeffrey Hugo .halt_reg = 0x35a8, 2088d14b15b5SJeffrey Hugo .clkr = { 2089d14b15b5SJeffrey Hugo .enable_reg = 0x35a8, 2090d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2091d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2092d14b15b5SJeffrey Hugo .name = "camss_jpeg0_clk", 2093d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &jpeg0_clk_src.clkr.hw }, 2094d14b15b5SJeffrey Hugo .num_parents = 1, 2095d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2096d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2097d14b15b5SJeffrey Hugo }, 2098d14b15b5SJeffrey Hugo }, 2099d14b15b5SJeffrey Hugo }; 2100d14b15b5SJeffrey Hugo 2101d14b15b5SJeffrey Hugo static struct clk_branch camss_jpeg_ahb_clk = { 2102d14b15b5SJeffrey Hugo .halt_reg = 0x35b4, 2103d14b15b5SJeffrey Hugo .clkr = { 2104d14b15b5SJeffrey Hugo .enable_reg = 0x35b4, 2105d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2106d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2107d14b15b5SJeffrey Hugo .name = "camss_jpeg_ahb_clk", 2108d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2109d14b15b5SJeffrey Hugo .num_parents = 1, 2110d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2111d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2112d14b15b5SJeffrey Hugo }, 2113d14b15b5SJeffrey Hugo }, 2114d14b15b5SJeffrey Hugo }; 2115d14b15b5SJeffrey Hugo 2116d14b15b5SJeffrey Hugo static struct clk_branch camss_jpeg_axi_clk = { 2117d14b15b5SJeffrey Hugo .halt_reg = 0x35b8, 2118d14b15b5SJeffrey Hugo .clkr = { 2119d14b15b5SJeffrey Hugo .enable_reg = 0x35b8, 2120d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2121d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2122d14b15b5SJeffrey Hugo .name = "camss_jpeg_axi_clk", 2123d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &axi_clk_src.clkr.hw }, 2124d14b15b5SJeffrey Hugo .num_parents = 1, 2125d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2126d14b15b5SJeffrey Hugo }, 2127d14b15b5SJeffrey Hugo }, 2128d14b15b5SJeffrey Hugo }; 2129d14b15b5SJeffrey Hugo 2130d14b15b5SJeffrey Hugo static struct clk_branch camss_vfe0_ahb_clk = { 2131d14b15b5SJeffrey Hugo .halt_reg = 0x3668, 2132d14b15b5SJeffrey Hugo .clkr = { 2133d14b15b5SJeffrey Hugo .enable_reg = 0x3668, 2134d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2135d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2136d14b15b5SJeffrey Hugo .name = "camss_vfe0_ahb_clk", 2137d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2138d14b15b5SJeffrey Hugo .num_parents = 1, 2139d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2140d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2141d14b15b5SJeffrey Hugo }, 2142d14b15b5SJeffrey Hugo }, 2143d14b15b5SJeffrey Hugo }; 2144d14b15b5SJeffrey Hugo 2145d14b15b5SJeffrey Hugo static struct clk_branch camss_vfe1_ahb_clk = { 2146d14b15b5SJeffrey Hugo .halt_reg = 0x3678, 2147d14b15b5SJeffrey Hugo .clkr = { 2148d14b15b5SJeffrey Hugo .enable_reg = 0x3678, 2149d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2150d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2151d14b15b5SJeffrey Hugo .name = "camss_vfe1_ahb_clk", 2152d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2153d14b15b5SJeffrey Hugo .num_parents = 1, 2154d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2155d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2156d14b15b5SJeffrey Hugo }, 2157d14b15b5SJeffrey Hugo }, 2158d14b15b5SJeffrey Hugo }; 2159d14b15b5SJeffrey Hugo 2160d14b15b5SJeffrey Hugo static struct clk_branch camss_vfe0_clk = { 2161d14b15b5SJeffrey Hugo .halt_reg = 0x36a8, 2162d14b15b5SJeffrey Hugo .clkr = { 2163d14b15b5SJeffrey Hugo .enable_reg = 0x36a8, 2164d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2165d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2166d14b15b5SJeffrey Hugo .name = "camss_vfe0_clk", 2167d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &vfe0_clk_src.clkr.hw }, 2168d14b15b5SJeffrey Hugo .num_parents = 1, 2169d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2170d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2171d14b15b5SJeffrey Hugo }, 2172d14b15b5SJeffrey Hugo }, 2173d14b15b5SJeffrey Hugo }; 2174d14b15b5SJeffrey Hugo 2175d14b15b5SJeffrey Hugo static struct clk_branch camss_vfe1_clk = { 2176d14b15b5SJeffrey Hugo .halt_reg = 0x36ac, 2177d14b15b5SJeffrey Hugo .clkr = { 2178d14b15b5SJeffrey Hugo .enable_reg = 0x36ac, 2179d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2180d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2181d14b15b5SJeffrey Hugo .name = "camss_vfe1_clk", 2182d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &vfe1_clk_src.clkr.hw }, 2183d14b15b5SJeffrey Hugo .num_parents = 1, 2184d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2185d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2186d14b15b5SJeffrey Hugo }, 2187d14b15b5SJeffrey Hugo }, 2188d14b15b5SJeffrey Hugo }; 2189d14b15b5SJeffrey Hugo 2190d14b15b5SJeffrey Hugo static struct clk_branch camss_cpp_clk = { 2191d14b15b5SJeffrey Hugo .halt_reg = 0x36b0, 2192d14b15b5SJeffrey Hugo .clkr = { 2193d14b15b5SJeffrey Hugo .enable_reg = 0x36b0, 2194d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2195d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2196d14b15b5SJeffrey Hugo .name = "camss_cpp_clk", 2197d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &cpp_clk_src.clkr.hw }, 2198d14b15b5SJeffrey Hugo .num_parents = 1, 2199d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2200d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2201d14b15b5SJeffrey Hugo }, 2202d14b15b5SJeffrey Hugo }, 2203d14b15b5SJeffrey Hugo }; 2204d14b15b5SJeffrey Hugo 2205d14b15b5SJeffrey Hugo static struct clk_branch camss_cpp_ahb_clk = { 2206d14b15b5SJeffrey Hugo .halt_reg = 0x36b4, 2207d14b15b5SJeffrey Hugo .clkr = { 2208d14b15b5SJeffrey Hugo .enable_reg = 0x36b4, 2209d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2210d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2211d14b15b5SJeffrey Hugo .name = "camss_cpp_ahb_clk", 2212d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2213d14b15b5SJeffrey Hugo .num_parents = 1, 2214d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2215d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2216d14b15b5SJeffrey Hugo }, 2217d14b15b5SJeffrey Hugo }, 2218d14b15b5SJeffrey Hugo }; 2219d14b15b5SJeffrey Hugo 2220d14b15b5SJeffrey Hugo static struct clk_branch camss_vfe_vbif_ahb_clk = { 2221d14b15b5SJeffrey Hugo .halt_reg = 0x36b8, 2222d14b15b5SJeffrey Hugo .clkr = { 2223d14b15b5SJeffrey Hugo .enable_reg = 0x36b8, 2224d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2225d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2226d14b15b5SJeffrey Hugo .name = "camss_vfe_vbif_ahb_clk", 2227d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2228d14b15b5SJeffrey Hugo .num_parents = 1, 2229d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2230d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2231d14b15b5SJeffrey Hugo }, 2232d14b15b5SJeffrey Hugo }, 2233d14b15b5SJeffrey Hugo }; 2234d14b15b5SJeffrey Hugo 2235d14b15b5SJeffrey Hugo static struct clk_branch camss_vfe_vbif_axi_clk = { 2236d14b15b5SJeffrey Hugo .halt_reg = 0x36bc, 2237d14b15b5SJeffrey Hugo .clkr = { 2238d14b15b5SJeffrey Hugo .enable_reg = 0x36bc, 2239d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2240d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2241d14b15b5SJeffrey Hugo .name = "camss_vfe_vbif_axi_clk", 2242d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &axi_clk_src.clkr.hw }, 2243d14b15b5SJeffrey Hugo .num_parents = 1, 2244d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2245d14b15b5SJeffrey Hugo }, 2246d14b15b5SJeffrey Hugo }, 2247d14b15b5SJeffrey Hugo }; 2248d14b15b5SJeffrey Hugo 2249d14b15b5SJeffrey Hugo static struct clk_branch camss_cpp_axi_clk = { 2250d14b15b5SJeffrey Hugo .halt_reg = 0x36c4, 2251d14b15b5SJeffrey Hugo .clkr = { 2252d14b15b5SJeffrey Hugo .enable_reg = 0x36c4, 2253d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2254d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2255d14b15b5SJeffrey Hugo .name = "camss_cpp_axi_clk", 2256d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &axi_clk_src.clkr.hw }, 2257d14b15b5SJeffrey Hugo .num_parents = 1, 2258d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2259d14b15b5SJeffrey Hugo }, 2260d14b15b5SJeffrey Hugo }, 2261d14b15b5SJeffrey Hugo }; 2262d14b15b5SJeffrey Hugo 2263d14b15b5SJeffrey Hugo static struct clk_branch camss_cpp_vbif_ahb_clk = { 2264d14b15b5SJeffrey Hugo .halt_reg = 0x36c8, 2265d14b15b5SJeffrey Hugo .clkr = { 2266d14b15b5SJeffrey Hugo .enable_reg = 0x36c8, 2267d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2268d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2269d14b15b5SJeffrey Hugo .name = "camss_cpp_vbif_ahb_clk", 2270d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2271d14b15b5SJeffrey Hugo .num_parents = 1, 2272d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2273d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2274d14b15b5SJeffrey Hugo }, 2275d14b15b5SJeffrey Hugo }, 2276d14b15b5SJeffrey Hugo }; 2277d14b15b5SJeffrey Hugo 2278d14b15b5SJeffrey Hugo static struct clk_branch camss_csi_vfe0_clk = { 2279d14b15b5SJeffrey Hugo .halt_reg = 0x3704, 2280d14b15b5SJeffrey Hugo .clkr = { 2281d14b15b5SJeffrey Hugo .enable_reg = 0x3704, 2282d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2283d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2284d14b15b5SJeffrey Hugo .name = "camss_csi_vfe0_clk", 2285d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &vfe0_clk_src.clkr.hw }, 2286d14b15b5SJeffrey Hugo .num_parents = 1, 2287d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2288d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2289d14b15b5SJeffrey Hugo }, 2290d14b15b5SJeffrey Hugo }, 2291d14b15b5SJeffrey Hugo }; 2292d14b15b5SJeffrey Hugo 2293d14b15b5SJeffrey Hugo static struct clk_branch camss_csi_vfe1_clk = { 2294d14b15b5SJeffrey Hugo .halt_reg = 0x3714, 2295d14b15b5SJeffrey Hugo .clkr = { 2296d14b15b5SJeffrey Hugo .enable_reg = 0x3714, 2297d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2298d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2299d14b15b5SJeffrey Hugo .name = "camss_csi_vfe1_clk", 2300d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &vfe1_clk_src.clkr.hw }, 2301d14b15b5SJeffrey Hugo .num_parents = 1, 2302d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2303d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2304d14b15b5SJeffrey Hugo }, 2305d14b15b5SJeffrey Hugo }, 2306d14b15b5SJeffrey Hugo }; 2307d14b15b5SJeffrey Hugo 2308d14b15b5SJeffrey Hugo static struct clk_branch camss_vfe0_stream_clk = { 2309d14b15b5SJeffrey Hugo .halt_reg = 0x3720, 2310d14b15b5SJeffrey Hugo .clkr = { 2311d14b15b5SJeffrey Hugo .enable_reg = 0x3720, 2312d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2313d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2314d14b15b5SJeffrey Hugo .name = "camss_vfe0_stream_clk", 2315d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &vfe0_clk_src.clkr.hw }, 2316d14b15b5SJeffrey Hugo .num_parents = 1, 2317d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2318d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2319d14b15b5SJeffrey Hugo }, 2320d14b15b5SJeffrey Hugo }, 2321d14b15b5SJeffrey Hugo }; 2322d14b15b5SJeffrey Hugo 2323d14b15b5SJeffrey Hugo static struct clk_branch camss_vfe1_stream_clk = { 2324d14b15b5SJeffrey Hugo .halt_reg = 0x3724, 2325d14b15b5SJeffrey Hugo .clkr = { 2326d14b15b5SJeffrey Hugo .enable_reg = 0x3724, 2327d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2328d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2329d14b15b5SJeffrey Hugo .name = "camss_vfe1_stream_clk", 2330d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &vfe1_clk_src.clkr.hw }, 2331d14b15b5SJeffrey Hugo .num_parents = 1, 2332d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2333d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2334d14b15b5SJeffrey Hugo }, 2335d14b15b5SJeffrey Hugo }, 2336d14b15b5SJeffrey Hugo }; 2337d14b15b5SJeffrey Hugo 2338d14b15b5SJeffrey Hugo static struct clk_branch camss_cphy_csid0_clk = { 2339d14b15b5SJeffrey Hugo .halt_reg = 0x3730, 2340d14b15b5SJeffrey Hugo .clkr = { 2341d14b15b5SJeffrey Hugo .enable_reg = 0x3730, 2342d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2343d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2344d14b15b5SJeffrey Hugo .name = "camss_cphy_csid0_clk", 2345d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csiphy_clk_src.clkr.hw }, 2346d14b15b5SJeffrey Hugo .num_parents = 1, 2347d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2348d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2349d14b15b5SJeffrey Hugo }, 2350d14b15b5SJeffrey Hugo }, 2351d14b15b5SJeffrey Hugo }; 2352d14b15b5SJeffrey Hugo 2353d14b15b5SJeffrey Hugo static struct clk_branch camss_cphy_csid1_clk = { 2354d14b15b5SJeffrey Hugo .halt_reg = 0x3734, 2355d14b15b5SJeffrey Hugo .clkr = { 2356d14b15b5SJeffrey Hugo .enable_reg = 0x3734, 2357d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2358d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2359d14b15b5SJeffrey Hugo .name = "camss_cphy_csid1_clk", 2360d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csiphy_clk_src.clkr.hw }, 2361d14b15b5SJeffrey Hugo .num_parents = 1, 2362d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2363d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2364d14b15b5SJeffrey Hugo }, 2365d14b15b5SJeffrey Hugo }, 2366d14b15b5SJeffrey Hugo }; 2367d14b15b5SJeffrey Hugo 2368d14b15b5SJeffrey Hugo static struct clk_branch camss_cphy_csid2_clk = { 2369d14b15b5SJeffrey Hugo .halt_reg = 0x3738, 2370d14b15b5SJeffrey Hugo .clkr = { 2371d14b15b5SJeffrey Hugo .enable_reg = 0x3738, 2372d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2373d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2374d14b15b5SJeffrey Hugo .name = "camss_cphy_csid2_clk", 2375d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csiphy_clk_src.clkr.hw }, 2376d14b15b5SJeffrey Hugo .num_parents = 1, 2377d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2378d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2379d14b15b5SJeffrey Hugo }, 2380d14b15b5SJeffrey Hugo }, 2381d14b15b5SJeffrey Hugo }; 2382d14b15b5SJeffrey Hugo 2383d14b15b5SJeffrey Hugo static struct clk_branch camss_cphy_csid3_clk = { 2384d14b15b5SJeffrey Hugo .halt_reg = 0x373c, 2385d14b15b5SJeffrey Hugo .clkr = { 2386d14b15b5SJeffrey Hugo .enable_reg = 0x373c, 2387d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2388d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2389d14b15b5SJeffrey Hugo .name = "camss_cphy_csid3_clk", 2390d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csiphy_clk_src.clkr.hw }, 2391d14b15b5SJeffrey Hugo .num_parents = 1, 2392d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2393d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2394d14b15b5SJeffrey Hugo }, 2395d14b15b5SJeffrey Hugo }, 2396d14b15b5SJeffrey Hugo }; 2397d14b15b5SJeffrey Hugo 2398d14b15b5SJeffrey Hugo static struct clk_branch camss_csiphy0_clk = { 2399d14b15b5SJeffrey Hugo .halt_reg = 0x3740, 2400d14b15b5SJeffrey Hugo .clkr = { 2401d14b15b5SJeffrey Hugo .enable_reg = 0x3740, 2402d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2403d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2404d14b15b5SJeffrey Hugo .name = "camss_csiphy0_clk", 2405d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csiphy_clk_src.clkr.hw }, 2406d14b15b5SJeffrey Hugo .num_parents = 1, 2407d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2408d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2409d14b15b5SJeffrey Hugo }, 2410d14b15b5SJeffrey Hugo }, 2411d14b15b5SJeffrey Hugo }; 2412d14b15b5SJeffrey Hugo 2413d14b15b5SJeffrey Hugo static struct clk_branch camss_csiphy1_clk = { 2414d14b15b5SJeffrey Hugo .halt_reg = 0x3744, 2415d14b15b5SJeffrey Hugo .clkr = { 2416d14b15b5SJeffrey Hugo .enable_reg = 0x3744, 2417d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2418d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2419d14b15b5SJeffrey Hugo .name = "camss_csiphy1_clk", 2420d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csiphy_clk_src.clkr.hw }, 2421d14b15b5SJeffrey Hugo .num_parents = 1, 2422d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2423d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2424d14b15b5SJeffrey Hugo }, 2425d14b15b5SJeffrey Hugo }, 2426d14b15b5SJeffrey Hugo }; 2427d14b15b5SJeffrey Hugo 2428d14b15b5SJeffrey Hugo static struct clk_branch camss_csiphy2_clk = { 2429d14b15b5SJeffrey Hugo .halt_reg = 0x3748, 2430d14b15b5SJeffrey Hugo .clkr = { 2431d14b15b5SJeffrey Hugo .enable_reg = 0x3748, 2432d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2433d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2434d14b15b5SJeffrey Hugo .name = "camss_csiphy2_clk", 2435d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &csiphy_clk_src.clkr.hw }, 2436d14b15b5SJeffrey Hugo .num_parents = 1, 2437d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2438d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2439d14b15b5SJeffrey Hugo }, 2440d14b15b5SJeffrey Hugo }, 2441d14b15b5SJeffrey Hugo }; 2442d14b15b5SJeffrey Hugo 2443d14b15b5SJeffrey Hugo static struct clk_branch fd_core_clk = { 2444d14b15b5SJeffrey Hugo .halt_reg = 0x3b68, 2445d14b15b5SJeffrey Hugo .clkr = { 2446d14b15b5SJeffrey Hugo .enable_reg = 0x3b68, 2447d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2448d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2449d14b15b5SJeffrey Hugo .name = "fd_core_clk", 2450d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &fd_core_clk_src.clkr.hw }, 2451d14b15b5SJeffrey Hugo .num_parents = 1, 2452d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2453d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2454d14b15b5SJeffrey Hugo }, 2455d14b15b5SJeffrey Hugo }, 2456d14b15b5SJeffrey Hugo }; 2457d14b15b5SJeffrey Hugo 2458d14b15b5SJeffrey Hugo static struct clk_branch fd_core_uar_clk = { 2459d14b15b5SJeffrey Hugo .halt_reg = 0x3b6c, 2460d14b15b5SJeffrey Hugo .clkr = { 2461d14b15b5SJeffrey Hugo .enable_reg = 0x3b6c, 2462d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2463d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2464d14b15b5SJeffrey Hugo .name = "fd_core_uar_clk", 2465d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &fd_core_clk_src.clkr.hw }, 2466d14b15b5SJeffrey Hugo .num_parents = 1, 2467d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2468d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2469d14b15b5SJeffrey Hugo }, 2470d14b15b5SJeffrey Hugo }, 2471d14b15b5SJeffrey Hugo }; 2472d14b15b5SJeffrey Hugo 2473d14b15b5SJeffrey Hugo static struct clk_branch fd_ahb_clk = { 2474d14b15b5SJeffrey Hugo .halt_reg = 0x3b74, 2475d14b15b5SJeffrey Hugo .clkr = { 2476d14b15b5SJeffrey Hugo .enable_reg = 0x3b74, 2477d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2478d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2479d14b15b5SJeffrey Hugo .name = "fd_ahb_clk", 2480d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2481d14b15b5SJeffrey Hugo .num_parents = 1, 2482d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2483d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2484d14b15b5SJeffrey Hugo }, 2485d14b15b5SJeffrey Hugo }, 2486d14b15b5SJeffrey Hugo }; 2487d14b15b5SJeffrey Hugo 2488d14b15b5SJeffrey Hugo static struct clk_branch mnoc_ahb_clk = { 2489d14b15b5SJeffrey Hugo .halt_reg = 0x5024, 2490d14b15b5SJeffrey Hugo .clkr = { 2491d14b15b5SJeffrey Hugo .enable_reg = 0x5024, 2492d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2493d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2494d14b15b5SJeffrey Hugo .name = "mnoc_ahb_clk", 2495d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2496d14b15b5SJeffrey Hugo .num_parents = 1, 2497d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2498d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2499d14b15b5SJeffrey Hugo }, 2500d14b15b5SJeffrey Hugo }, 2501d14b15b5SJeffrey Hugo }; 2502d14b15b5SJeffrey Hugo 2503d14b15b5SJeffrey Hugo static struct clk_branch bimc_smmu_ahb_clk = { 2504d14b15b5SJeffrey Hugo .halt_reg = 0xe004, 2505*fa92f3b0SAngeloGioacchino Del Regno .hwcg_reg = 0xe004, 2506*fa92f3b0SAngeloGioacchino Del Regno .hwcg_bit = 1, 2507d14b15b5SJeffrey Hugo .clkr = { 2508d14b15b5SJeffrey Hugo .enable_reg = 0xe004, 2509d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2510d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2511d14b15b5SJeffrey Hugo .name = "bimc_smmu_ahb_clk", 2512d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2513d14b15b5SJeffrey Hugo .num_parents = 1, 2514d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2515d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2516d14b15b5SJeffrey Hugo }, 2517d14b15b5SJeffrey Hugo }, 2518d14b15b5SJeffrey Hugo }; 2519d14b15b5SJeffrey Hugo 2520d14b15b5SJeffrey Hugo static struct clk_branch bimc_smmu_axi_clk = { 2521d14b15b5SJeffrey Hugo .halt_reg = 0xe008, 2522*fa92f3b0SAngeloGioacchino Del Regno .hwcg_reg = 0xe008, 2523*fa92f3b0SAngeloGioacchino Del Regno .hwcg_bit = 1, 2524d14b15b5SJeffrey Hugo .clkr = { 2525d14b15b5SJeffrey Hugo .enable_reg = 0xe008, 2526d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2527d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2528d14b15b5SJeffrey Hugo .name = "bimc_smmu_axi_clk", 2529d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &axi_clk_src.clkr.hw }, 2530d14b15b5SJeffrey Hugo .num_parents = 1, 2531d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2532d14b15b5SJeffrey Hugo }, 2533d14b15b5SJeffrey Hugo }, 2534d14b15b5SJeffrey Hugo }; 2535d14b15b5SJeffrey Hugo 2536d14b15b5SJeffrey Hugo static struct clk_branch mnoc_maxi_clk = { 2537d14b15b5SJeffrey Hugo .halt_reg = 0xf004, 2538d14b15b5SJeffrey Hugo .clkr = { 2539d14b15b5SJeffrey Hugo .enable_reg = 0xf004, 2540d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2541d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2542d14b15b5SJeffrey Hugo .name = "mnoc_maxi_clk", 2543d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &maxi_clk_src.clkr.hw }, 2544d14b15b5SJeffrey Hugo .num_parents = 1, 2545d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2546d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2547d14b15b5SJeffrey Hugo }, 2548d14b15b5SJeffrey Hugo }, 2549d14b15b5SJeffrey Hugo }; 2550d14b15b5SJeffrey Hugo 2551d14b15b5SJeffrey Hugo static struct clk_branch vmem_maxi_clk = { 2552d14b15b5SJeffrey Hugo .halt_reg = 0xf064, 2553d14b15b5SJeffrey Hugo .clkr = { 2554d14b15b5SJeffrey Hugo .enable_reg = 0xf064, 2555d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2556d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2557d14b15b5SJeffrey Hugo .name = "vmem_maxi_clk", 2558d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &maxi_clk_src.clkr.hw }, 2559d14b15b5SJeffrey Hugo .num_parents = 1, 2560d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2561d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2562d14b15b5SJeffrey Hugo }, 2563d14b15b5SJeffrey Hugo }, 2564d14b15b5SJeffrey Hugo }; 2565d14b15b5SJeffrey Hugo 2566d14b15b5SJeffrey Hugo static struct clk_branch vmem_ahb_clk = { 2567d14b15b5SJeffrey Hugo .halt_reg = 0xf068, 2568d14b15b5SJeffrey Hugo .clkr = { 2569d14b15b5SJeffrey Hugo .enable_reg = 0xf068, 2570d14b15b5SJeffrey Hugo .enable_mask = BIT(0), 2571d14b15b5SJeffrey Hugo .hw.init = &(struct clk_init_data){ 2572d14b15b5SJeffrey Hugo .name = "vmem_ahb_clk", 2573d14b15b5SJeffrey Hugo .parent_hws = (const struct clk_hw *[]){ &ahb_clk_src.clkr.hw }, 2574d14b15b5SJeffrey Hugo .num_parents = 1, 2575d14b15b5SJeffrey Hugo .ops = &clk_branch2_ops, 2576d14b15b5SJeffrey Hugo .flags = CLK_SET_RATE_PARENT, 2577d14b15b5SJeffrey Hugo }, 2578d14b15b5SJeffrey Hugo }, 2579d14b15b5SJeffrey Hugo }; 2580d14b15b5SJeffrey Hugo 2581d14b15b5SJeffrey Hugo static struct clk_hw *mmcc_msm8998_hws[] = { 2582d14b15b5SJeffrey Hugo &gpll0_div.hw, 2583d14b15b5SJeffrey Hugo }; 2584d14b15b5SJeffrey Hugo 2585d14b15b5SJeffrey Hugo static struct gdsc video_top_gdsc = { 2586d14b15b5SJeffrey Hugo .gdscr = 0x1024, 2587d14b15b5SJeffrey Hugo .pd = { 2588d14b15b5SJeffrey Hugo .name = "video_top", 2589d14b15b5SJeffrey Hugo }, 2590d14b15b5SJeffrey Hugo .pwrsts = PWRSTS_OFF_ON, 2591d14b15b5SJeffrey Hugo }; 2592d14b15b5SJeffrey Hugo 2593d14b15b5SJeffrey Hugo static struct gdsc video_subcore0_gdsc = { 2594d14b15b5SJeffrey Hugo .gdscr = 0x1040, 2595d14b15b5SJeffrey Hugo .pd = { 2596d14b15b5SJeffrey Hugo .name = "video_subcore0", 2597d14b15b5SJeffrey Hugo }, 2598d14b15b5SJeffrey Hugo .parent = &video_top_gdsc.pd, 2599d14b15b5SJeffrey Hugo .pwrsts = PWRSTS_OFF_ON, 2600d14b15b5SJeffrey Hugo }; 2601d14b15b5SJeffrey Hugo 2602d14b15b5SJeffrey Hugo static struct gdsc video_subcore1_gdsc = { 2603d14b15b5SJeffrey Hugo .gdscr = 0x1044, 2604d14b15b5SJeffrey Hugo .pd = { 2605d14b15b5SJeffrey Hugo .name = "video_subcore1", 2606d14b15b5SJeffrey Hugo }, 2607d14b15b5SJeffrey Hugo .parent = &video_top_gdsc.pd, 2608d14b15b5SJeffrey Hugo .pwrsts = PWRSTS_OFF_ON, 2609d14b15b5SJeffrey Hugo }; 2610d14b15b5SJeffrey Hugo 2611d14b15b5SJeffrey Hugo static struct gdsc mdss_gdsc = { 2612d14b15b5SJeffrey Hugo .gdscr = 0x2304, 2613d14b15b5SJeffrey Hugo .cxcs = (unsigned int []){ 0x2310, 0x2350, 0x231c, 0x2320 }, 2614d14b15b5SJeffrey Hugo .cxc_count = 4, 2615d14b15b5SJeffrey Hugo .pd = { 2616d14b15b5SJeffrey Hugo .name = "mdss", 2617d14b15b5SJeffrey Hugo }, 2618d14b15b5SJeffrey Hugo .pwrsts = PWRSTS_OFF_ON, 2619d14b15b5SJeffrey Hugo }; 2620d14b15b5SJeffrey Hugo 2621d14b15b5SJeffrey Hugo static struct gdsc camss_top_gdsc = { 2622d14b15b5SJeffrey Hugo .gdscr = 0x34a0, 2623d14b15b5SJeffrey Hugo .cxcs = (unsigned int []){ 0x35b8, 0x36c4, 0x3704, 0x3714, 0x3494, 2624d14b15b5SJeffrey Hugo 0x35a8, 0x3868 }, 2625d14b15b5SJeffrey Hugo .cxc_count = 7, 2626d14b15b5SJeffrey Hugo .pd = { 2627d14b15b5SJeffrey Hugo .name = "camss_top", 2628d14b15b5SJeffrey Hugo }, 2629d14b15b5SJeffrey Hugo .pwrsts = PWRSTS_OFF_ON, 2630d14b15b5SJeffrey Hugo }; 2631d14b15b5SJeffrey Hugo 2632d14b15b5SJeffrey Hugo static struct gdsc camss_vfe0_gdsc = { 2633d14b15b5SJeffrey Hugo .gdscr = 0x3664, 2634d14b15b5SJeffrey Hugo .pd = { 2635d14b15b5SJeffrey Hugo .name = "camss_vfe0", 2636d14b15b5SJeffrey Hugo }, 2637d14b15b5SJeffrey Hugo .parent = &camss_top_gdsc.pd, 2638d14b15b5SJeffrey Hugo .pwrsts = PWRSTS_OFF_ON, 2639d14b15b5SJeffrey Hugo }; 2640d14b15b5SJeffrey Hugo 2641d14b15b5SJeffrey Hugo static struct gdsc camss_vfe1_gdsc = { 2642d14b15b5SJeffrey Hugo .gdscr = 0x3674, 2643d14b15b5SJeffrey Hugo .pd = { 2644d14b15b5SJeffrey Hugo .name = "camss_vfe1_gdsc", 2645d14b15b5SJeffrey Hugo }, 2646d14b15b5SJeffrey Hugo .parent = &camss_top_gdsc.pd, 2647d14b15b5SJeffrey Hugo .pwrsts = PWRSTS_OFF_ON, 2648d14b15b5SJeffrey Hugo }; 2649d14b15b5SJeffrey Hugo 2650d14b15b5SJeffrey Hugo static struct gdsc camss_cpp_gdsc = { 2651d14b15b5SJeffrey Hugo .gdscr = 0x36d4, 2652d14b15b5SJeffrey Hugo .pd = { 2653d14b15b5SJeffrey Hugo .name = "camss_cpp", 2654d14b15b5SJeffrey Hugo }, 2655d14b15b5SJeffrey Hugo .parent = &camss_top_gdsc.pd, 2656d14b15b5SJeffrey Hugo .pwrsts = PWRSTS_OFF_ON, 2657d14b15b5SJeffrey Hugo }; 2658d14b15b5SJeffrey Hugo 2659d14b15b5SJeffrey Hugo static struct gdsc bimc_smmu_gdsc = { 2660d14b15b5SJeffrey Hugo .gdscr = 0xe020, 2661d14b15b5SJeffrey Hugo .gds_hw_ctrl = 0xe024, 2662d14b15b5SJeffrey Hugo .pd = { 2663d14b15b5SJeffrey Hugo .name = "bimc_smmu", 2664d14b15b5SJeffrey Hugo }, 2665d14b15b5SJeffrey Hugo .pwrsts = PWRSTS_OFF_ON, 2666d14b15b5SJeffrey Hugo .flags = HW_CTRL, 2667d14b15b5SJeffrey Hugo }; 2668d14b15b5SJeffrey Hugo 2669d14b15b5SJeffrey Hugo static struct clk_regmap *mmcc_msm8998_clocks[] = { 2670d14b15b5SJeffrey Hugo [MMPLL0] = &mmpll0.clkr, 2671d14b15b5SJeffrey Hugo [MMPLL0_OUT_EVEN] = &mmpll0_out_even.clkr, 2672d14b15b5SJeffrey Hugo [MMPLL1] = &mmpll1.clkr, 2673d14b15b5SJeffrey Hugo [MMPLL1_OUT_EVEN] = &mmpll1_out_even.clkr, 2674d14b15b5SJeffrey Hugo [MMPLL3] = &mmpll3.clkr, 2675d14b15b5SJeffrey Hugo [MMPLL3_OUT_EVEN] = &mmpll3_out_even.clkr, 2676d14b15b5SJeffrey Hugo [MMPLL4] = &mmpll4.clkr, 2677d14b15b5SJeffrey Hugo [MMPLL4_OUT_EVEN] = &mmpll4_out_even.clkr, 2678d14b15b5SJeffrey Hugo [MMPLL5] = &mmpll5.clkr, 2679d14b15b5SJeffrey Hugo [MMPLL5_OUT_EVEN] = &mmpll5_out_even.clkr, 2680d14b15b5SJeffrey Hugo [MMPLL6] = &mmpll6.clkr, 2681d14b15b5SJeffrey Hugo [MMPLL6_OUT_EVEN] = &mmpll6_out_even.clkr, 2682d14b15b5SJeffrey Hugo [MMPLL7] = &mmpll7.clkr, 2683d14b15b5SJeffrey Hugo [MMPLL7_OUT_EVEN] = &mmpll7_out_even.clkr, 2684d14b15b5SJeffrey Hugo [MMPLL10] = &mmpll10.clkr, 2685d14b15b5SJeffrey Hugo [MMPLL10_OUT_EVEN] = &mmpll10_out_even.clkr, 2686d14b15b5SJeffrey Hugo [BYTE0_CLK_SRC] = &byte0_clk_src.clkr, 2687d14b15b5SJeffrey Hugo [BYTE1_CLK_SRC] = &byte1_clk_src.clkr, 2688d14b15b5SJeffrey Hugo [CCI_CLK_SRC] = &cci_clk_src.clkr, 2689d14b15b5SJeffrey Hugo [CPP_CLK_SRC] = &cpp_clk_src.clkr, 2690d14b15b5SJeffrey Hugo [CSI0_CLK_SRC] = &csi0_clk_src.clkr, 2691d14b15b5SJeffrey Hugo [CSI1_CLK_SRC] = &csi1_clk_src.clkr, 2692d14b15b5SJeffrey Hugo [CSI2_CLK_SRC] = &csi2_clk_src.clkr, 2693d14b15b5SJeffrey Hugo [CSI3_CLK_SRC] = &csi3_clk_src.clkr, 2694d14b15b5SJeffrey Hugo [CSIPHY_CLK_SRC] = &csiphy_clk_src.clkr, 2695d14b15b5SJeffrey Hugo [CSI0PHYTIMER_CLK_SRC] = &csi0phytimer_clk_src.clkr, 2696d14b15b5SJeffrey Hugo [CSI1PHYTIMER_CLK_SRC] = &csi1phytimer_clk_src.clkr, 2697d14b15b5SJeffrey Hugo [CSI2PHYTIMER_CLK_SRC] = &csi2phytimer_clk_src.clkr, 2698d14b15b5SJeffrey Hugo [DP_AUX_CLK_SRC] = &dp_aux_clk_src.clkr, 2699d14b15b5SJeffrey Hugo [DP_CRYPTO_CLK_SRC] = &dp_crypto_clk_src.clkr, 2700d14b15b5SJeffrey Hugo [DP_LINK_CLK_SRC] = &dp_link_clk_src.clkr, 2701d14b15b5SJeffrey Hugo [DP_PIXEL_CLK_SRC] = &dp_pixel_clk_src.clkr, 2702d14b15b5SJeffrey Hugo [ESC0_CLK_SRC] = &esc0_clk_src.clkr, 2703d14b15b5SJeffrey Hugo [ESC1_CLK_SRC] = &esc1_clk_src.clkr, 2704d14b15b5SJeffrey Hugo [EXTPCLK_CLK_SRC] = &extpclk_clk_src.clkr, 2705d14b15b5SJeffrey Hugo [FD_CORE_CLK_SRC] = &fd_core_clk_src.clkr, 2706d14b15b5SJeffrey Hugo [HDMI_CLK_SRC] = &hdmi_clk_src.clkr, 2707d14b15b5SJeffrey Hugo [JPEG0_CLK_SRC] = &jpeg0_clk_src.clkr, 2708d14b15b5SJeffrey Hugo [MAXI_CLK_SRC] = &maxi_clk_src.clkr, 2709d14b15b5SJeffrey Hugo [MCLK0_CLK_SRC] = &mclk0_clk_src.clkr, 2710d14b15b5SJeffrey Hugo [MCLK1_CLK_SRC] = &mclk1_clk_src.clkr, 2711d14b15b5SJeffrey Hugo [MCLK2_CLK_SRC] = &mclk2_clk_src.clkr, 2712d14b15b5SJeffrey Hugo [MCLK3_CLK_SRC] = &mclk3_clk_src.clkr, 2713d14b15b5SJeffrey Hugo [MDP_CLK_SRC] = &mdp_clk_src.clkr, 2714d14b15b5SJeffrey Hugo [VSYNC_CLK_SRC] = &vsync_clk_src.clkr, 2715d14b15b5SJeffrey Hugo [AHB_CLK_SRC] = &ahb_clk_src.clkr, 2716d14b15b5SJeffrey Hugo [AXI_CLK_SRC] = &axi_clk_src.clkr, 2717d14b15b5SJeffrey Hugo [PCLK0_CLK_SRC] = &pclk0_clk_src.clkr, 2718d14b15b5SJeffrey Hugo [PCLK1_CLK_SRC] = &pclk1_clk_src.clkr, 2719d14b15b5SJeffrey Hugo [ROT_CLK_SRC] = &rot_clk_src.clkr, 2720d14b15b5SJeffrey Hugo [VIDEO_CORE_CLK_SRC] = &video_core_clk_src.clkr, 2721d14b15b5SJeffrey Hugo [VIDEO_SUBCORE0_CLK_SRC] = &video_subcore0_clk_src.clkr, 2722d14b15b5SJeffrey Hugo [VIDEO_SUBCORE1_CLK_SRC] = &video_subcore1_clk_src.clkr, 2723d14b15b5SJeffrey Hugo [VFE0_CLK_SRC] = &vfe0_clk_src.clkr, 2724d14b15b5SJeffrey Hugo [VFE1_CLK_SRC] = &vfe1_clk_src.clkr, 2725d14b15b5SJeffrey Hugo [MISC_AHB_CLK] = &misc_ahb_clk.clkr, 2726d14b15b5SJeffrey Hugo [VIDEO_CORE_CLK] = &video_core_clk.clkr, 2727d14b15b5SJeffrey Hugo [VIDEO_AHB_CLK] = &video_ahb_clk.clkr, 2728d14b15b5SJeffrey Hugo [VIDEO_AXI_CLK] = &video_axi_clk.clkr, 2729d14b15b5SJeffrey Hugo [VIDEO_MAXI_CLK] = &video_maxi_clk.clkr, 2730d14b15b5SJeffrey Hugo [VIDEO_SUBCORE0_CLK] = &video_subcore0_clk.clkr, 2731d14b15b5SJeffrey Hugo [VIDEO_SUBCORE1_CLK] = &video_subcore1_clk.clkr, 2732d14b15b5SJeffrey Hugo [MDSS_AHB_CLK] = &mdss_ahb_clk.clkr, 2733d14b15b5SJeffrey Hugo [MDSS_HDMI_DP_AHB_CLK] = &mdss_hdmi_dp_ahb_clk.clkr, 2734d14b15b5SJeffrey Hugo [MDSS_AXI_CLK] = &mdss_axi_clk.clkr, 2735d14b15b5SJeffrey Hugo [MDSS_PCLK0_CLK] = &mdss_pclk0_clk.clkr, 2736d14b15b5SJeffrey Hugo [MDSS_PCLK1_CLK] = &mdss_pclk1_clk.clkr, 2737d14b15b5SJeffrey Hugo [MDSS_MDP_CLK] = &mdss_mdp_clk.clkr, 2738d14b15b5SJeffrey Hugo [MDSS_MDP_LUT_CLK] = &mdss_mdp_lut_clk.clkr, 2739d14b15b5SJeffrey Hugo [MDSS_EXTPCLK_CLK] = &mdss_extpclk_clk.clkr, 2740d14b15b5SJeffrey Hugo [MDSS_VSYNC_CLK] = &mdss_vsync_clk.clkr, 2741d14b15b5SJeffrey Hugo [MDSS_HDMI_CLK] = &mdss_hdmi_clk.clkr, 2742d14b15b5SJeffrey Hugo [MDSS_BYTE0_CLK] = &mdss_byte0_clk.clkr, 2743d14b15b5SJeffrey Hugo [MDSS_BYTE1_CLK] = &mdss_byte1_clk.clkr, 2744d14b15b5SJeffrey Hugo [MDSS_ESC0_CLK] = &mdss_esc0_clk.clkr, 2745d14b15b5SJeffrey Hugo [MDSS_ESC1_CLK] = &mdss_esc1_clk.clkr, 2746d14b15b5SJeffrey Hugo [MDSS_ROT_CLK] = &mdss_rot_clk.clkr, 2747d14b15b5SJeffrey Hugo [MDSS_DP_LINK_CLK] = &mdss_dp_link_clk.clkr, 2748d14b15b5SJeffrey Hugo [MDSS_DP_LINK_INTF_CLK] = &mdss_dp_link_intf_clk.clkr, 2749d14b15b5SJeffrey Hugo [MDSS_DP_CRYPTO_CLK] = &mdss_dp_crypto_clk.clkr, 2750d14b15b5SJeffrey Hugo [MDSS_DP_PIXEL_CLK] = &mdss_dp_pixel_clk.clkr, 2751d14b15b5SJeffrey Hugo [MDSS_DP_AUX_CLK] = &mdss_dp_aux_clk.clkr, 2752d14b15b5SJeffrey Hugo [MDSS_BYTE0_INTF_CLK] = &mdss_byte0_intf_clk.clkr, 2753d14b15b5SJeffrey Hugo [MDSS_BYTE1_INTF_CLK] = &mdss_byte1_intf_clk.clkr, 2754d14b15b5SJeffrey Hugo [CAMSS_CSI0PHYTIMER_CLK] = &camss_csi0phytimer_clk.clkr, 2755d14b15b5SJeffrey Hugo [CAMSS_CSI1PHYTIMER_CLK] = &camss_csi1phytimer_clk.clkr, 2756d14b15b5SJeffrey Hugo [CAMSS_CSI2PHYTIMER_CLK] = &camss_csi2phytimer_clk.clkr, 2757d14b15b5SJeffrey Hugo [CAMSS_CSI0_CLK] = &camss_csi0_clk.clkr, 2758d14b15b5SJeffrey Hugo [CAMSS_CSI0_AHB_CLK] = &camss_csi0_ahb_clk.clkr, 2759d14b15b5SJeffrey Hugo [CAMSS_CSI0RDI_CLK] = &camss_csi0rdi_clk.clkr, 2760d14b15b5SJeffrey Hugo [CAMSS_CSI0PIX_CLK] = &camss_csi0pix_clk.clkr, 2761d14b15b5SJeffrey Hugo [CAMSS_CSI1_CLK] = &camss_csi1_clk.clkr, 2762d14b15b5SJeffrey Hugo [CAMSS_CSI1_AHB_CLK] = &camss_csi1_ahb_clk.clkr, 2763d14b15b5SJeffrey Hugo [CAMSS_CSI1RDI_CLK] = &camss_csi1rdi_clk.clkr, 2764d14b15b5SJeffrey Hugo [CAMSS_CSI1PIX_CLK] = &camss_csi1pix_clk.clkr, 2765d14b15b5SJeffrey Hugo [CAMSS_CSI2_CLK] = &camss_csi2_clk.clkr, 2766d14b15b5SJeffrey Hugo [CAMSS_CSI2_AHB_CLK] = &camss_csi2_ahb_clk.clkr, 2767d14b15b5SJeffrey Hugo [CAMSS_CSI2RDI_CLK] = &camss_csi2rdi_clk.clkr, 2768d14b15b5SJeffrey Hugo [CAMSS_CSI2PIX_CLK] = &camss_csi2pix_clk.clkr, 2769d14b15b5SJeffrey Hugo [CAMSS_CSI3_CLK] = &camss_csi3_clk.clkr, 2770d14b15b5SJeffrey Hugo [CAMSS_CSI3_AHB_CLK] = &camss_csi3_ahb_clk.clkr, 2771d14b15b5SJeffrey Hugo [CAMSS_CSI3RDI_CLK] = &camss_csi3rdi_clk.clkr, 2772d14b15b5SJeffrey Hugo [CAMSS_CSI3PIX_CLK] = &camss_csi3pix_clk.clkr, 2773d14b15b5SJeffrey Hugo [CAMSS_ISPIF_AHB_CLK] = &camss_ispif_ahb_clk.clkr, 2774d14b15b5SJeffrey Hugo [CAMSS_CCI_CLK] = &camss_cci_clk.clkr, 2775d14b15b5SJeffrey Hugo [CAMSS_CCI_AHB_CLK] = &camss_cci_ahb_clk.clkr, 2776d14b15b5SJeffrey Hugo [CAMSS_MCLK0_CLK] = &camss_mclk0_clk.clkr, 2777d14b15b5SJeffrey Hugo [CAMSS_MCLK1_CLK] = &camss_mclk1_clk.clkr, 2778d14b15b5SJeffrey Hugo [CAMSS_MCLK2_CLK] = &camss_mclk2_clk.clkr, 2779d14b15b5SJeffrey Hugo [CAMSS_MCLK3_CLK] = &camss_mclk3_clk.clkr, 2780d14b15b5SJeffrey Hugo [CAMSS_TOP_AHB_CLK] = &camss_top_ahb_clk.clkr, 2781d14b15b5SJeffrey Hugo [CAMSS_AHB_CLK] = &camss_ahb_clk.clkr, 2782d14b15b5SJeffrey Hugo [CAMSS_MICRO_AHB_CLK] = &camss_micro_ahb_clk.clkr, 2783d14b15b5SJeffrey Hugo [CAMSS_JPEG0_CLK] = &camss_jpeg0_clk.clkr, 2784d14b15b5SJeffrey Hugo [CAMSS_JPEG_AHB_CLK] = &camss_jpeg_ahb_clk.clkr, 2785d14b15b5SJeffrey Hugo [CAMSS_JPEG_AXI_CLK] = &camss_jpeg_axi_clk.clkr, 2786d14b15b5SJeffrey Hugo [CAMSS_VFE0_AHB_CLK] = &camss_vfe0_ahb_clk.clkr, 2787d14b15b5SJeffrey Hugo [CAMSS_VFE1_AHB_CLK] = &camss_vfe1_ahb_clk.clkr, 2788d14b15b5SJeffrey Hugo [CAMSS_VFE0_CLK] = &camss_vfe0_clk.clkr, 2789d14b15b5SJeffrey Hugo [CAMSS_VFE1_CLK] = &camss_vfe1_clk.clkr, 2790d14b15b5SJeffrey Hugo [CAMSS_CPP_CLK] = &camss_cpp_clk.clkr, 2791d14b15b5SJeffrey Hugo [CAMSS_CPP_AHB_CLK] = &camss_cpp_ahb_clk.clkr, 2792d14b15b5SJeffrey Hugo [CAMSS_VFE_VBIF_AHB_CLK] = &camss_vfe_vbif_ahb_clk.clkr, 2793d14b15b5SJeffrey Hugo [CAMSS_VFE_VBIF_AXI_CLK] = &camss_vfe_vbif_axi_clk.clkr, 2794d14b15b5SJeffrey Hugo [CAMSS_CPP_AXI_CLK] = &camss_cpp_axi_clk.clkr, 2795d14b15b5SJeffrey Hugo [CAMSS_CPP_VBIF_AHB_CLK] = &camss_cpp_vbif_ahb_clk.clkr, 2796d14b15b5SJeffrey Hugo [CAMSS_CSI_VFE0_CLK] = &camss_csi_vfe0_clk.clkr, 2797d14b15b5SJeffrey Hugo [CAMSS_CSI_VFE1_CLK] = &camss_csi_vfe1_clk.clkr, 2798d14b15b5SJeffrey Hugo [CAMSS_VFE0_STREAM_CLK] = &camss_vfe0_stream_clk.clkr, 2799d14b15b5SJeffrey Hugo [CAMSS_VFE1_STREAM_CLK] = &camss_vfe1_stream_clk.clkr, 2800d14b15b5SJeffrey Hugo [CAMSS_CPHY_CSID0_CLK] = &camss_cphy_csid0_clk.clkr, 2801d14b15b5SJeffrey Hugo [CAMSS_CPHY_CSID1_CLK] = &camss_cphy_csid1_clk.clkr, 2802d14b15b5SJeffrey Hugo [CAMSS_CPHY_CSID2_CLK] = &camss_cphy_csid2_clk.clkr, 2803d14b15b5SJeffrey Hugo [CAMSS_CPHY_CSID3_CLK] = &camss_cphy_csid3_clk.clkr, 2804d14b15b5SJeffrey Hugo [CAMSS_CSIPHY0_CLK] = &camss_csiphy0_clk.clkr, 2805d14b15b5SJeffrey Hugo [CAMSS_CSIPHY1_CLK] = &camss_csiphy1_clk.clkr, 2806d14b15b5SJeffrey Hugo [CAMSS_CSIPHY2_CLK] = &camss_csiphy2_clk.clkr, 2807d14b15b5SJeffrey Hugo [FD_CORE_CLK] = &fd_core_clk.clkr, 2808d14b15b5SJeffrey Hugo [FD_CORE_UAR_CLK] = &fd_core_uar_clk.clkr, 2809d14b15b5SJeffrey Hugo [FD_AHB_CLK] = &fd_ahb_clk.clkr, 2810d14b15b5SJeffrey Hugo [MNOC_AHB_CLK] = &mnoc_ahb_clk.clkr, 2811d14b15b5SJeffrey Hugo [BIMC_SMMU_AHB_CLK] = &bimc_smmu_ahb_clk.clkr, 2812d14b15b5SJeffrey Hugo [BIMC_SMMU_AXI_CLK] = &bimc_smmu_axi_clk.clkr, 2813d14b15b5SJeffrey Hugo [MNOC_MAXI_CLK] = &mnoc_maxi_clk.clkr, 2814d14b15b5SJeffrey Hugo [VMEM_MAXI_CLK] = &vmem_maxi_clk.clkr, 2815d14b15b5SJeffrey Hugo [VMEM_AHB_CLK] = &vmem_ahb_clk.clkr, 2816d14b15b5SJeffrey Hugo }; 2817d14b15b5SJeffrey Hugo 2818d14b15b5SJeffrey Hugo static struct gdsc *mmcc_msm8998_gdscs[] = { 2819d14b15b5SJeffrey Hugo [VIDEO_TOP_GDSC] = &video_top_gdsc, 2820d14b15b5SJeffrey Hugo [VIDEO_SUBCORE0_GDSC] = &video_subcore0_gdsc, 2821d14b15b5SJeffrey Hugo [VIDEO_SUBCORE1_GDSC] = &video_subcore1_gdsc, 2822d14b15b5SJeffrey Hugo [MDSS_GDSC] = &mdss_gdsc, 2823d14b15b5SJeffrey Hugo [CAMSS_TOP_GDSC] = &camss_top_gdsc, 2824d14b15b5SJeffrey Hugo [CAMSS_VFE0_GDSC] = &camss_vfe0_gdsc, 2825d14b15b5SJeffrey Hugo [CAMSS_VFE1_GDSC] = &camss_vfe1_gdsc, 2826d14b15b5SJeffrey Hugo [CAMSS_CPP_GDSC] = &camss_cpp_gdsc, 2827d14b15b5SJeffrey Hugo [BIMC_SMMU_GDSC] = &bimc_smmu_gdsc, 2828d14b15b5SJeffrey Hugo }; 2829d14b15b5SJeffrey Hugo 2830d14b15b5SJeffrey Hugo static const struct qcom_reset_map mmcc_msm8998_resets[] = { 2831d14b15b5SJeffrey Hugo [SPDM_BCR] = { 0x200 }, 2832d14b15b5SJeffrey Hugo [SPDM_RM_BCR] = { 0x300 }, 2833d14b15b5SJeffrey Hugo [MISC_BCR] = { 0x320 }, 2834d14b15b5SJeffrey Hugo [VIDEO_TOP_BCR] = { 0x1020 }, 2835d14b15b5SJeffrey Hugo [THROTTLE_VIDEO_BCR] = { 0x1180 }, 2836d14b15b5SJeffrey Hugo [MDSS_BCR] = { 0x2300 }, 2837d14b15b5SJeffrey Hugo [THROTTLE_MDSS_BCR] = { 0x2460 }, 2838d14b15b5SJeffrey Hugo [CAMSS_PHY0_BCR] = { 0x3020 }, 2839d14b15b5SJeffrey Hugo [CAMSS_PHY1_BCR] = { 0x3050 }, 2840d14b15b5SJeffrey Hugo [CAMSS_PHY2_BCR] = { 0x3080 }, 2841d14b15b5SJeffrey Hugo [CAMSS_CSI0_BCR] = { 0x30b0 }, 2842d14b15b5SJeffrey Hugo [CAMSS_CSI0RDI_BCR] = { 0x30d0 }, 2843d14b15b5SJeffrey Hugo [CAMSS_CSI0PIX_BCR] = { 0x30e0 }, 2844d14b15b5SJeffrey Hugo [CAMSS_CSI1_BCR] = { 0x3120 }, 2845d14b15b5SJeffrey Hugo [CAMSS_CSI1RDI_BCR] = { 0x3140 }, 2846d14b15b5SJeffrey Hugo [CAMSS_CSI1PIX_BCR] = { 0x3150 }, 2847d14b15b5SJeffrey Hugo [CAMSS_CSI2_BCR] = { 0x3180 }, 2848d14b15b5SJeffrey Hugo [CAMSS_CSI2RDI_BCR] = { 0x31a0 }, 2849d14b15b5SJeffrey Hugo [CAMSS_CSI2PIX_BCR] = { 0x31b0 }, 2850d14b15b5SJeffrey Hugo [CAMSS_CSI3_BCR] = { 0x31e0 }, 2851d14b15b5SJeffrey Hugo [CAMSS_CSI3RDI_BCR] = { 0x3200 }, 2852d14b15b5SJeffrey Hugo [CAMSS_CSI3PIX_BCR] = { 0x3210 }, 2853d14b15b5SJeffrey Hugo [CAMSS_ISPIF_BCR] = { 0x3220 }, 2854d14b15b5SJeffrey Hugo [CAMSS_CCI_BCR] = { 0x3340 }, 2855d14b15b5SJeffrey Hugo [CAMSS_TOP_BCR] = { 0x3480 }, 2856d14b15b5SJeffrey Hugo [CAMSS_AHB_BCR] = { 0x3488 }, 2857d14b15b5SJeffrey Hugo [CAMSS_MICRO_BCR] = { 0x3490 }, 2858d14b15b5SJeffrey Hugo [CAMSS_JPEG_BCR] = { 0x35a0 }, 2859d14b15b5SJeffrey Hugo [CAMSS_VFE0_BCR] = { 0x3660 }, 2860d14b15b5SJeffrey Hugo [CAMSS_VFE1_BCR] = { 0x3670 }, 2861d14b15b5SJeffrey Hugo [CAMSS_VFE_VBIF_BCR] = { 0x36a0 }, 2862d14b15b5SJeffrey Hugo [CAMSS_CPP_TOP_BCR] = { 0x36c0 }, 2863d14b15b5SJeffrey Hugo [CAMSS_CPP_BCR] = { 0x36d0 }, 2864d14b15b5SJeffrey Hugo [CAMSS_CSI_VFE0_BCR] = { 0x3700 }, 2865d14b15b5SJeffrey Hugo [CAMSS_CSI_VFE1_BCR] = { 0x3710 }, 2866d14b15b5SJeffrey Hugo [CAMSS_FD_BCR] = { 0x3b60 }, 2867d14b15b5SJeffrey Hugo [THROTTLE_CAMSS_BCR] = { 0x3c30 }, 2868d14b15b5SJeffrey Hugo [MNOCAHB_BCR] = { 0x5020 }, 2869d14b15b5SJeffrey Hugo [MNOCAXI_BCR] = { 0xd020 }, 2870d14b15b5SJeffrey Hugo [BMIC_SMMU_BCR] = { 0xe000 }, 2871d14b15b5SJeffrey Hugo [MNOC_MAXI_BCR] = { 0xf000 }, 2872d14b15b5SJeffrey Hugo [VMEM_BCR] = { 0xf060 }, 2873d14b15b5SJeffrey Hugo [BTO_BCR] = { 0x10004 }, 2874d14b15b5SJeffrey Hugo }; 2875d14b15b5SJeffrey Hugo 2876d14b15b5SJeffrey Hugo static const struct regmap_config mmcc_msm8998_regmap_config = { 2877d14b15b5SJeffrey Hugo .reg_bits = 32, 2878d14b15b5SJeffrey Hugo .reg_stride = 4, 2879d14b15b5SJeffrey Hugo .val_bits = 32, 2880d14b15b5SJeffrey Hugo .max_register = 0x10004, 2881d14b15b5SJeffrey Hugo .fast_io = true, 2882d14b15b5SJeffrey Hugo }; 2883d14b15b5SJeffrey Hugo 2884d14b15b5SJeffrey Hugo static const struct qcom_cc_desc mmcc_msm8998_desc = { 2885d14b15b5SJeffrey Hugo .config = &mmcc_msm8998_regmap_config, 2886d14b15b5SJeffrey Hugo .clks = mmcc_msm8998_clocks, 2887d14b15b5SJeffrey Hugo .num_clks = ARRAY_SIZE(mmcc_msm8998_clocks), 2888d14b15b5SJeffrey Hugo .resets = mmcc_msm8998_resets, 2889d14b15b5SJeffrey Hugo .num_resets = ARRAY_SIZE(mmcc_msm8998_resets), 2890d14b15b5SJeffrey Hugo .gdscs = mmcc_msm8998_gdscs, 2891d14b15b5SJeffrey Hugo .num_gdscs = ARRAY_SIZE(mmcc_msm8998_gdscs), 2892d14b15b5SJeffrey Hugo .clk_hws = mmcc_msm8998_hws, 2893d14b15b5SJeffrey Hugo .num_clk_hws = ARRAY_SIZE(mmcc_msm8998_hws), 2894d14b15b5SJeffrey Hugo }; 2895d14b15b5SJeffrey Hugo 2896d14b15b5SJeffrey Hugo static const struct of_device_id mmcc_msm8998_match_table[] = { 2897d14b15b5SJeffrey Hugo { .compatible = "qcom,mmcc-msm8998" }, 2898d14b15b5SJeffrey Hugo { } 2899d14b15b5SJeffrey Hugo }; 2900d14b15b5SJeffrey Hugo MODULE_DEVICE_TABLE(of, mmcc_msm8998_match_table); 2901d14b15b5SJeffrey Hugo 2902d14b15b5SJeffrey Hugo static int mmcc_msm8998_probe(struct platform_device *pdev) 2903d14b15b5SJeffrey Hugo { 2904d14b15b5SJeffrey Hugo struct regmap *regmap; 2905d14b15b5SJeffrey Hugo 2906d14b15b5SJeffrey Hugo regmap = qcom_cc_map(pdev, &mmcc_msm8998_desc); 2907d14b15b5SJeffrey Hugo if (IS_ERR(regmap)) 2908d14b15b5SJeffrey Hugo return PTR_ERR(regmap); 2909d14b15b5SJeffrey Hugo 2910d14b15b5SJeffrey Hugo return qcom_cc_really_probe(pdev, &mmcc_msm8998_desc, regmap); 2911d14b15b5SJeffrey Hugo } 2912d14b15b5SJeffrey Hugo 2913d14b15b5SJeffrey Hugo static struct platform_driver mmcc_msm8998_driver = { 2914d14b15b5SJeffrey Hugo .probe = mmcc_msm8998_probe, 2915d14b15b5SJeffrey Hugo .driver = { 2916d14b15b5SJeffrey Hugo .name = "mmcc-msm8998", 2917d14b15b5SJeffrey Hugo .of_match_table = mmcc_msm8998_match_table, 2918d14b15b5SJeffrey Hugo }, 2919d14b15b5SJeffrey Hugo }; 2920d14b15b5SJeffrey Hugo module_platform_driver(mmcc_msm8998_driver); 2921d14b15b5SJeffrey Hugo 2922d14b15b5SJeffrey Hugo MODULE_DESCRIPTION("QCOM MMCC MSM8998 Driver"); 2923d14b15b5SJeffrey Hugo MODULE_LICENSE("GPL v2"); 2924