xref: /openbmc/linux/drivers/clk/qcom/gdsc.h (revision 52beb1fc)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2015, 2017-2018, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef __QCOM_GDSC_H__
7 #define __QCOM_GDSC_H__
8 
9 #include <linux/err.h>
10 #include <linux/pm_domain.h>
11 
12 struct regmap;
13 struct regulator;
14 struct reset_controller_dev;
15 
16 /**
17  * struct gdsc - Globally Distributed Switch Controller
18  * @pd: generic power domain
19  * @regmap: regmap for MMIO accesses
20  * @gdscr: gsdc control register
21  * @gds_hw_ctrl: gds_hw_ctrl register
22  * @cxcs: offsets of branch registers to toggle mem/periph bits in
23  * @cxc_count: number of @cxcs
24  * @pwrsts: Possible powerdomain power states
25  * @resets: ids of resets associated with this gdsc
26  * @reset_count: number of @resets
27  * @rcdev: reset controller
28  * @dev: the device holding the GDSC, used for pm_runtime calls
29  */
30 struct gdsc {
31 	struct generic_pm_domain	pd;
32 	struct generic_pm_domain	*parent;
33 	struct regmap			*regmap;
34 	unsigned int			gdscr;
35 	unsigned int			gds_hw_ctrl;
36 	unsigned int			clamp_io_ctrl;
37 	unsigned int			*cxcs;
38 	unsigned int			cxc_count;
39 	const u8			pwrsts;
40 /* Powerdomain allowable state bitfields */
41 #define PWRSTS_OFF		BIT(0)
42 #define PWRSTS_RET		BIT(1)
43 #define PWRSTS_ON		BIT(2)
44 #define PWRSTS_OFF_ON		(PWRSTS_OFF | PWRSTS_ON)
45 #define PWRSTS_RET_ON		(PWRSTS_RET | PWRSTS_ON)
46 	const u16			flags;
47 #define VOTABLE		BIT(0)
48 #define CLAMP_IO	BIT(1)
49 #define HW_CTRL		BIT(2)
50 #define SW_RESET	BIT(3)
51 #define AON_RESET	BIT(4)
52 #define POLL_CFG_GDSCR	BIT(5)
53 #define ALWAYS_ON	BIT(6)
54 #define RETAIN_FF_ENABLE	BIT(7)
55 #define NO_RET_PERIPH	BIT(8)
56 	struct reset_controller_dev	*rcdev;
57 	unsigned int			*resets;
58 	unsigned int			reset_count;
59 
60 	const char 			*supply;
61 	struct regulator		*rsupply;
62 	struct device			*dev;
63 };
64 
65 struct gdsc_desc {
66 	struct device *dev;
67 	struct gdsc **scs;
68 	size_t num;
69 };
70 
71 #ifdef CONFIG_QCOM_GDSC
72 int gdsc_register(struct gdsc_desc *desc, struct reset_controller_dev *,
73 		  struct regmap *);
74 void gdsc_unregister(struct gdsc_desc *desc);
75 int gdsc_gx_do_nothing_enable(struct generic_pm_domain *domain);
76 #else
77 static inline int gdsc_register(struct gdsc_desc *desc,
78 				struct reset_controller_dev *rcdev,
79 				struct regmap *r)
80 {
81 	return -ENOSYS;
82 }
83 
84 static inline void gdsc_unregister(struct gdsc_desc *desc) {};
85 #endif /* CONFIG_QCOM_GDSC */
86 #endif /* __QCOM_GDSC_H__ */
87