1 /* 2 * Copyright (c) 2015, 2017-2018, The Linux Foundation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #ifndef __QCOM_GDSC_H__ 15 #define __QCOM_GDSC_H__ 16 17 #include <linux/err.h> 18 #include <linux/pm_domain.h> 19 20 struct regmap; 21 struct reset_controller_dev; 22 23 /** 24 * struct gdsc - Globally Distributed Switch Controller 25 * @pd: generic power domain 26 * @regmap: regmap for MMIO accesses 27 * @gdscr: gsdc control register 28 * @gds_hw_ctrl: gds_hw_ctrl register 29 * @cxcs: offsets of branch registers to toggle mem/periph bits in 30 * @cxc_count: number of @cxcs 31 * @pwrsts: Possible powerdomain power states 32 * @resets: ids of resets associated with this gdsc 33 * @reset_count: number of @resets 34 * @rcdev: reset controller 35 */ 36 struct gdsc { 37 struct generic_pm_domain pd; 38 struct generic_pm_domain *parent; 39 struct regmap *regmap; 40 unsigned int gdscr; 41 unsigned int gds_hw_ctrl; 42 unsigned int clamp_io_ctrl; 43 unsigned int *cxcs; 44 unsigned int cxc_count; 45 const u8 pwrsts; 46 /* Powerdomain allowable state bitfields */ 47 #define PWRSTS_OFF BIT(0) 48 #define PWRSTS_RET BIT(1) 49 #define PWRSTS_ON BIT(2) 50 #define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON) 51 #define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON) 52 const u8 flags; 53 #define VOTABLE BIT(0) 54 #define CLAMP_IO BIT(1) 55 #define HW_CTRL BIT(2) 56 #define SW_RESET BIT(3) 57 #define AON_RESET BIT(4) 58 #define POLL_CFG_GDSCR BIT(5) 59 #define ALWAYS_ON BIT(6) 60 struct reset_controller_dev *rcdev; 61 unsigned int *resets; 62 unsigned int reset_count; 63 }; 64 65 struct gdsc_desc { 66 struct device *dev; 67 struct gdsc **scs; 68 size_t num; 69 }; 70 71 #ifdef CONFIG_QCOM_GDSC 72 int gdsc_register(struct gdsc_desc *desc, struct reset_controller_dev *, 73 struct regmap *); 74 void gdsc_unregister(struct gdsc_desc *desc); 75 #else 76 static inline int gdsc_register(struct gdsc_desc *desc, 77 struct reset_controller_dev *rcdev, 78 struct regmap *r) 79 { 80 return -ENOSYS; 81 } 82 83 static inline void gdsc_unregister(struct gdsc_desc *desc) {}; 84 #endif /* CONFIG_QCOM_GDSC */ 85 #endif /* __QCOM_GDSC_H__ */ 86