116fb89f9SDmitry Baryshkov // SPDX-License-Identifier: GPL-2.0-only 216fb89f9SDmitry Baryshkov /* 316fb89f9SDmitry Baryshkov * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. 416fb89f9SDmitry Baryshkov * Copyright (c) 2022, Linaro Ltd. 516fb89f9SDmitry Baryshkov */ 616fb89f9SDmitry Baryshkov 716fb89f9SDmitry Baryshkov #include <linux/clk.h> 816fb89f9SDmitry Baryshkov #include <linux/clk-provider.h> 916fb89f9SDmitry Baryshkov #include <linux/err.h> 1016fb89f9SDmitry Baryshkov #include <linux/kernel.h> 1116fb89f9SDmitry Baryshkov #include <linux/module.h> 1216fb89f9SDmitry Baryshkov #include <linux/of.h> 13*a96cbb14SRob Herring #include <linux/platform_device.h> 1416fb89f9SDmitry Baryshkov #include <linux/regmap.h> 1516fb89f9SDmitry Baryshkov #include <linux/pm_runtime.h> 1616fb89f9SDmitry Baryshkov 1716fb89f9SDmitry Baryshkov #include <dt-bindings/clock/qcom,sm8450-dispcc.h> 1816fb89f9SDmitry Baryshkov 1916fb89f9SDmitry Baryshkov #include "common.h" 2016fb89f9SDmitry Baryshkov #include "clk-alpha-pll.h" 2116fb89f9SDmitry Baryshkov #include "clk-branch.h" 2216fb89f9SDmitry Baryshkov #include "clk-pll.h" 2316fb89f9SDmitry Baryshkov #include "clk-rcg.h" 2416fb89f9SDmitry Baryshkov #include "clk-regmap.h" 2516fb89f9SDmitry Baryshkov #include "clk-regmap-divider.h" 2616fb89f9SDmitry Baryshkov #include "clk-regmap-mux.h" 2716fb89f9SDmitry Baryshkov #include "reset.h" 2816fb89f9SDmitry Baryshkov #include "gdsc.h" 2916fb89f9SDmitry Baryshkov 3016fb89f9SDmitry Baryshkov /* Need to match the order of clocks in DT binding */ 3116fb89f9SDmitry Baryshkov enum { 3216fb89f9SDmitry Baryshkov DT_BI_TCXO, 3316fb89f9SDmitry Baryshkov DT_BI_TCXO_AO, 3416fb89f9SDmitry Baryshkov DT_AHB_CLK, 3516fb89f9SDmitry Baryshkov DT_SLEEP_CLK, 3616fb89f9SDmitry Baryshkov 3716fb89f9SDmitry Baryshkov DT_DSI0_PHY_PLL_OUT_BYTECLK, 3816fb89f9SDmitry Baryshkov DT_DSI0_PHY_PLL_OUT_DSICLK, 3916fb89f9SDmitry Baryshkov DT_DSI1_PHY_PLL_OUT_BYTECLK, 4016fb89f9SDmitry Baryshkov DT_DSI1_PHY_PLL_OUT_DSICLK, 4116fb89f9SDmitry Baryshkov 4216fb89f9SDmitry Baryshkov DT_DP0_PHY_PLL_LINK_CLK, 4316fb89f9SDmitry Baryshkov DT_DP0_PHY_PLL_VCO_DIV_CLK, 4416fb89f9SDmitry Baryshkov DT_DP1_PHY_PLL_LINK_CLK, 4516fb89f9SDmitry Baryshkov DT_DP1_PHY_PLL_VCO_DIV_CLK, 4616fb89f9SDmitry Baryshkov DT_DP2_PHY_PLL_LINK_CLK, 4716fb89f9SDmitry Baryshkov DT_DP2_PHY_PLL_VCO_DIV_CLK, 4816fb89f9SDmitry Baryshkov DT_DP3_PHY_PLL_LINK_CLK, 4916fb89f9SDmitry Baryshkov DT_DP3_PHY_PLL_VCO_DIV_CLK, 5016fb89f9SDmitry Baryshkov }; 5116fb89f9SDmitry Baryshkov 5216fb89f9SDmitry Baryshkov #define DISP_CC_MISC_CMD 0xF000 5316fb89f9SDmitry Baryshkov 5416fb89f9SDmitry Baryshkov enum { 5516fb89f9SDmitry Baryshkov P_BI_TCXO, 5616fb89f9SDmitry Baryshkov P_DISP_CC_PLL0_OUT_MAIN, 5716fb89f9SDmitry Baryshkov P_DISP_CC_PLL1_OUT_EVEN, 5816fb89f9SDmitry Baryshkov P_DISP_CC_PLL1_OUT_MAIN, 5916fb89f9SDmitry Baryshkov P_DP0_PHY_PLL_LINK_CLK, 6016fb89f9SDmitry Baryshkov P_DP0_PHY_PLL_VCO_DIV_CLK, 6116fb89f9SDmitry Baryshkov P_DP1_PHY_PLL_LINK_CLK, 6216fb89f9SDmitry Baryshkov P_DP1_PHY_PLL_VCO_DIV_CLK, 6316fb89f9SDmitry Baryshkov P_DP2_PHY_PLL_LINK_CLK, 6416fb89f9SDmitry Baryshkov P_DP2_PHY_PLL_VCO_DIV_CLK, 6516fb89f9SDmitry Baryshkov P_DP3_PHY_PLL_LINK_CLK, 6616fb89f9SDmitry Baryshkov P_DP3_PHY_PLL_VCO_DIV_CLK, 6716fb89f9SDmitry Baryshkov P_DSI0_PHY_PLL_OUT_BYTECLK, 6816fb89f9SDmitry Baryshkov P_DSI0_PHY_PLL_OUT_DSICLK, 6916fb89f9SDmitry Baryshkov P_DSI1_PHY_PLL_OUT_BYTECLK, 7016fb89f9SDmitry Baryshkov P_DSI1_PHY_PLL_OUT_DSICLK, 7116fb89f9SDmitry Baryshkov P_SLEEP_CLK, 7216fb89f9SDmitry Baryshkov }; 7316fb89f9SDmitry Baryshkov 7416fb89f9SDmitry Baryshkov static struct pll_vco lucid_evo_vco[] = { 7516fb89f9SDmitry Baryshkov { 249600000, 2000000000, 0 }, 7616fb89f9SDmitry Baryshkov }; 7716fb89f9SDmitry Baryshkov 7816fb89f9SDmitry Baryshkov static const struct alpha_pll_config disp_cc_pll0_config = { 7916fb89f9SDmitry Baryshkov .l = 0xD, 8016fb89f9SDmitry Baryshkov .alpha = 0x6492, 8116fb89f9SDmitry Baryshkov .config_ctl_val = 0x20485699, 8216fb89f9SDmitry Baryshkov .config_ctl_hi_val = 0x00182261, 8316fb89f9SDmitry Baryshkov .config_ctl_hi1_val = 0x32AA299C, 8416fb89f9SDmitry Baryshkov .user_ctl_val = 0x00000000, 8516fb89f9SDmitry Baryshkov .user_ctl_hi_val = 0x00000805, 8616fb89f9SDmitry Baryshkov }; 8716fb89f9SDmitry Baryshkov 8816fb89f9SDmitry Baryshkov static struct clk_alpha_pll disp_cc_pll0 = { 8916fb89f9SDmitry Baryshkov .offset = 0x0, 9016fb89f9SDmitry Baryshkov .vco_table = lucid_evo_vco, 9116fb89f9SDmitry Baryshkov .num_vco = ARRAY_SIZE(lucid_evo_vco), 9216fb89f9SDmitry Baryshkov .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID_EVO], 9316fb89f9SDmitry Baryshkov .clkr = { 9416fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 9516fb89f9SDmitry Baryshkov .name = "disp_cc_pll0", 9616fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 9716fb89f9SDmitry Baryshkov .index = DT_BI_TCXO, 9816fb89f9SDmitry Baryshkov }, 9916fb89f9SDmitry Baryshkov .num_parents = 1, 10016fb89f9SDmitry Baryshkov .ops = &clk_alpha_pll_reset_lucid_evo_ops, 10116fb89f9SDmitry Baryshkov }, 10216fb89f9SDmitry Baryshkov }, 10316fb89f9SDmitry Baryshkov }; 10416fb89f9SDmitry Baryshkov 10516fb89f9SDmitry Baryshkov static const struct alpha_pll_config disp_cc_pll1_config = { 10616fb89f9SDmitry Baryshkov .l = 0x1F, 10716fb89f9SDmitry Baryshkov .alpha = 0x4000, 10816fb89f9SDmitry Baryshkov .config_ctl_val = 0x20485699, 10916fb89f9SDmitry Baryshkov .config_ctl_hi_val = 0x00182261, 11016fb89f9SDmitry Baryshkov .config_ctl_hi1_val = 0x32AA299C, 11116fb89f9SDmitry Baryshkov .user_ctl_val = 0x00000000, 11216fb89f9SDmitry Baryshkov .user_ctl_hi_val = 0x00000805, 11316fb89f9SDmitry Baryshkov }; 11416fb89f9SDmitry Baryshkov 11516fb89f9SDmitry Baryshkov static struct clk_alpha_pll disp_cc_pll1 = { 11616fb89f9SDmitry Baryshkov .offset = 0x1000, 11716fb89f9SDmitry Baryshkov .vco_table = lucid_evo_vco, 11816fb89f9SDmitry Baryshkov .num_vco = ARRAY_SIZE(lucid_evo_vco), 11916fb89f9SDmitry Baryshkov .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID_EVO], 12016fb89f9SDmitry Baryshkov .clkr = { 12116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 12216fb89f9SDmitry Baryshkov .name = "disp_cc_pll1", 12316fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 12416fb89f9SDmitry Baryshkov .index = DT_BI_TCXO, 12516fb89f9SDmitry Baryshkov }, 12616fb89f9SDmitry Baryshkov .num_parents = 1, 12716fb89f9SDmitry Baryshkov .ops = &clk_alpha_pll_reset_lucid_evo_ops, 12816fb89f9SDmitry Baryshkov }, 12916fb89f9SDmitry Baryshkov }, 13016fb89f9SDmitry Baryshkov }; 13116fb89f9SDmitry Baryshkov 13216fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_0[] = { 13316fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 13416fb89f9SDmitry Baryshkov { P_DP0_PHY_PLL_LINK_CLK, 1 }, 13516fb89f9SDmitry Baryshkov { P_DP0_PHY_PLL_VCO_DIV_CLK, 2 }, 13616fb89f9SDmitry Baryshkov { P_DP3_PHY_PLL_VCO_DIV_CLK, 3 }, 13716fb89f9SDmitry Baryshkov { P_DP1_PHY_PLL_VCO_DIV_CLK, 4 }, 13816fb89f9SDmitry Baryshkov { P_DP2_PHY_PLL_VCO_DIV_CLK, 6 }, 13916fb89f9SDmitry Baryshkov }; 14016fb89f9SDmitry Baryshkov 14116fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_0[] = { 14216fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 14316fb89f9SDmitry Baryshkov { .index = DT_DP0_PHY_PLL_LINK_CLK }, 14416fb89f9SDmitry Baryshkov { .index = DT_DP0_PHY_PLL_VCO_DIV_CLK }, 14516fb89f9SDmitry Baryshkov { .index = DT_DP3_PHY_PLL_VCO_DIV_CLK }, 14616fb89f9SDmitry Baryshkov { .index = DT_DP1_PHY_PLL_VCO_DIV_CLK }, 14716fb89f9SDmitry Baryshkov { .index = DT_DP2_PHY_PLL_VCO_DIV_CLK }, 14816fb89f9SDmitry Baryshkov }; 14916fb89f9SDmitry Baryshkov 15016fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_1[] = { 15116fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 15216fb89f9SDmitry Baryshkov }; 15316fb89f9SDmitry Baryshkov 15416fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_1[] = { 15516fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 15616fb89f9SDmitry Baryshkov }; 15716fb89f9SDmitry Baryshkov 15816fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_1_ao[] = { 15916fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO_AO }, 16016fb89f9SDmitry Baryshkov }; 16116fb89f9SDmitry Baryshkov 16216fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_2[] = { 16316fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 16416fb89f9SDmitry Baryshkov { P_DSI0_PHY_PLL_OUT_DSICLK, 1 }, 16516fb89f9SDmitry Baryshkov { P_DSI0_PHY_PLL_OUT_BYTECLK, 2 }, 16616fb89f9SDmitry Baryshkov { P_DSI1_PHY_PLL_OUT_DSICLK, 3 }, 16716fb89f9SDmitry Baryshkov { P_DSI1_PHY_PLL_OUT_BYTECLK, 4 }, 16816fb89f9SDmitry Baryshkov }; 16916fb89f9SDmitry Baryshkov 17016fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_2[] = { 17116fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 17216fb89f9SDmitry Baryshkov { .index = DT_DSI0_PHY_PLL_OUT_DSICLK }, 17316fb89f9SDmitry Baryshkov { .index = DT_DSI0_PHY_PLL_OUT_BYTECLK }, 17416fb89f9SDmitry Baryshkov { .index = DT_DSI1_PHY_PLL_OUT_DSICLK }, 17516fb89f9SDmitry Baryshkov { .index = DT_DSI1_PHY_PLL_OUT_BYTECLK }, 17616fb89f9SDmitry Baryshkov }; 17716fb89f9SDmitry Baryshkov 17816fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_3[] = { 17916fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 18016fb89f9SDmitry Baryshkov { P_DP0_PHY_PLL_LINK_CLK, 1 }, 18116fb89f9SDmitry Baryshkov { P_DP1_PHY_PLL_LINK_CLK, 2 }, 18216fb89f9SDmitry Baryshkov { P_DP2_PHY_PLL_LINK_CLK, 3 }, 18316fb89f9SDmitry Baryshkov { P_DP3_PHY_PLL_LINK_CLK, 4 }, 18416fb89f9SDmitry Baryshkov }; 18516fb89f9SDmitry Baryshkov 18616fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_3[] = { 18716fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 18816fb89f9SDmitry Baryshkov { .index = DT_DP0_PHY_PLL_LINK_CLK }, 18916fb89f9SDmitry Baryshkov { .index = DT_DP1_PHY_PLL_LINK_CLK }, 19016fb89f9SDmitry Baryshkov { .index = DT_DP2_PHY_PLL_LINK_CLK }, 19116fb89f9SDmitry Baryshkov { .index = DT_DP3_PHY_PLL_LINK_CLK }, 19216fb89f9SDmitry Baryshkov }; 19316fb89f9SDmitry Baryshkov 19416fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_4[] = { 19516fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 19616fb89f9SDmitry Baryshkov { P_DSI0_PHY_PLL_OUT_BYTECLK, 2 }, 19716fb89f9SDmitry Baryshkov { P_DSI1_PHY_PLL_OUT_BYTECLK, 4 }, 19816fb89f9SDmitry Baryshkov }; 19916fb89f9SDmitry Baryshkov 20016fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_4[] = { 20116fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 20216fb89f9SDmitry Baryshkov { .index = DT_DSI0_PHY_PLL_OUT_BYTECLK }, 20316fb89f9SDmitry Baryshkov { .index = DT_DSI1_PHY_PLL_OUT_BYTECLK }, 20416fb89f9SDmitry Baryshkov }; 20516fb89f9SDmitry Baryshkov 20616fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_5[] = { 20716fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 20816fb89f9SDmitry Baryshkov { P_DISP_CC_PLL0_OUT_MAIN, 1 }, 20916fb89f9SDmitry Baryshkov { P_DISP_CC_PLL1_OUT_MAIN, 4 }, 21016fb89f9SDmitry Baryshkov { P_DISP_CC_PLL1_OUT_EVEN, 6 }, 21116fb89f9SDmitry Baryshkov }; 21216fb89f9SDmitry Baryshkov 21316fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_5[] = { 21416fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 21516fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll0.clkr.hw }, 21616fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll1.clkr.hw }, 21716fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll1.clkr.hw }, 21816fb89f9SDmitry Baryshkov }; 21916fb89f9SDmitry Baryshkov 22016fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_6[] = { 22116fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 22216fb89f9SDmitry Baryshkov { P_DISP_CC_PLL1_OUT_MAIN, 4 }, 22316fb89f9SDmitry Baryshkov { P_DISP_CC_PLL1_OUT_EVEN, 6 }, 22416fb89f9SDmitry Baryshkov }; 22516fb89f9SDmitry Baryshkov 22616fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_6[] = { 22716fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 22816fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll1.clkr.hw }, 22916fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll1.clkr.hw }, 23016fb89f9SDmitry Baryshkov }; 23116fb89f9SDmitry Baryshkov 23216fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_7[] = { 23316fb89f9SDmitry Baryshkov { P_SLEEP_CLK, 0 }, 23416fb89f9SDmitry Baryshkov }; 23516fb89f9SDmitry Baryshkov 23616fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_7[] = { 23716fb89f9SDmitry Baryshkov { .index = DT_SLEEP_CLK }, 23816fb89f9SDmitry Baryshkov }; 23916fb89f9SDmitry Baryshkov 24016fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_ahb_clk_src[] = { 24116fb89f9SDmitry Baryshkov F(19200000, P_BI_TCXO, 1, 0, 0), 24216fb89f9SDmitry Baryshkov F(37500000, P_DISP_CC_PLL1_OUT_MAIN, 16, 0, 0), 24316fb89f9SDmitry Baryshkov F(75000000, P_DISP_CC_PLL1_OUT_MAIN, 8, 0, 0), 24416fb89f9SDmitry Baryshkov { } 24516fb89f9SDmitry Baryshkov }; 24616fb89f9SDmitry Baryshkov 24716fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_ahb_clk_src = { 24816fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8324, 24916fb89f9SDmitry Baryshkov .mnd_width = 0, 25016fb89f9SDmitry Baryshkov .hid_width = 5, 25116fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_6, 25216fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_ahb_clk_src, 25316fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 25416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_ahb_clk_src", 25516fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_6, 25616fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_6), 25716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 25816fb89f9SDmitry Baryshkov .ops = &clk_rcg2_shared_ops, 25916fb89f9SDmitry Baryshkov }, 26016fb89f9SDmitry Baryshkov }; 26116fb89f9SDmitry Baryshkov 26216fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_byte0_clk_src[] = { 26316fb89f9SDmitry Baryshkov F(19200000, P_BI_TCXO, 1, 0, 0), 26416fb89f9SDmitry Baryshkov { } 26516fb89f9SDmitry Baryshkov }; 26616fb89f9SDmitry Baryshkov 26716fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { 26816fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8134, 26916fb89f9SDmitry Baryshkov .mnd_width = 0, 27016fb89f9SDmitry Baryshkov .hid_width = 5, 27116fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_2, 27216fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 27316fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 27416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte0_clk_src", 27516fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_2, 27616fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_2), 27716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 27816fb89f9SDmitry Baryshkov .ops = &clk_byte2_ops, 27916fb89f9SDmitry Baryshkov }, 28016fb89f9SDmitry Baryshkov }; 28116fb89f9SDmitry Baryshkov 28216fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { 28316fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8150, 28416fb89f9SDmitry Baryshkov .mnd_width = 0, 28516fb89f9SDmitry Baryshkov .hid_width = 5, 28616fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_2, 28716fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 28816fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 28916fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte1_clk_src", 29016fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_2, 29116fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_2), 29216fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 29316fb89f9SDmitry Baryshkov .ops = &clk_byte2_ops, 29416fb89f9SDmitry Baryshkov }, 29516fb89f9SDmitry Baryshkov }; 29616fb89f9SDmitry Baryshkov 29716fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx0_aux_clk_src = { 29816fb89f9SDmitry Baryshkov .cmd_rcgr = 0x81ec, 29916fb89f9SDmitry Baryshkov .mnd_width = 0, 30016fb89f9SDmitry Baryshkov .hid_width = 5, 30116fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 30216fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 30316fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 30416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_aux_clk_src", 30516fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 30616fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 30716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 30816fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 30916fb89f9SDmitry Baryshkov }, 31016fb89f9SDmitry Baryshkov }; 31116fb89f9SDmitry Baryshkov 31216fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_dptx0_link_clk_src[] = { 31316fb89f9SDmitry Baryshkov F(162000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), 31416fb89f9SDmitry Baryshkov F(270000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), 31516fb89f9SDmitry Baryshkov F(540000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), 31616fb89f9SDmitry Baryshkov F(810000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), 31716fb89f9SDmitry Baryshkov { } 31816fb89f9SDmitry Baryshkov }; 31916fb89f9SDmitry Baryshkov 32016fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx0_link_clk_src = { 32116fb89f9SDmitry Baryshkov .cmd_rcgr = 0x819c, 32216fb89f9SDmitry Baryshkov .mnd_width = 0, 32316fb89f9SDmitry Baryshkov .hid_width = 5, 32416fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_3, 32516fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, 32616fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 32716fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_link_clk_src", 32816fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_3, 32916fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), 33016fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 33116fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 33216fb89f9SDmitry Baryshkov }, 33316fb89f9SDmitry Baryshkov }; 33416fb89f9SDmitry Baryshkov 33516fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx0_pixel0_clk_src = { 33616fb89f9SDmitry Baryshkov .cmd_rcgr = 0x81bc, 33716fb89f9SDmitry Baryshkov .mnd_width = 16, 33816fb89f9SDmitry Baryshkov .hid_width = 5, 33916fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 34016fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 34116fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 34216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_pixel0_clk_src", 34316fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 34416fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 34516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 34616fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 34716fb89f9SDmitry Baryshkov }, 34816fb89f9SDmitry Baryshkov }; 34916fb89f9SDmitry Baryshkov 35016fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx0_pixel1_clk_src = { 35116fb89f9SDmitry Baryshkov .cmd_rcgr = 0x81d4, 35216fb89f9SDmitry Baryshkov .mnd_width = 16, 35316fb89f9SDmitry Baryshkov .hid_width = 5, 35416fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 35516fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 35616fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 35716fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_pixel1_clk_src", 35816fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 35916fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 36016fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 36116fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 36216fb89f9SDmitry Baryshkov }, 36316fb89f9SDmitry Baryshkov }; 36416fb89f9SDmitry Baryshkov 36516fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx1_aux_clk_src = { 36616fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8254, 36716fb89f9SDmitry Baryshkov .mnd_width = 0, 36816fb89f9SDmitry Baryshkov .hid_width = 5, 36916fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 37016fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 37116fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 37216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_aux_clk_src", 37316fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 37416fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 37516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 37616fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 37716fb89f9SDmitry Baryshkov }, 37816fb89f9SDmitry Baryshkov }; 37916fb89f9SDmitry Baryshkov 38016fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx1_link_clk_src = { 38116fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8234, 38216fb89f9SDmitry Baryshkov .mnd_width = 0, 38316fb89f9SDmitry Baryshkov .hid_width = 5, 38416fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_3, 38516fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, 38616fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 38716fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_link_clk_src", 38816fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_3, 38916fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), 39016fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 39116fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 39216fb89f9SDmitry Baryshkov }, 39316fb89f9SDmitry Baryshkov }; 39416fb89f9SDmitry Baryshkov 39516fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx1_pixel0_clk_src = { 39616fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8204, 39716fb89f9SDmitry Baryshkov .mnd_width = 16, 39816fb89f9SDmitry Baryshkov .hid_width = 5, 39916fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 40016fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 40116fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 40216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_pixel0_clk_src", 40316fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 40416fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 40516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 40616fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 40716fb89f9SDmitry Baryshkov }, 40816fb89f9SDmitry Baryshkov }; 40916fb89f9SDmitry Baryshkov 41016fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx1_pixel1_clk_src = { 41116fb89f9SDmitry Baryshkov .cmd_rcgr = 0x821c, 41216fb89f9SDmitry Baryshkov .mnd_width = 16, 41316fb89f9SDmitry Baryshkov .hid_width = 5, 41416fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 41516fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 41616fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 41716fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_pixel1_clk_src", 41816fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 41916fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 42016fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 42116fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 42216fb89f9SDmitry Baryshkov }, 42316fb89f9SDmitry Baryshkov }; 42416fb89f9SDmitry Baryshkov 42516fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx2_aux_clk_src = { 42616fb89f9SDmitry Baryshkov .cmd_rcgr = 0x82bc, 42716fb89f9SDmitry Baryshkov .mnd_width = 0, 42816fb89f9SDmitry Baryshkov .hid_width = 5, 42916fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 43016fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 43116fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 43216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_aux_clk_src", 43316fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 43416fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 43516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 43616fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 43716fb89f9SDmitry Baryshkov }, 43816fb89f9SDmitry Baryshkov }; 43916fb89f9SDmitry Baryshkov 44016fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx2_link_clk_src = { 44116fb89f9SDmitry Baryshkov .cmd_rcgr = 0x826c, 44216fb89f9SDmitry Baryshkov .mnd_width = 0, 44316fb89f9SDmitry Baryshkov .hid_width = 5, 44416fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_3, 44516fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, 44616fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 44716fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_link_clk_src", 44816fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_3, 44916fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), 45016fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 45116fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 45216fb89f9SDmitry Baryshkov }, 45316fb89f9SDmitry Baryshkov }; 45416fb89f9SDmitry Baryshkov 45516fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx2_pixel0_clk_src = { 45616fb89f9SDmitry Baryshkov .cmd_rcgr = 0x828c, 45716fb89f9SDmitry Baryshkov .mnd_width = 16, 45816fb89f9SDmitry Baryshkov .hid_width = 5, 45916fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 46016fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 46116fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 46216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_pixel0_clk_src", 46316fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 46416fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 46516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 46616fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 46716fb89f9SDmitry Baryshkov }, 46816fb89f9SDmitry Baryshkov }; 46916fb89f9SDmitry Baryshkov 47016fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx2_pixel1_clk_src = { 47116fb89f9SDmitry Baryshkov .cmd_rcgr = 0x82a4, 47216fb89f9SDmitry Baryshkov .mnd_width = 16, 47316fb89f9SDmitry Baryshkov .hid_width = 5, 47416fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 47516fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 47616fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 47716fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_pixel1_clk_src", 47816fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 47916fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 48016fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 48116fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 48216fb89f9SDmitry Baryshkov }, 48316fb89f9SDmitry Baryshkov }; 48416fb89f9SDmitry Baryshkov 48516fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx3_aux_clk_src = { 48616fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8308, 48716fb89f9SDmitry Baryshkov .mnd_width = 0, 48816fb89f9SDmitry Baryshkov .hid_width = 5, 48916fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 49016fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 49116fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 49216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_aux_clk_src", 49316fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 49416fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 49516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 49616fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 49716fb89f9SDmitry Baryshkov }, 49816fb89f9SDmitry Baryshkov }; 49916fb89f9SDmitry Baryshkov 50016fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx3_link_clk_src = { 50116fb89f9SDmitry Baryshkov .cmd_rcgr = 0x82ec, 50216fb89f9SDmitry Baryshkov .mnd_width = 0, 50316fb89f9SDmitry Baryshkov .hid_width = 5, 50416fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_3, 50516fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, 50616fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 50716fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_link_clk_src", 50816fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_3, 50916fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), 51016fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 51116fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 51216fb89f9SDmitry Baryshkov }, 51316fb89f9SDmitry Baryshkov }; 51416fb89f9SDmitry Baryshkov 51516fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx3_pixel0_clk_src = { 51616fb89f9SDmitry Baryshkov .cmd_rcgr = 0x82d4, 51716fb89f9SDmitry Baryshkov .mnd_width = 16, 51816fb89f9SDmitry Baryshkov .hid_width = 5, 51916fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 52016fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 52116fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 52216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_pixel0_clk_src", 52316fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 52416fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 52516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 52616fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 52716fb89f9SDmitry Baryshkov }, 52816fb89f9SDmitry Baryshkov }; 52916fb89f9SDmitry Baryshkov 53016fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = { 53116fb89f9SDmitry Baryshkov .cmd_rcgr = 0x816c, 53216fb89f9SDmitry Baryshkov .mnd_width = 0, 53316fb89f9SDmitry Baryshkov .hid_width = 5, 53416fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_4, 53516fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 53616fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 53716fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_esc0_clk_src", 53816fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_4, 53916fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_4), 54016fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 54116fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 54216fb89f9SDmitry Baryshkov }, 54316fb89f9SDmitry Baryshkov }; 54416fb89f9SDmitry Baryshkov 54516fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = { 54616fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8184, 54716fb89f9SDmitry Baryshkov .mnd_width = 0, 54816fb89f9SDmitry Baryshkov .hid_width = 5, 54916fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_4, 55016fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 55116fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 55216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_esc1_clk_src", 55316fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_4, 55416fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_4), 55516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 55616fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 55716fb89f9SDmitry Baryshkov }, 55816fb89f9SDmitry Baryshkov }; 55916fb89f9SDmitry Baryshkov 56016fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_mdp_clk_src[] = { 56116fb89f9SDmitry Baryshkov F(19200000, P_BI_TCXO, 1, 0, 0), 56216fb89f9SDmitry Baryshkov F(85714286, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 56316fb89f9SDmitry Baryshkov F(100000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 56416fb89f9SDmitry Baryshkov F(150000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 56516fb89f9SDmitry Baryshkov F(172000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 56616fb89f9SDmitry Baryshkov F(200000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 56716fb89f9SDmitry Baryshkov F(325000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 56816fb89f9SDmitry Baryshkov F(375000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 56916fb89f9SDmitry Baryshkov F(500000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 57016fb89f9SDmitry Baryshkov { } 57116fb89f9SDmitry Baryshkov }; 57216fb89f9SDmitry Baryshkov 57316fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { 57416fb89f9SDmitry Baryshkov .cmd_rcgr = 0x80ec, 57516fb89f9SDmitry Baryshkov .mnd_width = 0, 57616fb89f9SDmitry Baryshkov .hid_width = 5, 57716fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_5, 57816fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src, 57916fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 58016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp_clk_src", 58116fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_5, 58216fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_5), 58316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 58416fb89f9SDmitry Baryshkov .ops = &clk_rcg2_shared_ops, 58516fb89f9SDmitry Baryshkov }, 58616fb89f9SDmitry Baryshkov }; 58716fb89f9SDmitry Baryshkov 58816fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = { 58916fb89f9SDmitry Baryshkov .cmd_rcgr = 0x80bc, 59016fb89f9SDmitry Baryshkov .mnd_width = 8, 59116fb89f9SDmitry Baryshkov .hid_width = 5, 59216fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_2, 59316fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 59416fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 59516fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_pclk0_clk_src", 59616fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_2, 59716fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_2), 59816fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 59916fb89f9SDmitry Baryshkov .ops = &clk_pixel_ops, 60016fb89f9SDmitry Baryshkov }, 60116fb89f9SDmitry Baryshkov }; 60216fb89f9SDmitry Baryshkov 60316fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { 60416fb89f9SDmitry Baryshkov .cmd_rcgr = 0x80d4, 60516fb89f9SDmitry Baryshkov .mnd_width = 8, 60616fb89f9SDmitry Baryshkov .hid_width = 5, 60716fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_2, 60816fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 60916fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 61016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_pclk1_clk_src", 61116fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_2, 61216fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_2), 61316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 61416fb89f9SDmitry Baryshkov .ops = &clk_pixel_ops, 61516fb89f9SDmitry Baryshkov }, 61616fb89f9SDmitry Baryshkov }; 61716fb89f9SDmitry Baryshkov 61816fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_rot_clk_src[] = { 61916fb89f9SDmitry Baryshkov F(19200000, P_BI_TCXO, 1, 0, 0), 62016fb89f9SDmitry Baryshkov F(150000000, P_DISP_CC_PLL1_OUT_MAIN, 4, 0, 0), 62116fb89f9SDmitry Baryshkov F(200000000, P_DISP_CC_PLL1_OUT_MAIN, 3, 0, 0), 62216fb89f9SDmitry Baryshkov F(300000000, P_DISP_CC_PLL1_OUT_MAIN, 2, 0, 0), 62316fb89f9SDmitry Baryshkov { } 62416fb89f9SDmitry Baryshkov }; 62516fb89f9SDmitry Baryshkov 62616fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { 62716fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8104, 62816fb89f9SDmitry Baryshkov .mnd_width = 0, 62916fb89f9SDmitry Baryshkov .hid_width = 5, 63016fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_5, 63116fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_rot_clk_src, 63216fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 63316fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rot_clk_src", 63416fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_5, 63516fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_5), 63616fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 63716fb89f9SDmitry Baryshkov .ops = &clk_rcg2_shared_ops, 63816fb89f9SDmitry Baryshkov }, 63916fb89f9SDmitry Baryshkov }; 64016fb89f9SDmitry Baryshkov 64116fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = { 64216fb89f9SDmitry Baryshkov .cmd_rcgr = 0x811c, 64316fb89f9SDmitry Baryshkov .mnd_width = 0, 64416fb89f9SDmitry Baryshkov .hid_width = 5, 64516fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 64616fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 64716fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 64816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_vsync_clk_src", 64916fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 65016fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 65116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 65216fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 65316fb89f9SDmitry Baryshkov }, 65416fb89f9SDmitry Baryshkov }; 65516fb89f9SDmitry Baryshkov 65616fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_sleep_clk_src[] = { 65716fb89f9SDmitry Baryshkov F(32000, P_SLEEP_CLK, 1, 0, 0), 65816fb89f9SDmitry Baryshkov { } 65916fb89f9SDmitry Baryshkov }; 66016fb89f9SDmitry Baryshkov 66116fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_sleep_clk_src = { 66216fb89f9SDmitry Baryshkov .cmd_rcgr = 0xe060, 66316fb89f9SDmitry Baryshkov .mnd_width = 0, 66416fb89f9SDmitry Baryshkov .hid_width = 5, 66516fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_7, 66616fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_sleep_clk_src, 66716fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 66816fb89f9SDmitry Baryshkov .name = "disp_cc_sleep_clk_src", 66916fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_7, 67016fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_7), 67116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 67216fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 67316fb89f9SDmitry Baryshkov }, 67416fb89f9SDmitry Baryshkov }; 67516fb89f9SDmitry Baryshkov 67616fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_xo_clk_src = { 67716fb89f9SDmitry Baryshkov .cmd_rcgr = 0xe044, 67816fb89f9SDmitry Baryshkov .mnd_width = 0, 67916fb89f9SDmitry Baryshkov .hid_width = 5, 68016fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 68116fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 68216fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 68316fb89f9SDmitry Baryshkov .name = "disp_cc_xo_clk_src", 68416fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1_ao, 68516fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1_ao), 68616fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 68716fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 68816fb89f9SDmitry Baryshkov }, 68916fb89f9SDmitry Baryshkov }; 69016fb89f9SDmitry Baryshkov 69116fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = { 69216fb89f9SDmitry Baryshkov .reg = 0x814c, 69316fb89f9SDmitry Baryshkov .shift = 0, 69416fb89f9SDmitry Baryshkov .width = 4, 69516fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 69616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte0_div_clk_src", 6975c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 6985c0df30cSDmitry Baryshkov &disp_cc_mdss_byte0_clk_src.clkr.hw, 69916fb89f9SDmitry Baryshkov }, 70016fb89f9SDmitry Baryshkov .num_parents = 1, 70116fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ops, 70216fb89f9SDmitry Baryshkov }, 70316fb89f9SDmitry Baryshkov }; 70416fb89f9SDmitry Baryshkov 70516fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_byte1_div_clk_src = { 70616fb89f9SDmitry Baryshkov .reg = 0x8168, 70716fb89f9SDmitry Baryshkov .shift = 0, 70816fb89f9SDmitry Baryshkov .width = 4, 70916fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 71016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte1_div_clk_src", 7115c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 7125c0df30cSDmitry Baryshkov &disp_cc_mdss_byte1_clk_src.clkr.hw, 71316fb89f9SDmitry Baryshkov }, 71416fb89f9SDmitry Baryshkov .num_parents = 1, 71516fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ops, 71616fb89f9SDmitry Baryshkov }, 71716fb89f9SDmitry Baryshkov }; 71816fb89f9SDmitry Baryshkov 71916fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_dptx0_link_div_clk_src = { 72016fb89f9SDmitry Baryshkov .reg = 0x81b4, 72116fb89f9SDmitry Baryshkov .shift = 0, 72216fb89f9SDmitry Baryshkov .width = 4, 72316fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 72416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_link_div_clk_src", 7255c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 7265c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx0_link_clk_src.clkr.hw, 72716fb89f9SDmitry Baryshkov }, 72816fb89f9SDmitry Baryshkov .num_parents = 1, 72916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 73016fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ro_ops, 73116fb89f9SDmitry Baryshkov }, 73216fb89f9SDmitry Baryshkov }; 73316fb89f9SDmitry Baryshkov 73416fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_dptx1_link_div_clk_src = { 73516fb89f9SDmitry Baryshkov .reg = 0x824c, 73616fb89f9SDmitry Baryshkov .shift = 0, 73716fb89f9SDmitry Baryshkov .width = 4, 73816fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 73916fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_link_div_clk_src", 7405c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 7415c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx1_link_clk_src.clkr.hw, 74216fb89f9SDmitry Baryshkov }, 74316fb89f9SDmitry Baryshkov .num_parents = 1, 74416fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 74516fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ro_ops, 74616fb89f9SDmitry Baryshkov }, 74716fb89f9SDmitry Baryshkov }; 74816fb89f9SDmitry Baryshkov 74916fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_dptx2_link_div_clk_src = { 75016fb89f9SDmitry Baryshkov .reg = 0x8284, 75116fb89f9SDmitry Baryshkov .shift = 0, 75216fb89f9SDmitry Baryshkov .width = 4, 75316fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 75416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_link_div_clk_src", 7555c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 7565c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx2_link_clk_src.clkr.hw, 75716fb89f9SDmitry Baryshkov }, 75816fb89f9SDmitry Baryshkov .num_parents = 1, 75916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 76016fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ro_ops, 76116fb89f9SDmitry Baryshkov }, 76216fb89f9SDmitry Baryshkov }; 76316fb89f9SDmitry Baryshkov 76416fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_dptx3_link_div_clk_src = { 76516fb89f9SDmitry Baryshkov .reg = 0x8304, 76616fb89f9SDmitry Baryshkov .shift = 0, 76716fb89f9SDmitry Baryshkov .width = 4, 76816fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 76916fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_link_div_clk_src", 7705c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 7715c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx3_link_clk_src.clkr.hw, 77216fb89f9SDmitry Baryshkov }, 77316fb89f9SDmitry Baryshkov .num_parents = 1, 77416fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 77516fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ro_ops, 77616fb89f9SDmitry Baryshkov }, 77716fb89f9SDmitry Baryshkov }; 77816fb89f9SDmitry Baryshkov 77916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_ahb1_clk = { 78016fb89f9SDmitry Baryshkov .halt_reg = 0xa020, 78116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 78216fb89f9SDmitry Baryshkov .clkr = { 78316fb89f9SDmitry Baryshkov .enable_reg = 0xa020, 78416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 78516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 78616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_ahb1_clk", 7875c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 7885c0df30cSDmitry Baryshkov &disp_cc_mdss_ahb_clk_src.clkr.hw, 78916fb89f9SDmitry Baryshkov }, 79016fb89f9SDmitry Baryshkov .num_parents = 1, 79116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 79216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 79316fb89f9SDmitry Baryshkov }, 79416fb89f9SDmitry Baryshkov }, 79516fb89f9SDmitry Baryshkov }; 79616fb89f9SDmitry Baryshkov 79716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_ahb_clk = { 79816fb89f9SDmitry Baryshkov .halt_reg = 0x80a4, 79916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 80016fb89f9SDmitry Baryshkov .clkr = { 80116fb89f9SDmitry Baryshkov .enable_reg = 0x80a4, 80216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 80316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 80416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_ahb_clk", 8055c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 8065c0df30cSDmitry Baryshkov &disp_cc_mdss_ahb_clk_src.clkr.hw, 80716fb89f9SDmitry Baryshkov }, 80816fb89f9SDmitry Baryshkov .num_parents = 1, 80916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 81016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 81116fb89f9SDmitry Baryshkov }, 81216fb89f9SDmitry Baryshkov }, 81316fb89f9SDmitry Baryshkov }; 81416fb89f9SDmitry Baryshkov 81516fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_byte0_clk = { 81616fb89f9SDmitry Baryshkov .halt_reg = 0x8028, 81716fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 81816fb89f9SDmitry Baryshkov .clkr = { 81916fb89f9SDmitry Baryshkov .enable_reg = 0x8028, 82016fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 82116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 82216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte0_clk", 8235c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 8245c0df30cSDmitry Baryshkov &disp_cc_mdss_byte0_clk_src.clkr.hw, 82516fb89f9SDmitry Baryshkov }, 82616fb89f9SDmitry Baryshkov .num_parents = 1, 82716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 82816fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 82916fb89f9SDmitry Baryshkov }, 83016fb89f9SDmitry Baryshkov }, 83116fb89f9SDmitry Baryshkov }; 83216fb89f9SDmitry Baryshkov 83316fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_byte0_intf_clk = { 83416fb89f9SDmitry Baryshkov .halt_reg = 0x802c, 83516fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 83616fb89f9SDmitry Baryshkov .clkr = { 83716fb89f9SDmitry Baryshkov .enable_reg = 0x802c, 83816fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 83916fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 84016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte0_intf_clk", 8415c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 8425c0df30cSDmitry Baryshkov &disp_cc_mdss_byte0_div_clk_src.clkr.hw, 84316fb89f9SDmitry Baryshkov }, 84416fb89f9SDmitry Baryshkov .num_parents = 1, 84516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 84616fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 84716fb89f9SDmitry Baryshkov }, 84816fb89f9SDmitry Baryshkov }, 84916fb89f9SDmitry Baryshkov }; 85016fb89f9SDmitry Baryshkov 85116fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_byte1_clk = { 85216fb89f9SDmitry Baryshkov .halt_reg = 0x8030, 85316fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 85416fb89f9SDmitry Baryshkov .clkr = { 85516fb89f9SDmitry Baryshkov .enable_reg = 0x8030, 85616fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 85716fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 85816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte1_clk", 8595c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 8605c0df30cSDmitry Baryshkov &disp_cc_mdss_byte1_clk_src.clkr.hw, 86116fb89f9SDmitry Baryshkov }, 86216fb89f9SDmitry Baryshkov .num_parents = 1, 86316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 86416fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 86516fb89f9SDmitry Baryshkov }, 86616fb89f9SDmitry Baryshkov }, 86716fb89f9SDmitry Baryshkov }; 86816fb89f9SDmitry Baryshkov 86916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_byte1_intf_clk = { 87016fb89f9SDmitry Baryshkov .halt_reg = 0x8034, 87116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 87216fb89f9SDmitry Baryshkov .clkr = { 87316fb89f9SDmitry Baryshkov .enable_reg = 0x8034, 87416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 87516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 87616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte1_intf_clk", 8775c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 8785c0df30cSDmitry Baryshkov &disp_cc_mdss_byte1_div_clk_src.clkr.hw, 87916fb89f9SDmitry Baryshkov }, 88016fb89f9SDmitry Baryshkov .num_parents = 1, 88116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 88216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 88316fb89f9SDmitry Baryshkov }, 88416fb89f9SDmitry Baryshkov }, 88516fb89f9SDmitry Baryshkov }; 88616fb89f9SDmitry Baryshkov 88716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_aux_clk = { 88816fb89f9SDmitry Baryshkov .halt_reg = 0x8058, 88916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 89016fb89f9SDmitry Baryshkov .clkr = { 89116fb89f9SDmitry Baryshkov .enable_reg = 0x8058, 89216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 89316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 89416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_aux_clk", 8955c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 8965c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx0_aux_clk_src.clkr.hw, 89716fb89f9SDmitry Baryshkov }, 89816fb89f9SDmitry Baryshkov .num_parents = 1, 89916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 90016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 90116fb89f9SDmitry Baryshkov }, 90216fb89f9SDmitry Baryshkov }, 90316fb89f9SDmitry Baryshkov }; 90416fb89f9SDmitry Baryshkov 90516fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_crypto_clk = { 90616fb89f9SDmitry Baryshkov .halt_reg = 0x804c, 90716fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 90816fb89f9SDmitry Baryshkov .clkr = { 90916fb89f9SDmitry Baryshkov .enable_reg = 0x804c, 91016fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 91116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 91216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_crypto_clk", 9135c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 9145c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx0_link_clk_src.clkr.hw, 91516fb89f9SDmitry Baryshkov }, 91616fb89f9SDmitry Baryshkov .num_parents = 1, 91716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 91816fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 91916fb89f9SDmitry Baryshkov }, 92016fb89f9SDmitry Baryshkov }, 92116fb89f9SDmitry Baryshkov }; 92216fb89f9SDmitry Baryshkov 92316fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_link_clk = { 92416fb89f9SDmitry Baryshkov .halt_reg = 0x8040, 92516fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 92616fb89f9SDmitry Baryshkov .clkr = { 92716fb89f9SDmitry Baryshkov .enable_reg = 0x8040, 92816fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 92916fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 93016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_link_clk", 9315c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 9325c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx0_link_clk_src.clkr.hw, 93316fb89f9SDmitry Baryshkov }, 93416fb89f9SDmitry Baryshkov .num_parents = 1, 93516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 93616fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 93716fb89f9SDmitry Baryshkov }, 93816fb89f9SDmitry Baryshkov }, 93916fb89f9SDmitry Baryshkov }; 94016fb89f9SDmitry Baryshkov 94116fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_link_intf_clk = { 94216fb89f9SDmitry Baryshkov .halt_reg = 0x8048, 94316fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 94416fb89f9SDmitry Baryshkov .clkr = { 94516fb89f9SDmitry Baryshkov .enable_reg = 0x8048, 94616fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 94716fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 94816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_link_intf_clk", 9495c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 9505c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw, 95116fb89f9SDmitry Baryshkov }, 95216fb89f9SDmitry Baryshkov .num_parents = 1, 95316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 95416fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 95516fb89f9SDmitry Baryshkov }, 95616fb89f9SDmitry Baryshkov }, 95716fb89f9SDmitry Baryshkov }; 95816fb89f9SDmitry Baryshkov 95916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_pixel0_clk = { 96016fb89f9SDmitry Baryshkov .halt_reg = 0x8050, 96116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 96216fb89f9SDmitry Baryshkov .clkr = { 96316fb89f9SDmitry Baryshkov .enable_reg = 0x8050, 96416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 96516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 96616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_pixel0_clk", 9675c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 9685c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx0_pixel0_clk_src.clkr.hw, 96916fb89f9SDmitry Baryshkov }, 97016fb89f9SDmitry Baryshkov .num_parents = 1, 97116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 97216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 97316fb89f9SDmitry Baryshkov }, 97416fb89f9SDmitry Baryshkov }, 97516fb89f9SDmitry Baryshkov }; 97616fb89f9SDmitry Baryshkov 97716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_pixel1_clk = { 97816fb89f9SDmitry Baryshkov .halt_reg = 0x8054, 97916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 98016fb89f9SDmitry Baryshkov .clkr = { 98116fb89f9SDmitry Baryshkov .enable_reg = 0x8054, 98216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 98316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 98416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_pixel1_clk", 9855c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 9865c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx0_pixel1_clk_src.clkr.hw, 98716fb89f9SDmitry Baryshkov }, 98816fb89f9SDmitry Baryshkov .num_parents = 1, 98916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 99016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 99116fb89f9SDmitry Baryshkov }, 99216fb89f9SDmitry Baryshkov }, 99316fb89f9SDmitry Baryshkov }; 99416fb89f9SDmitry Baryshkov 99516fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_usb_router_link_intf_clk = { 99616fb89f9SDmitry Baryshkov .halt_reg = 0x8044, 99716fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 99816fb89f9SDmitry Baryshkov .clkr = { 99916fb89f9SDmitry Baryshkov .enable_reg = 0x8044, 100016fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 100116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 100216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_usb_router_link_intf_clk", 10035c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 10045c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw, 100516fb89f9SDmitry Baryshkov }, 100616fb89f9SDmitry Baryshkov .num_parents = 1, 100716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 100816fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 100916fb89f9SDmitry Baryshkov }, 101016fb89f9SDmitry Baryshkov }, 101116fb89f9SDmitry Baryshkov }; 101216fb89f9SDmitry Baryshkov 101316fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_aux_clk = { 101416fb89f9SDmitry Baryshkov .halt_reg = 0x8074, 101516fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 101616fb89f9SDmitry Baryshkov .clkr = { 101716fb89f9SDmitry Baryshkov .enable_reg = 0x8074, 101816fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 101916fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 102016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_aux_clk", 10215c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 10225c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx1_aux_clk_src.clkr.hw, 102316fb89f9SDmitry Baryshkov }, 102416fb89f9SDmitry Baryshkov .num_parents = 1, 102516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 102616fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 102716fb89f9SDmitry Baryshkov }, 102816fb89f9SDmitry Baryshkov }, 102916fb89f9SDmitry Baryshkov }; 103016fb89f9SDmitry Baryshkov 103116fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_crypto_clk = { 103216fb89f9SDmitry Baryshkov .halt_reg = 0x8070, 103316fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 103416fb89f9SDmitry Baryshkov .clkr = { 103516fb89f9SDmitry Baryshkov .enable_reg = 0x8070, 103616fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 103716fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 103816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_crypto_clk", 10395c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 10405c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx1_link_clk_src.clkr.hw, 104116fb89f9SDmitry Baryshkov }, 104216fb89f9SDmitry Baryshkov .num_parents = 1, 104316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 104416fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 104516fb89f9SDmitry Baryshkov }, 104616fb89f9SDmitry Baryshkov }, 104716fb89f9SDmitry Baryshkov }; 104816fb89f9SDmitry Baryshkov 104916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_link_clk = { 105016fb89f9SDmitry Baryshkov .halt_reg = 0x8064, 105116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 105216fb89f9SDmitry Baryshkov .clkr = { 105316fb89f9SDmitry Baryshkov .enable_reg = 0x8064, 105416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 105516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 105616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_link_clk", 10575c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 10585c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx1_link_clk_src.clkr.hw, 105916fb89f9SDmitry Baryshkov }, 106016fb89f9SDmitry Baryshkov .num_parents = 1, 106116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 106216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 106316fb89f9SDmitry Baryshkov }, 106416fb89f9SDmitry Baryshkov }, 106516fb89f9SDmitry Baryshkov }; 106616fb89f9SDmitry Baryshkov 106716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_link_intf_clk = { 106816fb89f9SDmitry Baryshkov .halt_reg = 0x806c, 106916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 107016fb89f9SDmitry Baryshkov .clkr = { 107116fb89f9SDmitry Baryshkov .enable_reg = 0x806c, 107216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 107316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 107416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_link_intf_clk", 10755c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 10765c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx1_link_div_clk_src.clkr.hw, 107716fb89f9SDmitry Baryshkov }, 107816fb89f9SDmitry Baryshkov .num_parents = 1, 107916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 108016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 108116fb89f9SDmitry Baryshkov }, 108216fb89f9SDmitry Baryshkov }, 108316fb89f9SDmitry Baryshkov }; 108416fb89f9SDmitry Baryshkov 108516fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_pixel0_clk = { 108616fb89f9SDmitry Baryshkov .halt_reg = 0x805c, 108716fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 108816fb89f9SDmitry Baryshkov .clkr = { 108916fb89f9SDmitry Baryshkov .enable_reg = 0x805c, 109016fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 109116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 109216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_pixel0_clk", 10935c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 10945c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx1_pixel0_clk_src.clkr.hw, 109516fb89f9SDmitry Baryshkov }, 109616fb89f9SDmitry Baryshkov .num_parents = 1, 109716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 109816fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 109916fb89f9SDmitry Baryshkov }, 110016fb89f9SDmitry Baryshkov }, 110116fb89f9SDmitry Baryshkov }; 110216fb89f9SDmitry Baryshkov 110316fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_pixel1_clk = { 110416fb89f9SDmitry Baryshkov .halt_reg = 0x8060, 110516fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 110616fb89f9SDmitry Baryshkov .clkr = { 110716fb89f9SDmitry Baryshkov .enable_reg = 0x8060, 110816fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 110916fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 111016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_pixel1_clk", 11115c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 11125c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx1_pixel1_clk_src.clkr.hw, 111316fb89f9SDmitry Baryshkov }, 111416fb89f9SDmitry Baryshkov .num_parents = 1, 111516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 111616fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 111716fb89f9SDmitry Baryshkov }, 111816fb89f9SDmitry Baryshkov }, 111916fb89f9SDmitry Baryshkov }; 112016fb89f9SDmitry Baryshkov 112116fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_usb_router_link_intf_clk = { 112216fb89f9SDmitry Baryshkov .halt_reg = 0x8068, 112316fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 112416fb89f9SDmitry Baryshkov .clkr = { 112516fb89f9SDmitry Baryshkov .enable_reg = 0x8068, 112616fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 112716fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 112816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_usb_router_link_intf_clk", 11295c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 11305c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw, 113116fb89f9SDmitry Baryshkov }, 113216fb89f9SDmitry Baryshkov .num_parents = 1, 113316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 113416fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 113516fb89f9SDmitry Baryshkov }, 113616fb89f9SDmitry Baryshkov }, 113716fb89f9SDmitry Baryshkov }; 113816fb89f9SDmitry Baryshkov 113916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_aux_clk = { 114016fb89f9SDmitry Baryshkov .halt_reg = 0x808c, 114116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 114216fb89f9SDmitry Baryshkov .clkr = { 114316fb89f9SDmitry Baryshkov .enable_reg = 0x808c, 114416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 114516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 114616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_aux_clk", 11475c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 11485c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx2_aux_clk_src.clkr.hw, 114916fb89f9SDmitry Baryshkov }, 115016fb89f9SDmitry Baryshkov .num_parents = 1, 115116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 115216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 115316fb89f9SDmitry Baryshkov }, 115416fb89f9SDmitry Baryshkov }, 115516fb89f9SDmitry Baryshkov }; 115616fb89f9SDmitry Baryshkov 115716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_crypto_clk = { 115816fb89f9SDmitry Baryshkov .halt_reg = 0x8088, 115916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 116016fb89f9SDmitry Baryshkov .clkr = { 116116fb89f9SDmitry Baryshkov .enable_reg = 0x8088, 116216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 116316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 116416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_crypto_clk", 11655c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 11665c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx2_link_clk_src.clkr.hw, 116716fb89f9SDmitry Baryshkov }, 116816fb89f9SDmitry Baryshkov .num_parents = 1, 116916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 117016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 117116fb89f9SDmitry Baryshkov }, 117216fb89f9SDmitry Baryshkov }, 117316fb89f9SDmitry Baryshkov }; 117416fb89f9SDmitry Baryshkov 117516fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_link_clk = { 117616fb89f9SDmitry Baryshkov .halt_reg = 0x8080, 117716fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 117816fb89f9SDmitry Baryshkov .clkr = { 117916fb89f9SDmitry Baryshkov .enable_reg = 0x8080, 118016fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 118116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 118216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_link_clk", 11835c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 11845c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx2_link_clk_src.clkr.hw, 118516fb89f9SDmitry Baryshkov }, 118616fb89f9SDmitry Baryshkov .num_parents = 1, 118716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 118816fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 118916fb89f9SDmitry Baryshkov }, 119016fb89f9SDmitry Baryshkov }, 119116fb89f9SDmitry Baryshkov }; 119216fb89f9SDmitry Baryshkov 119316fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_link_intf_clk = { 119416fb89f9SDmitry Baryshkov .halt_reg = 0x8084, 119516fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 119616fb89f9SDmitry Baryshkov .clkr = { 119716fb89f9SDmitry Baryshkov .enable_reg = 0x8084, 119816fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 119916fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 120016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_link_intf_clk", 12015c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 12025c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx2_link_div_clk_src.clkr.hw, 120316fb89f9SDmitry Baryshkov }, 120416fb89f9SDmitry Baryshkov .num_parents = 1, 120516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 120616fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 120716fb89f9SDmitry Baryshkov }, 120816fb89f9SDmitry Baryshkov }, 120916fb89f9SDmitry Baryshkov }; 121016fb89f9SDmitry Baryshkov 121116fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_pixel0_clk = { 121216fb89f9SDmitry Baryshkov .halt_reg = 0x8078, 121316fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 121416fb89f9SDmitry Baryshkov .clkr = { 121516fb89f9SDmitry Baryshkov .enable_reg = 0x8078, 121616fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 121716fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 121816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_pixel0_clk", 12195c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 12205c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx2_pixel0_clk_src.clkr.hw, 122116fb89f9SDmitry Baryshkov }, 122216fb89f9SDmitry Baryshkov .num_parents = 1, 122316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 122416fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 122516fb89f9SDmitry Baryshkov }, 122616fb89f9SDmitry Baryshkov }, 122716fb89f9SDmitry Baryshkov }; 122816fb89f9SDmitry Baryshkov 122916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_pixel1_clk = { 123016fb89f9SDmitry Baryshkov .halt_reg = 0x807c, 123116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 123216fb89f9SDmitry Baryshkov .clkr = { 123316fb89f9SDmitry Baryshkov .enable_reg = 0x807c, 123416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 123516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 123616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_pixel1_clk", 12375c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 12385c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx2_pixel1_clk_src.clkr.hw, 123916fb89f9SDmitry Baryshkov }, 124016fb89f9SDmitry Baryshkov .num_parents = 1, 124116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 124216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 124316fb89f9SDmitry Baryshkov }, 124416fb89f9SDmitry Baryshkov }, 124516fb89f9SDmitry Baryshkov }; 124616fb89f9SDmitry Baryshkov 124716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_aux_clk = { 124816fb89f9SDmitry Baryshkov .halt_reg = 0x809c, 124916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 125016fb89f9SDmitry Baryshkov .clkr = { 125116fb89f9SDmitry Baryshkov .enable_reg = 0x809c, 125216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 125316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 125416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_aux_clk", 12555c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 12565c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx3_aux_clk_src.clkr.hw, 125716fb89f9SDmitry Baryshkov }, 125816fb89f9SDmitry Baryshkov .num_parents = 1, 125916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 126016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 126116fb89f9SDmitry Baryshkov }, 126216fb89f9SDmitry Baryshkov }, 126316fb89f9SDmitry Baryshkov }; 126416fb89f9SDmitry Baryshkov 126516fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_crypto_clk = { 126616fb89f9SDmitry Baryshkov .halt_reg = 0x80a0, 126716fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 126816fb89f9SDmitry Baryshkov .clkr = { 126916fb89f9SDmitry Baryshkov .enable_reg = 0x80a0, 127016fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 127116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 127216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_crypto_clk", 12735c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 12745c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx3_link_clk_src.clkr.hw, 127516fb89f9SDmitry Baryshkov }, 127616fb89f9SDmitry Baryshkov .num_parents = 1, 127716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 127816fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 127916fb89f9SDmitry Baryshkov }, 128016fb89f9SDmitry Baryshkov }, 128116fb89f9SDmitry Baryshkov }; 128216fb89f9SDmitry Baryshkov 128316fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_link_clk = { 128416fb89f9SDmitry Baryshkov .halt_reg = 0x8094, 128516fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 128616fb89f9SDmitry Baryshkov .clkr = { 128716fb89f9SDmitry Baryshkov .enable_reg = 0x8094, 128816fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 128916fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 129016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_link_clk", 12915c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 12925c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx3_link_clk_src.clkr.hw, 129316fb89f9SDmitry Baryshkov }, 129416fb89f9SDmitry Baryshkov .num_parents = 1, 129516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 129616fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 129716fb89f9SDmitry Baryshkov }, 129816fb89f9SDmitry Baryshkov }, 129916fb89f9SDmitry Baryshkov }; 130016fb89f9SDmitry Baryshkov 130116fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_link_intf_clk = { 130216fb89f9SDmitry Baryshkov .halt_reg = 0x8098, 130316fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 130416fb89f9SDmitry Baryshkov .clkr = { 130516fb89f9SDmitry Baryshkov .enable_reg = 0x8098, 130616fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 130716fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 130816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_link_intf_clk", 13095c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 13105c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx3_link_div_clk_src.clkr.hw, 131116fb89f9SDmitry Baryshkov }, 131216fb89f9SDmitry Baryshkov .num_parents = 1, 131316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 131416fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 131516fb89f9SDmitry Baryshkov }, 131616fb89f9SDmitry Baryshkov }, 131716fb89f9SDmitry Baryshkov }; 131816fb89f9SDmitry Baryshkov 131916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_pixel0_clk = { 132016fb89f9SDmitry Baryshkov .halt_reg = 0x8090, 132116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 132216fb89f9SDmitry Baryshkov .clkr = { 132316fb89f9SDmitry Baryshkov .enable_reg = 0x8090, 132416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 132516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 132616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_pixel0_clk", 13275c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 13285c0df30cSDmitry Baryshkov &disp_cc_mdss_dptx3_pixel0_clk_src.clkr.hw, 132916fb89f9SDmitry Baryshkov }, 133016fb89f9SDmitry Baryshkov .num_parents = 1, 133116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 133216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 133316fb89f9SDmitry Baryshkov }, 133416fb89f9SDmitry Baryshkov }, 133516fb89f9SDmitry Baryshkov }; 133616fb89f9SDmitry Baryshkov 133716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_esc0_clk = { 133816fb89f9SDmitry Baryshkov .halt_reg = 0x8038, 133916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 134016fb89f9SDmitry Baryshkov .clkr = { 134116fb89f9SDmitry Baryshkov .enable_reg = 0x8038, 134216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 134316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 134416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_esc0_clk", 13455c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 13465c0df30cSDmitry Baryshkov &disp_cc_mdss_esc0_clk_src.clkr.hw, 134716fb89f9SDmitry Baryshkov }, 134816fb89f9SDmitry Baryshkov .num_parents = 1, 134916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 135016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 135116fb89f9SDmitry Baryshkov }, 135216fb89f9SDmitry Baryshkov }, 135316fb89f9SDmitry Baryshkov }; 135416fb89f9SDmitry Baryshkov 135516fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_esc1_clk = { 135616fb89f9SDmitry Baryshkov .halt_reg = 0x803c, 135716fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 135816fb89f9SDmitry Baryshkov .clkr = { 135916fb89f9SDmitry Baryshkov .enable_reg = 0x803c, 136016fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 136116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 136216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_esc1_clk", 13635c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 13645c0df30cSDmitry Baryshkov &disp_cc_mdss_esc1_clk_src.clkr.hw, 136516fb89f9SDmitry Baryshkov }, 136616fb89f9SDmitry Baryshkov .num_parents = 1, 136716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 136816fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 136916fb89f9SDmitry Baryshkov }, 137016fb89f9SDmitry Baryshkov }, 137116fb89f9SDmitry Baryshkov }; 137216fb89f9SDmitry Baryshkov 137316fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_mdp1_clk = { 137416fb89f9SDmitry Baryshkov .halt_reg = 0xa004, 137516fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 137616fb89f9SDmitry Baryshkov .clkr = { 137716fb89f9SDmitry Baryshkov .enable_reg = 0xa004, 137816fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 137916fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 138016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp1_clk", 13815c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 13825c0df30cSDmitry Baryshkov &disp_cc_mdss_mdp_clk_src.clkr.hw, 138316fb89f9SDmitry Baryshkov }, 138416fb89f9SDmitry Baryshkov .num_parents = 1, 138516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 138616fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 138716fb89f9SDmitry Baryshkov }, 138816fb89f9SDmitry Baryshkov }, 138916fb89f9SDmitry Baryshkov }; 139016fb89f9SDmitry Baryshkov 139116fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_mdp_clk = { 139216fb89f9SDmitry Baryshkov .halt_reg = 0x800c, 139316fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 139416fb89f9SDmitry Baryshkov .clkr = { 139516fb89f9SDmitry Baryshkov .enable_reg = 0x800c, 139616fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 139716fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 139816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp_clk", 13995c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 14005c0df30cSDmitry Baryshkov &disp_cc_mdss_mdp_clk_src.clkr.hw, 140116fb89f9SDmitry Baryshkov }, 140216fb89f9SDmitry Baryshkov .num_parents = 1, 140316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 140416fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 140516fb89f9SDmitry Baryshkov }, 140616fb89f9SDmitry Baryshkov }, 140716fb89f9SDmitry Baryshkov }; 140816fb89f9SDmitry Baryshkov 140916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_mdp_lut1_clk = { 141016fb89f9SDmitry Baryshkov .halt_reg = 0xa014, 141116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 141216fb89f9SDmitry Baryshkov .clkr = { 141316fb89f9SDmitry Baryshkov .enable_reg = 0xa014, 141416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 141516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 141616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp_lut1_clk", 14175c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 14185c0df30cSDmitry Baryshkov &disp_cc_mdss_mdp_clk_src.clkr.hw, 141916fb89f9SDmitry Baryshkov }, 142016fb89f9SDmitry Baryshkov .num_parents = 1, 142116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 142216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 142316fb89f9SDmitry Baryshkov }, 142416fb89f9SDmitry Baryshkov }, 142516fb89f9SDmitry Baryshkov }; 142616fb89f9SDmitry Baryshkov 142716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_mdp_lut_clk = { 142816fb89f9SDmitry Baryshkov .halt_reg = 0x801c, 142916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT_VOTED, 143016fb89f9SDmitry Baryshkov .clkr = { 143116fb89f9SDmitry Baryshkov .enable_reg = 0x801c, 143216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 143316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 143416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp_lut_clk", 14355c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 14365c0df30cSDmitry Baryshkov &disp_cc_mdss_mdp_clk_src.clkr.hw, 143716fb89f9SDmitry Baryshkov }, 143816fb89f9SDmitry Baryshkov .num_parents = 1, 143916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 144016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 144116fb89f9SDmitry Baryshkov }, 144216fb89f9SDmitry Baryshkov }, 144316fb89f9SDmitry Baryshkov }; 144416fb89f9SDmitry Baryshkov 144516fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_non_gdsc_ahb_clk = { 144616fb89f9SDmitry Baryshkov .halt_reg = 0xc004, 144716fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT_VOTED, 144816fb89f9SDmitry Baryshkov .clkr = { 144916fb89f9SDmitry Baryshkov .enable_reg = 0xc004, 145016fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 145116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 145216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_non_gdsc_ahb_clk", 14535c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 14545c0df30cSDmitry Baryshkov &disp_cc_mdss_ahb_clk_src.clkr.hw, 145516fb89f9SDmitry Baryshkov }, 145616fb89f9SDmitry Baryshkov .num_parents = 1, 145716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 145816fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 145916fb89f9SDmitry Baryshkov }, 146016fb89f9SDmitry Baryshkov }, 146116fb89f9SDmitry Baryshkov }; 146216fb89f9SDmitry Baryshkov 146316fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_pclk0_clk = { 146416fb89f9SDmitry Baryshkov .halt_reg = 0x8004, 146516fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 146616fb89f9SDmitry Baryshkov .clkr = { 146716fb89f9SDmitry Baryshkov .enable_reg = 0x8004, 146816fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 146916fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 147016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_pclk0_clk", 14715c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 14725c0df30cSDmitry Baryshkov &disp_cc_mdss_pclk0_clk_src.clkr.hw, 147316fb89f9SDmitry Baryshkov }, 147416fb89f9SDmitry Baryshkov .num_parents = 1, 147516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 147616fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 147716fb89f9SDmitry Baryshkov }, 147816fb89f9SDmitry Baryshkov }, 147916fb89f9SDmitry Baryshkov }; 148016fb89f9SDmitry Baryshkov 148116fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_pclk1_clk = { 148216fb89f9SDmitry Baryshkov .halt_reg = 0x8008, 148316fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 148416fb89f9SDmitry Baryshkov .clkr = { 148516fb89f9SDmitry Baryshkov .enable_reg = 0x8008, 148616fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 148716fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 148816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_pclk1_clk", 14895c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 14905c0df30cSDmitry Baryshkov &disp_cc_mdss_pclk1_clk_src.clkr.hw, 149116fb89f9SDmitry Baryshkov }, 149216fb89f9SDmitry Baryshkov .num_parents = 1, 149316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 149416fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 149516fb89f9SDmitry Baryshkov }, 149616fb89f9SDmitry Baryshkov }, 149716fb89f9SDmitry Baryshkov }; 149816fb89f9SDmitry Baryshkov 149916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_rot1_clk = { 150016fb89f9SDmitry Baryshkov .halt_reg = 0xa00c, 150116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 150216fb89f9SDmitry Baryshkov .clkr = { 150316fb89f9SDmitry Baryshkov .enable_reg = 0xa00c, 150416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 150516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 150616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rot1_clk", 15075c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 15085c0df30cSDmitry Baryshkov &disp_cc_mdss_rot_clk_src.clkr.hw, 150916fb89f9SDmitry Baryshkov }, 151016fb89f9SDmitry Baryshkov .num_parents = 1, 151116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 151216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 151316fb89f9SDmitry Baryshkov }, 151416fb89f9SDmitry Baryshkov }, 151516fb89f9SDmitry Baryshkov }; 151616fb89f9SDmitry Baryshkov 151716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_rot_clk = { 151816fb89f9SDmitry Baryshkov .halt_reg = 0x8014, 151916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 152016fb89f9SDmitry Baryshkov .clkr = { 152116fb89f9SDmitry Baryshkov .enable_reg = 0x8014, 152216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 152316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 152416fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rot_clk", 15255c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 15265c0df30cSDmitry Baryshkov &disp_cc_mdss_rot_clk_src.clkr.hw, 152716fb89f9SDmitry Baryshkov }, 152816fb89f9SDmitry Baryshkov .num_parents = 1, 152916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 153016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 153116fb89f9SDmitry Baryshkov }, 153216fb89f9SDmitry Baryshkov }, 153316fb89f9SDmitry Baryshkov }; 153416fb89f9SDmitry Baryshkov 153516fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_rscc_ahb_clk = { 153616fb89f9SDmitry Baryshkov .halt_reg = 0xc00c, 153716fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 153816fb89f9SDmitry Baryshkov .clkr = { 153916fb89f9SDmitry Baryshkov .enable_reg = 0xc00c, 154016fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 154116fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 154216fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rscc_ahb_clk", 15435c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 15445c0df30cSDmitry Baryshkov &disp_cc_mdss_ahb_clk_src.clkr.hw, 154516fb89f9SDmitry Baryshkov }, 154616fb89f9SDmitry Baryshkov .num_parents = 1, 154716fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 154816fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 154916fb89f9SDmitry Baryshkov }, 155016fb89f9SDmitry Baryshkov }, 155116fb89f9SDmitry Baryshkov }; 155216fb89f9SDmitry Baryshkov 155316fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_rscc_vsync_clk = { 155416fb89f9SDmitry Baryshkov .halt_reg = 0xc008, 155516fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 155616fb89f9SDmitry Baryshkov .clkr = { 155716fb89f9SDmitry Baryshkov .enable_reg = 0xc008, 155816fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 155916fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 156016fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rscc_vsync_clk", 15615c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 15625c0df30cSDmitry Baryshkov &disp_cc_mdss_vsync_clk_src.clkr.hw, 156316fb89f9SDmitry Baryshkov }, 156416fb89f9SDmitry Baryshkov .num_parents = 1, 156516fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 156616fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 156716fb89f9SDmitry Baryshkov }, 156816fb89f9SDmitry Baryshkov }, 156916fb89f9SDmitry Baryshkov }; 157016fb89f9SDmitry Baryshkov 157116fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_vsync1_clk = { 157216fb89f9SDmitry Baryshkov .halt_reg = 0xa01c, 157316fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 157416fb89f9SDmitry Baryshkov .clkr = { 157516fb89f9SDmitry Baryshkov .enable_reg = 0xa01c, 157616fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 157716fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 157816fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_vsync1_clk", 15795c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 15805c0df30cSDmitry Baryshkov &disp_cc_mdss_vsync_clk_src.clkr.hw, 158116fb89f9SDmitry Baryshkov }, 158216fb89f9SDmitry Baryshkov .num_parents = 1, 158316fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 158416fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 158516fb89f9SDmitry Baryshkov }, 158616fb89f9SDmitry Baryshkov }, 158716fb89f9SDmitry Baryshkov }; 158816fb89f9SDmitry Baryshkov 158916fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_vsync_clk = { 159016fb89f9SDmitry Baryshkov .halt_reg = 0x8024, 159116fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 159216fb89f9SDmitry Baryshkov .clkr = { 159316fb89f9SDmitry Baryshkov .enable_reg = 0x8024, 159416fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 159516fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 159616fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_vsync_clk", 15975c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 15985c0df30cSDmitry Baryshkov &disp_cc_mdss_vsync_clk_src.clkr.hw, 159916fb89f9SDmitry Baryshkov }, 160016fb89f9SDmitry Baryshkov .num_parents = 1, 160116fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 160216fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 160316fb89f9SDmitry Baryshkov }, 160416fb89f9SDmitry Baryshkov }, 160516fb89f9SDmitry Baryshkov }; 160616fb89f9SDmitry Baryshkov 160716fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_sleep_clk = { 160816fb89f9SDmitry Baryshkov .halt_reg = 0xe078, 160916fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 161016fb89f9SDmitry Baryshkov .clkr = { 161116fb89f9SDmitry Baryshkov .enable_reg = 0xe078, 161216fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 161316fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 161416fb89f9SDmitry Baryshkov .name = "disp_cc_sleep_clk", 16155c0df30cSDmitry Baryshkov .parent_hws = (const struct clk_hw*[]) { 16165c0df30cSDmitry Baryshkov &disp_cc_sleep_clk_src.clkr.hw, 161716fb89f9SDmitry Baryshkov }, 161816fb89f9SDmitry Baryshkov .num_parents = 1, 161916fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 162016fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 162116fb89f9SDmitry Baryshkov }, 162216fb89f9SDmitry Baryshkov }, 162316fb89f9SDmitry Baryshkov }; 162416fb89f9SDmitry Baryshkov 162516fb89f9SDmitry Baryshkov static struct gdsc mdss_gdsc = { 162616fb89f9SDmitry Baryshkov .gdscr = 0x9000, 162716fb89f9SDmitry Baryshkov .pd = { 162816fb89f9SDmitry Baryshkov .name = "mdss_gdsc", 162916fb89f9SDmitry Baryshkov }, 163016fb89f9SDmitry Baryshkov .pwrsts = PWRSTS_OFF_ON, 163116fb89f9SDmitry Baryshkov .flags = HW_CTRL | RETAIN_FF_ENABLE, 163216fb89f9SDmitry Baryshkov }; 163316fb89f9SDmitry Baryshkov 163416fb89f9SDmitry Baryshkov static struct gdsc mdss_int2_gdsc = { 163516fb89f9SDmitry Baryshkov .gdscr = 0xb000, 163616fb89f9SDmitry Baryshkov .pd = { 163716fb89f9SDmitry Baryshkov .name = "mdss_int2_gdsc", 163816fb89f9SDmitry Baryshkov }, 163916fb89f9SDmitry Baryshkov .pwrsts = PWRSTS_OFF_ON, 164016fb89f9SDmitry Baryshkov .flags = HW_CTRL | RETAIN_FF_ENABLE, 164116fb89f9SDmitry Baryshkov }; 164216fb89f9SDmitry Baryshkov 164316fb89f9SDmitry Baryshkov static struct clk_regmap *disp_cc_sm8450_clocks[] = { 164416fb89f9SDmitry Baryshkov [DISP_CC_MDSS_AHB1_CLK] = &disp_cc_mdss_ahb1_clk.clkr, 164516fb89f9SDmitry Baryshkov [DISP_CC_MDSS_AHB_CLK] = &disp_cc_mdss_ahb_clk.clkr, 164616fb89f9SDmitry Baryshkov [DISP_CC_MDSS_AHB_CLK_SRC] = &disp_cc_mdss_ahb_clk_src.clkr, 164716fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr, 164816fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr, 164916fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr, 165016fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr, 165116fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr, 165216fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr, 165316fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE1_DIV_CLK_SRC] = &disp_cc_mdss_byte1_div_clk_src.clkr, 165416fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp_cc_mdss_byte1_intf_clk.clkr, 165516fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_AUX_CLK] = &disp_cc_mdss_dptx0_aux_clk.clkr, 165616fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_AUX_CLK_SRC] = &disp_cc_mdss_dptx0_aux_clk_src.clkr, 165716fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_CRYPTO_CLK] = &disp_cc_mdss_dptx0_crypto_clk.clkr, 165816fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_LINK_CLK] = &disp_cc_mdss_dptx0_link_clk.clkr, 165916fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_LINK_CLK_SRC] = &disp_cc_mdss_dptx0_link_clk_src.clkr, 166016fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_LINK_DIV_CLK_SRC] = &disp_cc_mdss_dptx0_link_div_clk_src.clkr, 166116fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_LINK_INTF_CLK] = &disp_cc_mdss_dptx0_link_intf_clk.clkr, 166216fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_PIXEL0_CLK] = &disp_cc_mdss_dptx0_pixel0_clk.clkr, 166316fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC] = &disp_cc_mdss_dptx0_pixel0_clk_src.clkr, 166416fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_PIXEL1_CLK] = &disp_cc_mdss_dptx0_pixel1_clk.clkr, 166516fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC] = &disp_cc_mdss_dptx0_pixel1_clk_src.clkr, 166616fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_USB_ROUTER_LINK_INTF_CLK] = 166716fb89f9SDmitry Baryshkov &disp_cc_mdss_dptx0_usb_router_link_intf_clk.clkr, 166816fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_AUX_CLK] = &disp_cc_mdss_dptx1_aux_clk.clkr, 166916fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_AUX_CLK_SRC] = &disp_cc_mdss_dptx1_aux_clk_src.clkr, 167016fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_CRYPTO_CLK] = &disp_cc_mdss_dptx1_crypto_clk.clkr, 167116fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_LINK_CLK] = &disp_cc_mdss_dptx1_link_clk.clkr, 167216fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_LINK_CLK_SRC] = &disp_cc_mdss_dptx1_link_clk_src.clkr, 167316fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_LINK_DIV_CLK_SRC] = &disp_cc_mdss_dptx1_link_div_clk_src.clkr, 167416fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_LINK_INTF_CLK] = &disp_cc_mdss_dptx1_link_intf_clk.clkr, 167516fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_PIXEL0_CLK] = &disp_cc_mdss_dptx1_pixel0_clk.clkr, 167616fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC] = &disp_cc_mdss_dptx1_pixel0_clk_src.clkr, 167716fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_PIXEL1_CLK] = &disp_cc_mdss_dptx1_pixel1_clk.clkr, 167816fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC] = &disp_cc_mdss_dptx1_pixel1_clk_src.clkr, 167916fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_USB_ROUTER_LINK_INTF_CLK] = 168016fb89f9SDmitry Baryshkov &disp_cc_mdss_dptx1_usb_router_link_intf_clk.clkr, 168116fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_AUX_CLK] = &disp_cc_mdss_dptx2_aux_clk.clkr, 168216fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_AUX_CLK_SRC] = &disp_cc_mdss_dptx2_aux_clk_src.clkr, 168316fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_CRYPTO_CLK] = &disp_cc_mdss_dptx2_crypto_clk.clkr, 168416fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_LINK_CLK] = &disp_cc_mdss_dptx2_link_clk.clkr, 168516fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_LINK_CLK_SRC] = &disp_cc_mdss_dptx2_link_clk_src.clkr, 168616fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_LINK_DIV_CLK_SRC] = &disp_cc_mdss_dptx2_link_div_clk_src.clkr, 168716fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_LINK_INTF_CLK] = &disp_cc_mdss_dptx2_link_intf_clk.clkr, 168816fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_PIXEL0_CLK] = &disp_cc_mdss_dptx2_pixel0_clk.clkr, 168916fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC] = &disp_cc_mdss_dptx2_pixel0_clk_src.clkr, 169016fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_PIXEL1_CLK] = &disp_cc_mdss_dptx2_pixel1_clk.clkr, 169116fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC] = &disp_cc_mdss_dptx2_pixel1_clk_src.clkr, 169216fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_AUX_CLK] = &disp_cc_mdss_dptx3_aux_clk.clkr, 169316fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_AUX_CLK_SRC] = &disp_cc_mdss_dptx3_aux_clk_src.clkr, 169416fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_CRYPTO_CLK] = &disp_cc_mdss_dptx3_crypto_clk.clkr, 169516fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_LINK_CLK] = &disp_cc_mdss_dptx3_link_clk.clkr, 169616fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_LINK_CLK_SRC] = &disp_cc_mdss_dptx3_link_clk_src.clkr, 169716fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_LINK_DIV_CLK_SRC] = &disp_cc_mdss_dptx3_link_div_clk_src.clkr, 169816fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_LINK_INTF_CLK] = &disp_cc_mdss_dptx3_link_intf_clk.clkr, 169916fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_PIXEL0_CLK] = &disp_cc_mdss_dptx3_pixel0_clk.clkr, 170016fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_PIXEL0_CLK_SRC] = &disp_cc_mdss_dptx3_pixel0_clk_src.clkr, 170116fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ESC0_CLK] = &disp_cc_mdss_esc0_clk.clkr, 170216fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr, 170316fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ESC1_CLK] = &disp_cc_mdss_esc1_clk.clkr, 170416fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ESC1_CLK_SRC] = &disp_cc_mdss_esc1_clk_src.clkr, 170516fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP1_CLK] = &disp_cc_mdss_mdp1_clk.clkr, 170616fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP_CLK] = &disp_cc_mdss_mdp_clk.clkr, 170716fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP_CLK_SRC] = &disp_cc_mdss_mdp_clk_src.clkr, 170816fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP_LUT1_CLK] = &disp_cc_mdss_mdp_lut1_clk.clkr, 170916fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP_LUT_CLK] = &disp_cc_mdss_mdp_lut_clk.clkr, 171016fb89f9SDmitry Baryshkov [DISP_CC_MDSS_NON_GDSC_AHB_CLK] = &disp_cc_mdss_non_gdsc_ahb_clk.clkr, 171116fb89f9SDmitry Baryshkov [DISP_CC_MDSS_PCLK0_CLK] = &disp_cc_mdss_pclk0_clk.clkr, 171216fb89f9SDmitry Baryshkov [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr, 171316fb89f9SDmitry Baryshkov [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr, 171416fb89f9SDmitry Baryshkov [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr, 171516fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ROT1_CLK] = &disp_cc_mdss_rot1_clk.clkr, 171616fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ROT_CLK] = &disp_cc_mdss_rot_clk.clkr, 171716fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ROT_CLK_SRC] = &disp_cc_mdss_rot_clk_src.clkr, 171816fb89f9SDmitry Baryshkov [DISP_CC_MDSS_RSCC_AHB_CLK] = &disp_cc_mdss_rscc_ahb_clk.clkr, 171916fb89f9SDmitry Baryshkov [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr, 172016fb89f9SDmitry Baryshkov [DISP_CC_MDSS_VSYNC1_CLK] = &disp_cc_mdss_vsync1_clk.clkr, 172116fb89f9SDmitry Baryshkov [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr, 172216fb89f9SDmitry Baryshkov [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr, 172316fb89f9SDmitry Baryshkov [DISP_CC_PLL0] = &disp_cc_pll0.clkr, 172416fb89f9SDmitry Baryshkov [DISP_CC_PLL1] = &disp_cc_pll1.clkr, 172516fb89f9SDmitry Baryshkov [DISP_CC_SLEEP_CLK] = &disp_cc_sleep_clk.clkr, 172616fb89f9SDmitry Baryshkov [DISP_CC_SLEEP_CLK_SRC] = &disp_cc_sleep_clk_src.clkr, 172716fb89f9SDmitry Baryshkov [DISP_CC_XO_CLK_SRC] = &disp_cc_xo_clk_src.clkr, 172816fb89f9SDmitry Baryshkov }; 172916fb89f9SDmitry Baryshkov 173016fb89f9SDmitry Baryshkov static const struct qcom_reset_map disp_cc_sm8450_resets[] = { 173116fb89f9SDmitry Baryshkov [DISP_CC_MDSS_CORE_BCR] = { 0x8000 }, 173216fb89f9SDmitry Baryshkov [DISP_CC_MDSS_CORE_INT2_BCR] = { 0xa000 }, 173316fb89f9SDmitry Baryshkov [DISP_CC_MDSS_RSCC_BCR] = { 0xc000 }, 173416fb89f9SDmitry Baryshkov }; 173516fb89f9SDmitry Baryshkov 173616fb89f9SDmitry Baryshkov static struct gdsc *disp_cc_sm8450_gdscs[] = { 173716fb89f9SDmitry Baryshkov [MDSS_GDSC] = &mdss_gdsc, 173816fb89f9SDmitry Baryshkov [MDSS_INT2_GDSC] = &mdss_int2_gdsc, 173916fb89f9SDmitry Baryshkov }; 174016fb89f9SDmitry Baryshkov 174116fb89f9SDmitry Baryshkov static const struct regmap_config disp_cc_sm8450_regmap_config = { 174216fb89f9SDmitry Baryshkov .reg_bits = 32, 174316fb89f9SDmitry Baryshkov .reg_stride = 4, 174416fb89f9SDmitry Baryshkov .val_bits = 32, 174516fb89f9SDmitry Baryshkov .max_register = 0x11008, 174616fb89f9SDmitry Baryshkov .fast_io = true, 174716fb89f9SDmitry Baryshkov }; 174816fb89f9SDmitry Baryshkov 174916fb89f9SDmitry Baryshkov static struct qcom_cc_desc disp_cc_sm8450_desc = { 175016fb89f9SDmitry Baryshkov .config = &disp_cc_sm8450_regmap_config, 175116fb89f9SDmitry Baryshkov .clks = disp_cc_sm8450_clocks, 175216fb89f9SDmitry Baryshkov .num_clks = ARRAY_SIZE(disp_cc_sm8450_clocks), 175316fb89f9SDmitry Baryshkov .resets = disp_cc_sm8450_resets, 175416fb89f9SDmitry Baryshkov .num_resets = ARRAY_SIZE(disp_cc_sm8450_resets), 175516fb89f9SDmitry Baryshkov .gdscs = disp_cc_sm8450_gdscs, 175616fb89f9SDmitry Baryshkov .num_gdscs = ARRAY_SIZE(disp_cc_sm8450_gdscs), 175716fb89f9SDmitry Baryshkov }; 175816fb89f9SDmitry Baryshkov 175916fb89f9SDmitry Baryshkov static const struct of_device_id disp_cc_sm8450_match_table[] = { 176016fb89f9SDmitry Baryshkov { .compatible = "qcom,sm8450-dispcc" }, 176116fb89f9SDmitry Baryshkov { } 176216fb89f9SDmitry Baryshkov }; 176316fb89f9SDmitry Baryshkov MODULE_DEVICE_TABLE(of, disp_cc_sm8450_match_table); 176416fb89f9SDmitry Baryshkov 176516fb89f9SDmitry Baryshkov static int disp_cc_sm8450_probe(struct platform_device *pdev) 176616fb89f9SDmitry Baryshkov { 176716fb89f9SDmitry Baryshkov struct regmap *regmap; 176816fb89f9SDmitry Baryshkov int ret; 176916fb89f9SDmitry Baryshkov 1770b69069c3SDmitry Baryshkov ret = devm_pm_runtime_enable(&pdev->dev); 177116fb89f9SDmitry Baryshkov if (ret) 177216fb89f9SDmitry Baryshkov return ret; 177316fb89f9SDmitry Baryshkov 177416fb89f9SDmitry Baryshkov ret = pm_runtime_resume_and_get(&pdev->dev); 177516fb89f9SDmitry Baryshkov if (ret) 177616fb89f9SDmitry Baryshkov return ret; 177716fb89f9SDmitry Baryshkov 177816fb89f9SDmitry Baryshkov regmap = qcom_cc_map(pdev, &disp_cc_sm8450_desc); 177916fb89f9SDmitry Baryshkov if (IS_ERR(regmap)) 178016fb89f9SDmitry Baryshkov return PTR_ERR(regmap); 178116fb89f9SDmitry Baryshkov 178216fb89f9SDmitry Baryshkov clk_lucid_evo_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); 178316fb89f9SDmitry Baryshkov clk_lucid_evo_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config); 178416fb89f9SDmitry Baryshkov 178516fb89f9SDmitry Baryshkov /* Enable clock gating for MDP clocks */ 178616fb89f9SDmitry Baryshkov regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10); 178716fb89f9SDmitry Baryshkov 178816fb89f9SDmitry Baryshkov /* 178916fb89f9SDmitry Baryshkov * Keep clocks always enabled: 179016fb89f9SDmitry Baryshkov * disp_cc_xo_clk 179116fb89f9SDmitry Baryshkov */ 179216fb89f9SDmitry Baryshkov regmap_update_bits(regmap, 0xe05c, BIT(0), BIT(0)); 179316fb89f9SDmitry Baryshkov 179416fb89f9SDmitry Baryshkov ret = qcom_cc_really_probe(pdev, &disp_cc_sm8450_desc, regmap); 179516fb89f9SDmitry Baryshkov 179616fb89f9SDmitry Baryshkov pm_runtime_put(&pdev->dev); 179716fb89f9SDmitry Baryshkov 179816fb89f9SDmitry Baryshkov return ret; 179916fb89f9SDmitry Baryshkov } 180016fb89f9SDmitry Baryshkov 180116fb89f9SDmitry Baryshkov static struct platform_driver disp_cc_sm8450_driver = { 180216fb89f9SDmitry Baryshkov .probe = disp_cc_sm8450_probe, 180316fb89f9SDmitry Baryshkov .driver = { 180416fb89f9SDmitry Baryshkov .name = "disp_cc-sm8450", 180516fb89f9SDmitry Baryshkov .of_match_table = disp_cc_sm8450_match_table, 180616fb89f9SDmitry Baryshkov }, 180716fb89f9SDmitry Baryshkov }; 180816fb89f9SDmitry Baryshkov 180916fb89f9SDmitry Baryshkov static int __init disp_cc_sm8450_init(void) 181016fb89f9SDmitry Baryshkov { 181116fb89f9SDmitry Baryshkov return platform_driver_register(&disp_cc_sm8450_driver); 181216fb89f9SDmitry Baryshkov } 181316fb89f9SDmitry Baryshkov subsys_initcall(disp_cc_sm8450_init); 181416fb89f9SDmitry Baryshkov 181516fb89f9SDmitry Baryshkov static void __exit disp_cc_sm8450_exit(void) 181616fb89f9SDmitry Baryshkov { 181716fb89f9SDmitry Baryshkov platform_driver_unregister(&disp_cc_sm8450_driver); 181816fb89f9SDmitry Baryshkov } 181916fb89f9SDmitry Baryshkov module_exit(disp_cc_sm8450_exit); 182016fb89f9SDmitry Baryshkov 182116fb89f9SDmitry Baryshkov MODULE_DESCRIPTION("QTI DISPCC SM8450 Driver"); 182216fb89f9SDmitry Baryshkov MODULE_LICENSE("GPL"); 1823