1*16fb89f9SDmitry Baryshkov // SPDX-License-Identifier: GPL-2.0-only 2*16fb89f9SDmitry Baryshkov /* 3*16fb89f9SDmitry Baryshkov * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. 4*16fb89f9SDmitry Baryshkov * Copyright (c) 2022, Linaro Ltd. 5*16fb89f9SDmitry Baryshkov */ 6*16fb89f9SDmitry Baryshkov 7*16fb89f9SDmitry Baryshkov #include <linux/clk.h> 8*16fb89f9SDmitry Baryshkov #include <linux/clk-provider.h> 9*16fb89f9SDmitry Baryshkov #include <linux/err.h> 10*16fb89f9SDmitry Baryshkov #include <linux/kernel.h> 11*16fb89f9SDmitry Baryshkov #include <linux/module.h> 12*16fb89f9SDmitry Baryshkov #include <linux/of_device.h> 13*16fb89f9SDmitry Baryshkov #include <linux/of.h> 14*16fb89f9SDmitry Baryshkov #include <linux/regmap.h> 15*16fb89f9SDmitry Baryshkov #include <linux/pm_runtime.h> 16*16fb89f9SDmitry Baryshkov 17*16fb89f9SDmitry Baryshkov #include <dt-bindings/clock/qcom,sm8450-dispcc.h> 18*16fb89f9SDmitry Baryshkov 19*16fb89f9SDmitry Baryshkov #include "common.h" 20*16fb89f9SDmitry Baryshkov #include "clk-alpha-pll.h" 21*16fb89f9SDmitry Baryshkov #include "clk-branch.h" 22*16fb89f9SDmitry Baryshkov #include "clk-pll.h" 23*16fb89f9SDmitry Baryshkov #include "clk-rcg.h" 24*16fb89f9SDmitry Baryshkov #include "clk-regmap.h" 25*16fb89f9SDmitry Baryshkov #include "clk-regmap-divider.h" 26*16fb89f9SDmitry Baryshkov #include "clk-regmap-mux.h" 27*16fb89f9SDmitry Baryshkov #include "reset.h" 28*16fb89f9SDmitry Baryshkov #include "gdsc.h" 29*16fb89f9SDmitry Baryshkov 30*16fb89f9SDmitry Baryshkov /* Need to match the order of clocks in DT binding */ 31*16fb89f9SDmitry Baryshkov enum { 32*16fb89f9SDmitry Baryshkov DT_BI_TCXO, 33*16fb89f9SDmitry Baryshkov DT_BI_TCXO_AO, 34*16fb89f9SDmitry Baryshkov DT_AHB_CLK, 35*16fb89f9SDmitry Baryshkov DT_SLEEP_CLK, 36*16fb89f9SDmitry Baryshkov 37*16fb89f9SDmitry Baryshkov DT_DSI0_PHY_PLL_OUT_BYTECLK, 38*16fb89f9SDmitry Baryshkov DT_DSI0_PHY_PLL_OUT_DSICLK, 39*16fb89f9SDmitry Baryshkov DT_DSI1_PHY_PLL_OUT_BYTECLK, 40*16fb89f9SDmitry Baryshkov DT_DSI1_PHY_PLL_OUT_DSICLK, 41*16fb89f9SDmitry Baryshkov 42*16fb89f9SDmitry Baryshkov DT_DP0_PHY_PLL_LINK_CLK, 43*16fb89f9SDmitry Baryshkov DT_DP0_PHY_PLL_VCO_DIV_CLK, 44*16fb89f9SDmitry Baryshkov DT_DP1_PHY_PLL_LINK_CLK, 45*16fb89f9SDmitry Baryshkov DT_DP1_PHY_PLL_VCO_DIV_CLK, 46*16fb89f9SDmitry Baryshkov DT_DP2_PHY_PLL_LINK_CLK, 47*16fb89f9SDmitry Baryshkov DT_DP2_PHY_PLL_VCO_DIV_CLK, 48*16fb89f9SDmitry Baryshkov DT_DP3_PHY_PLL_LINK_CLK, 49*16fb89f9SDmitry Baryshkov DT_DP3_PHY_PLL_VCO_DIV_CLK, 50*16fb89f9SDmitry Baryshkov }; 51*16fb89f9SDmitry Baryshkov 52*16fb89f9SDmitry Baryshkov #define DISP_CC_MISC_CMD 0xF000 53*16fb89f9SDmitry Baryshkov 54*16fb89f9SDmitry Baryshkov enum { 55*16fb89f9SDmitry Baryshkov P_BI_TCXO, 56*16fb89f9SDmitry Baryshkov P_DISP_CC_PLL0_OUT_MAIN, 57*16fb89f9SDmitry Baryshkov P_DISP_CC_PLL1_OUT_EVEN, 58*16fb89f9SDmitry Baryshkov P_DISP_CC_PLL1_OUT_MAIN, 59*16fb89f9SDmitry Baryshkov P_DP0_PHY_PLL_LINK_CLK, 60*16fb89f9SDmitry Baryshkov P_DP0_PHY_PLL_VCO_DIV_CLK, 61*16fb89f9SDmitry Baryshkov P_DP1_PHY_PLL_LINK_CLK, 62*16fb89f9SDmitry Baryshkov P_DP1_PHY_PLL_VCO_DIV_CLK, 63*16fb89f9SDmitry Baryshkov P_DP2_PHY_PLL_LINK_CLK, 64*16fb89f9SDmitry Baryshkov P_DP2_PHY_PLL_VCO_DIV_CLK, 65*16fb89f9SDmitry Baryshkov P_DP3_PHY_PLL_LINK_CLK, 66*16fb89f9SDmitry Baryshkov P_DP3_PHY_PLL_VCO_DIV_CLK, 67*16fb89f9SDmitry Baryshkov P_DSI0_PHY_PLL_OUT_BYTECLK, 68*16fb89f9SDmitry Baryshkov P_DSI0_PHY_PLL_OUT_DSICLK, 69*16fb89f9SDmitry Baryshkov P_DSI1_PHY_PLL_OUT_BYTECLK, 70*16fb89f9SDmitry Baryshkov P_DSI1_PHY_PLL_OUT_DSICLK, 71*16fb89f9SDmitry Baryshkov P_SLEEP_CLK, 72*16fb89f9SDmitry Baryshkov }; 73*16fb89f9SDmitry Baryshkov 74*16fb89f9SDmitry Baryshkov static struct pll_vco lucid_evo_vco[] = { 75*16fb89f9SDmitry Baryshkov { 249600000, 2000000000, 0 }, 76*16fb89f9SDmitry Baryshkov }; 77*16fb89f9SDmitry Baryshkov 78*16fb89f9SDmitry Baryshkov static const struct alpha_pll_config disp_cc_pll0_config = { 79*16fb89f9SDmitry Baryshkov .l = 0xD, 80*16fb89f9SDmitry Baryshkov .alpha = 0x6492, 81*16fb89f9SDmitry Baryshkov .config_ctl_val = 0x20485699, 82*16fb89f9SDmitry Baryshkov .config_ctl_hi_val = 0x00182261, 83*16fb89f9SDmitry Baryshkov .config_ctl_hi1_val = 0x32AA299C, 84*16fb89f9SDmitry Baryshkov .user_ctl_val = 0x00000000, 85*16fb89f9SDmitry Baryshkov .user_ctl_hi_val = 0x00000805, 86*16fb89f9SDmitry Baryshkov }; 87*16fb89f9SDmitry Baryshkov 88*16fb89f9SDmitry Baryshkov static struct clk_alpha_pll disp_cc_pll0 = { 89*16fb89f9SDmitry Baryshkov .offset = 0x0, 90*16fb89f9SDmitry Baryshkov .vco_table = lucid_evo_vco, 91*16fb89f9SDmitry Baryshkov .num_vco = ARRAY_SIZE(lucid_evo_vco), 92*16fb89f9SDmitry Baryshkov .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID_EVO], 93*16fb89f9SDmitry Baryshkov .clkr = { 94*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 95*16fb89f9SDmitry Baryshkov .name = "disp_cc_pll0", 96*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 97*16fb89f9SDmitry Baryshkov .index = DT_BI_TCXO, 98*16fb89f9SDmitry Baryshkov }, 99*16fb89f9SDmitry Baryshkov .num_parents = 1, 100*16fb89f9SDmitry Baryshkov .ops = &clk_alpha_pll_reset_lucid_evo_ops, 101*16fb89f9SDmitry Baryshkov }, 102*16fb89f9SDmitry Baryshkov }, 103*16fb89f9SDmitry Baryshkov }; 104*16fb89f9SDmitry Baryshkov 105*16fb89f9SDmitry Baryshkov static const struct alpha_pll_config disp_cc_pll1_config = { 106*16fb89f9SDmitry Baryshkov .l = 0x1F, 107*16fb89f9SDmitry Baryshkov .alpha = 0x4000, 108*16fb89f9SDmitry Baryshkov .config_ctl_val = 0x20485699, 109*16fb89f9SDmitry Baryshkov .config_ctl_hi_val = 0x00182261, 110*16fb89f9SDmitry Baryshkov .config_ctl_hi1_val = 0x32AA299C, 111*16fb89f9SDmitry Baryshkov .user_ctl_val = 0x00000000, 112*16fb89f9SDmitry Baryshkov .user_ctl_hi_val = 0x00000805, 113*16fb89f9SDmitry Baryshkov }; 114*16fb89f9SDmitry Baryshkov 115*16fb89f9SDmitry Baryshkov static struct clk_alpha_pll disp_cc_pll1 = { 116*16fb89f9SDmitry Baryshkov .offset = 0x1000, 117*16fb89f9SDmitry Baryshkov .vco_table = lucid_evo_vco, 118*16fb89f9SDmitry Baryshkov .num_vco = ARRAY_SIZE(lucid_evo_vco), 119*16fb89f9SDmitry Baryshkov .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID_EVO], 120*16fb89f9SDmitry Baryshkov .clkr = { 121*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 122*16fb89f9SDmitry Baryshkov .name = "disp_cc_pll1", 123*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 124*16fb89f9SDmitry Baryshkov .index = DT_BI_TCXO, 125*16fb89f9SDmitry Baryshkov }, 126*16fb89f9SDmitry Baryshkov .num_parents = 1, 127*16fb89f9SDmitry Baryshkov .ops = &clk_alpha_pll_reset_lucid_evo_ops, 128*16fb89f9SDmitry Baryshkov }, 129*16fb89f9SDmitry Baryshkov }, 130*16fb89f9SDmitry Baryshkov }; 131*16fb89f9SDmitry Baryshkov 132*16fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_0[] = { 133*16fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 134*16fb89f9SDmitry Baryshkov { P_DP0_PHY_PLL_LINK_CLK, 1 }, 135*16fb89f9SDmitry Baryshkov { P_DP0_PHY_PLL_VCO_DIV_CLK, 2 }, 136*16fb89f9SDmitry Baryshkov { P_DP3_PHY_PLL_VCO_DIV_CLK, 3 }, 137*16fb89f9SDmitry Baryshkov { P_DP1_PHY_PLL_VCO_DIV_CLK, 4 }, 138*16fb89f9SDmitry Baryshkov { P_DP2_PHY_PLL_VCO_DIV_CLK, 6 }, 139*16fb89f9SDmitry Baryshkov }; 140*16fb89f9SDmitry Baryshkov 141*16fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_0[] = { 142*16fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 143*16fb89f9SDmitry Baryshkov { .index = DT_DP0_PHY_PLL_LINK_CLK }, 144*16fb89f9SDmitry Baryshkov { .index = DT_DP0_PHY_PLL_VCO_DIV_CLK }, 145*16fb89f9SDmitry Baryshkov { .index = DT_DP3_PHY_PLL_VCO_DIV_CLK }, 146*16fb89f9SDmitry Baryshkov { .index = DT_DP1_PHY_PLL_VCO_DIV_CLK }, 147*16fb89f9SDmitry Baryshkov { .index = DT_DP2_PHY_PLL_VCO_DIV_CLK }, 148*16fb89f9SDmitry Baryshkov }; 149*16fb89f9SDmitry Baryshkov 150*16fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_1[] = { 151*16fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 152*16fb89f9SDmitry Baryshkov }; 153*16fb89f9SDmitry Baryshkov 154*16fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_1[] = { 155*16fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 156*16fb89f9SDmitry Baryshkov }; 157*16fb89f9SDmitry Baryshkov 158*16fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_1_ao[] = { 159*16fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO_AO }, 160*16fb89f9SDmitry Baryshkov }; 161*16fb89f9SDmitry Baryshkov 162*16fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_2[] = { 163*16fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 164*16fb89f9SDmitry Baryshkov { P_DSI0_PHY_PLL_OUT_DSICLK, 1 }, 165*16fb89f9SDmitry Baryshkov { P_DSI0_PHY_PLL_OUT_BYTECLK, 2 }, 166*16fb89f9SDmitry Baryshkov { P_DSI1_PHY_PLL_OUT_DSICLK, 3 }, 167*16fb89f9SDmitry Baryshkov { P_DSI1_PHY_PLL_OUT_BYTECLK, 4 }, 168*16fb89f9SDmitry Baryshkov }; 169*16fb89f9SDmitry Baryshkov 170*16fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_2[] = { 171*16fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 172*16fb89f9SDmitry Baryshkov { .index = DT_DSI0_PHY_PLL_OUT_DSICLK }, 173*16fb89f9SDmitry Baryshkov { .index = DT_DSI0_PHY_PLL_OUT_BYTECLK }, 174*16fb89f9SDmitry Baryshkov { .index = DT_DSI1_PHY_PLL_OUT_DSICLK }, 175*16fb89f9SDmitry Baryshkov { .index = DT_DSI1_PHY_PLL_OUT_BYTECLK }, 176*16fb89f9SDmitry Baryshkov }; 177*16fb89f9SDmitry Baryshkov 178*16fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_3[] = { 179*16fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 180*16fb89f9SDmitry Baryshkov { P_DP0_PHY_PLL_LINK_CLK, 1 }, 181*16fb89f9SDmitry Baryshkov { P_DP1_PHY_PLL_LINK_CLK, 2 }, 182*16fb89f9SDmitry Baryshkov { P_DP2_PHY_PLL_LINK_CLK, 3 }, 183*16fb89f9SDmitry Baryshkov { P_DP3_PHY_PLL_LINK_CLK, 4 }, 184*16fb89f9SDmitry Baryshkov }; 185*16fb89f9SDmitry Baryshkov 186*16fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_3[] = { 187*16fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 188*16fb89f9SDmitry Baryshkov { .index = DT_DP0_PHY_PLL_LINK_CLK }, 189*16fb89f9SDmitry Baryshkov { .index = DT_DP1_PHY_PLL_LINK_CLK }, 190*16fb89f9SDmitry Baryshkov { .index = DT_DP2_PHY_PLL_LINK_CLK }, 191*16fb89f9SDmitry Baryshkov { .index = DT_DP3_PHY_PLL_LINK_CLK }, 192*16fb89f9SDmitry Baryshkov }; 193*16fb89f9SDmitry Baryshkov 194*16fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_4[] = { 195*16fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 196*16fb89f9SDmitry Baryshkov { P_DSI0_PHY_PLL_OUT_BYTECLK, 2 }, 197*16fb89f9SDmitry Baryshkov { P_DSI1_PHY_PLL_OUT_BYTECLK, 4 }, 198*16fb89f9SDmitry Baryshkov }; 199*16fb89f9SDmitry Baryshkov 200*16fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_4[] = { 201*16fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 202*16fb89f9SDmitry Baryshkov { .index = DT_DSI0_PHY_PLL_OUT_BYTECLK }, 203*16fb89f9SDmitry Baryshkov { .index = DT_DSI1_PHY_PLL_OUT_BYTECLK }, 204*16fb89f9SDmitry Baryshkov }; 205*16fb89f9SDmitry Baryshkov 206*16fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_5[] = { 207*16fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 208*16fb89f9SDmitry Baryshkov { P_DISP_CC_PLL0_OUT_MAIN, 1 }, 209*16fb89f9SDmitry Baryshkov { P_DISP_CC_PLL1_OUT_MAIN, 4 }, 210*16fb89f9SDmitry Baryshkov { P_DISP_CC_PLL1_OUT_EVEN, 6 }, 211*16fb89f9SDmitry Baryshkov }; 212*16fb89f9SDmitry Baryshkov 213*16fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_5[] = { 214*16fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 215*16fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll0.clkr.hw }, 216*16fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll1.clkr.hw }, 217*16fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll1.clkr.hw }, 218*16fb89f9SDmitry Baryshkov }; 219*16fb89f9SDmitry Baryshkov 220*16fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_6[] = { 221*16fb89f9SDmitry Baryshkov { P_BI_TCXO, 0 }, 222*16fb89f9SDmitry Baryshkov { P_DISP_CC_PLL1_OUT_MAIN, 4 }, 223*16fb89f9SDmitry Baryshkov { P_DISP_CC_PLL1_OUT_EVEN, 6 }, 224*16fb89f9SDmitry Baryshkov }; 225*16fb89f9SDmitry Baryshkov 226*16fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_6[] = { 227*16fb89f9SDmitry Baryshkov { .index = DT_BI_TCXO }, 228*16fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll1.clkr.hw }, 229*16fb89f9SDmitry Baryshkov { .hw = &disp_cc_pll1.clkr.hw }, 230*16fb89f9SDmitry Baryshkov }; 231*16fb89f9SDmitry Baryshkov 232*16fb89f9SDmitry Baryshkov static const struct parent_map disp_cc_parent_map_7[] = { 233*16fb89f9SDmitry Baryshkov { P_SLEEP_CLK, 0 }, 234*16fb89f9SDmitry Baryshkov }; 235*16fb89f9SDmitry Baryshkov 236*16fb89f9SDmitry Baryshkov static const struct clk_parent_data disp_cc_parent_data_7[] = { 237*16fb89f9SDmitry Baryshkov { .index = DT_SLEEP_CLK }, 238*16fb89f9SDmitry Baryshkov }; 239*16fb89f9SDmitry Baryshkov 240*16fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_ahb_clk_src[] = { 241*16fb89f9SDmitry Baryshkov F(19200000, P_BI_TCXO, 1, 0, 0), 242*16fb89f9SDmitry Baryshkov F(37500000, P_DISP_CC_PLL1_OUT_MAIN, 16, 0, 0), 243*16fb89f9SDmitry Baryshkov F(75000000, P_DISP_CC_PLL1_OUT_MAIN, 8, 0, 0), 244*16fb89f9SDmitry Baryshkov { } 245*16fb89f9SDmitry Baryshkov }; 246*16fb89f9SDmitry Baryshkov 247*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_ahb_clk_src = { 248*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8324, 249*16fb89f9SDmitry Baryshkov .mnd_width = 0, 250*16fb89f9SDmitry Baryshkov .hid_width = 5, 251*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_6, 252*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_ahb_clk_src, 253*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 254*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_ahb_clk_src", 255*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_6, 256*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_6), 257*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 258*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_shared_ops, 259*16fb89f9SDmitry Baryshkov }, 260*16fb89f9SDmitry Baryshkov }; 261*16fb89f9SDmitry Baryshkov 262*16fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_byte0_clk_src[] = { 263*16fb89f9SDmitry Baryshkov F(19200000, P_BI_TCXO, 1, 0, 0), 264*16fb89f9SDmitry Baryshkov { } 265*16fb89f9SDmitry Baryshkov }; 266*16fb89f9SDmitry Baryshkov 267*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { 268*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8134, 269*16fb89f9SDmitry Baryshkov .mnd_width = 0, 270*16fb89f9SDmitry Baryshkov .hid_width = 5, 271*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_2, 272*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 273*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 274*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte0_clk_src", 275*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_2, 276*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_2), 277*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 278*16fb89f9SDmitry Baryshkov .ops = &clk_byte2_ops, 279*16fb89f9SDmitry Baryshkov }, 280*16fb89f9SDmitry Baryshkov }; 281*16fb89f9SDmitry Baryshkov 282*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { 283*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8150, 284*16fb89f9SDmitry Baryshkov .mnd_width = 0, 285*16fb89f9SDmitry Baryshkov .hid_width = 5, 286*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_2, 287*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 288*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 289*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte1_clk_src", 290*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_2, 291*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_2), 292*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 293*16fb89f9SDmitry Baryshkov .ops = &clk_byte2_ops, 294*16fb89f9SDmitry Baryshkov }, 295*16fb89f9SDmitry Baryshkov }; 296*16fb89f9SDmitry Baryshkov 297*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx0_aux_clk_src = { 298*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x81ec, 299*16fb89f9SDmitry Baryshkov .mnd_width = 0, 300*16fb89f9SDmitry Baryshkov .hid_width = 5, 301*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 302*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 303*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 304*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_aux_clk_src", 305*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 306*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 307*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 308*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 309*16fb89f9SDmitry Baryshkov }, 310*16fb89f9SDmitry Baryshkov }; 311*16fb89f9SDmitry Baryshkov 312*16fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_dptx0_link_clk_src[] = { 313*16fb89f9SDmitry Baryshkov F(162000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), 314*16fb89f9SDmitry Baryshkov F(270000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), 315*16fb89f9SDmitry Baryshkov F(540000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), 316*16fb89f9SDmitry Baryshkov F(810000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), 317*16fb89f9SDmitry Baryshkov { } 318*16fb89f9SDmitry Baryshkov }; 319*16fb89f9SDmitry Baryshkov 320*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx0_link_clk_src = { 321*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x819c, 322*16fb89f9SDmitry Baryshkov .mnd_width = 0, 323*16fb89f9SDmitry Baryshkov .hid_width = 5, 324*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_3, 325*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, 326*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 327*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_link_clk_src", 328*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_3, 329*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), 330*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 331*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 332*16fb89f9SDmitry Baryshkov }, 333*16fb89f9SDmitry Baryshkov }; 334*16fb89f9SDmitry Baryshkov 335*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx0_pixel0_clk_src = { 336*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x81bc, 337*16fb89f9SDmitry Baryshkov .mnd_width = 16, 338*16fb89f9SDmitry Baryshkov .hid_width = 5, 339*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 340*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 341*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 342*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_pixel0_clk_src", 343*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 344*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 345*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 346*16fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 347*16fb89f9SDmitry Baryshkov }, 348*16fb89f9SDmitry Baryshkov }; 349*16fb89f9SDmitry Baryshkov 350*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx0_pixel1_clk_src = { 351*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x81d4, 352*16fb89f9SDmitry Baryshkov .mnd_width = 16, 353*16fb89f9SDmitry Baryshkov .hid_width = 5, 354*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 355*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 356*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 357*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_pixel1_clk_src", 358*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 359*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 360*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 361*16fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 362*16fb89f9SDmitry Baryshkov }, 363*16fb89f9SDmitry Baryshkov }; 364*16fb89f9SDmitry Baryshkov 365*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx1_aux_clk_src = { 366*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8254, 367*16fb89f9SDmitry Baryshkov .mnd_width = 0, 368*16fb89f9SDmitry Baryshkov .hid_width = 5, 369*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 370*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 371*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 372*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_aux_clk_src", 373*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 374*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 375*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 376*16fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 377*16fb89f9SDmitry Baryshkov }, 378*16fb89f9SDmitry Baryshkov }; 379*16fb89f9SDmitry Baryshkov 380*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx1_link_clk_src = { 381*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8234, 382*16fb89f9SDmitry Baryshkov .mnd_width = 0, 383*16fb89f9SDmitry Baryshkov .hid_width = 5, 384*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_3, 385*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, 386*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 387*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_link_clk_src", 388*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_3, 389*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), 390*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 391*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 392*16fb89f9SDmitry Baryshkov }, 393*16fb89f9SDmitry Baryshkov }; 394*16fb89f9SDmitry Baryshkov 395*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx1_pixel0_clk_src = { 396*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8204, 397*16fb89f9SDmitry Baryshkov .mnd_width = 16, 398*16fb89f9SDmitry Baryshkov .hid_width = 5, 399*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 400*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 401*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 402*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_pixel0_clk_src", 403*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 404*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 405*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 406*16fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 407*16fb89f9SDmitry Baryshkov }, 408*16fb89f9SDmitry Baryshkov }; 409*16fb89f9SDmitry Baryshkov 410*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx1_pixel1_clk_src = { 411*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x821c, 412*16fb89f9SDmitry Baryshkov .mnd_width = 16, 413*16fb89f9SDmitry Baryshkov .hid_width = 5, 414*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 415*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 416*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 417*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_pixel1_clk_src", 418*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 419*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 420*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 421*16fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 422*16fb89f9SDmitry Baryshkov }, 423*16fb89f9SDmitry Baryshkov }; 424*16fb89f9SDmitry Baryshkov 425*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx2_aux_clk_src = { 426*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x82bc, 427*16fb89f9SDmitry Baryshkov .mnd_width = 0, 428*16fb89f9SDmitry Baryshkov .hid_width = 5, 429*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 430*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 431*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 432*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_aux_clk_src", 433*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 434*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 435*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 436*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 437*16fb89f9SDmitry Baryshkov }, 438*16fb89f9SDmitry Baryshkov }; 439*16fb89f9SDmitry Baryshkov 440*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx2_link_clk_src = { 441*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x826c, 442*16fb89f9SDmitry Baryshkov .mnd_width = 0, 443*16fb89f9SDmitry Baryshkov .hid_width = 5, 444*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_3, 445*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, 446*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 447*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_link_clk_src", 448*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_3, 449*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), 450*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 451*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 452*16fb89f9SDmitry Baryshkov }, 453*16fb89f9SDmitry Baryshkov }; 454*16fb89f9SDmitry Baryshkov 455*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx2_pixel0_clk_src = { 456*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x828c, 457*16fb89f9SDmitry Baryshkov .mnd_width = 16, 458*16fb89f9SDmitry Baryshkov .hid_width = 5, 459*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 460*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 461*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 462*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_pixel0_clk_src", 463*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 464*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 465*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 466*16fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 467*16fb89f9SDmitry Baryshkov }, 468*16fb89f9SDmitry Baryshkov }; 469*16fb89f9SDmitry Baryshkov 470*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx2_pixel1_clk_src = { 471*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x82a4, 472*16fb89f9SDmitry Baryshkov .mnd_width = 16, 473*16fb89f9SDmitry Baryshkov .hid_width = 5, 474*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 475*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 476*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 477*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_pixel1_clk_src", 478*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 479*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 480*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 481*16fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 482*16fb89f9SDmitry Baryshkov }, 483*16fb89f9SDmitry Baryshkov }; 484*16fb89f9SDmitry Baryshkov 485*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx3_aux_clk_src = { 486*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8308, 487*16fb89f9SDmitry Baryshkov .mnd_width = 0, 488*16fb89f9SDmitry Baryshkov .hid_width = 5, 489*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 490*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 491*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 492*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_aux_clk_src", 493*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 494*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 495*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 496*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 497*16fb89f9SDmitry Baryshkov }, 498*16fb89f9SDmitry Baryshkov }; 499*16fb89f9SDmitry Baryshkov 500*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx3_link_clk_src = { 501*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x82ec, 502*16fb89f9SDmitry Baryshkov .mnd_width = 0, 503*16fb89f9SDmitry Baryshkov .hid_width = 5, 504*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_3, 505*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, 506*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 507*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_link_clk_src", 508*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_3, 509*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), 510*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 511*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 512*16fb89f9SDmitry Baryshkov }, 513*16fb89f9SDmitry Baryshkov }; 514*16fb89f9SDmitry Baryshkov 515*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_dptx3_pixel0_clk_src = { 516*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x82d4, 517*16fb89f9SDmitry Baryshkov .mnd_width = 16, 518*16fb89f9SDmitry Baryshkov .hid_width = 5, 519*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_0, 520*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 521*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 522*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_pixel0_clk_src", 523*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_0, 524*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), 525*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 526*16fb89f9SDmitry Baryshkov .ops = &clk_dp_ops, 527*16fb89f9SDmitry Baryshkov }, 528*16fb89f9SDmitry Baryshkov }; 529*16fb89f9SDmitry Baryshkov 530*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = { 531*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x816c, 532*16fb89f9SDmitry Baryshkov .mnd_width = 0, 533*16fb89f9SDmitry Baryshkov .hid_width = 5, 534*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_4, 535*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 536*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 537*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_esc0_clk_src", 538*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_4, 539*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_4), 540*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 541*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 542*16fb89f9SDmitry Baryshkov }, 543*16fb89f9SDmitry Baryshkov }; 544*16fb89f9SDmitry Baryshkov 545*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = { 546*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8184, 547*16fb89f9SDmitry Baryshkov .mnd_width = 0, 548*16fb89f9SDmitry Baryshkov .hid_width = 5, 549*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_4, 550*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 551*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 552*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_esc1_clk_src", 553*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_4, 554*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_4), 555*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 556*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 557*16fb89f9SDmitry Baryshkov }, 558*16fb89f9SDmitry Baryshkov }; 559*16fb89f9SDmitry Baryshkov 560*16fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_mdp_clk_src[] = { 561*16fb89f9SDmitry Baryshkov F(19200000, P_BI_TCXO, 1, 0, 0), 562*16fb89f9SDmitry Baryshkov F(85714286, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 563*16fb89f9SDmitry Baryshkov F(100000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 564*16fb89f9SDmitry Baryshkov F(150000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 565*16fb89f9SDmitry Baryshkov F(172000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 566*16fb89f9SDmitry Baryshkov F(200000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 567*16fb89f9SDmitry Baryshkov F(325000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 568*16fb89f9SDmitry Baryshkov F(375000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 569*16fb89f9SDmitry Baryshkov F(500000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0), 570*16fb89f9SDmitry Baryshkov { } 571*16fb89f9SDmitry Baryshkov }; 572*16fb89f9SDmitry Baryshkov 573*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { 574*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x80ec, 575*16fb89f9SDmitry Baryshkov .mnd_width = 0, 576*16fb89f9SDmitry Baryshkov .hid_width = 5, 577*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_5, 578*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src, 579*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 580*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp_clk_src", 581*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_5, 582*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_5), 583*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 584*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_shared_ops, 585*16fb89f9SDmitry Baryshkov }, 586*16fb89f9SDmitry Baryshkov }; 587*16fb89f9SDmitry Baryshkov 588*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = { 589*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x80bc, 590*16fb89f9SDmitry Baryshkov .mnd_width = 8, 591*16fb89f9SDmitry Baryshkov .hid_width = 5, 592*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_2, 593*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 594*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 595*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_pclk0_clk_src", 596*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_2, 597*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_2), 598*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 599*16fb89f9SDmitry Baryshkov .ops = &clk_pixel_ops, 600*16fb89f9SDmitry Baryshkov }, 601*16fb89f9SDmitry Baryshkov }; 602*16fb89f9SDmitry Baryshkov 603*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { 604*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x80d4, 605*16fb89f9SDmitry Baryshkov .mnd_width = 8, 606*16fb89f9SDmitry Baryshkov .hid_width = 5, 607*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_2, 608*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 609*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 610*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_pclk1_clk_src", 611*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_2, 612*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_2), 613*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 614*16fb89f9SDmitry Baryshkov .ops = &clk_pixel_ops, 615*16fb89f9SDmitry Baryshkov }, 616*16fb89f9SDmitry Baryshkov }; 617*16fb89f9SDmitry Baryshkov 618*16fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_mdss_rot_clk_src[] = { 619*16fb89f9SDmitry Baryshkov F(19200000, P_BI_TCXO, 1, 0, 0), 620*16fb89f9SDmitry Baryshkov F(150000000, P_DISP_CC_PLL1_OUT_MAIN, 4, 0, 0), 621*16fb89f9SDmitry Baryshkov F(200000000, P_DISP_CC_PLL1_OUT_MAIN, 3, 0, 0), 622*16fb89f9SDmitry Baryshkov F(300000000, P_DISP_CC_PLL1_OUT_MAIN, 2, 0, 0), 623*16fb89f9SDmitry Baryshkov { } 624*16fb89f9SDmitry Baryshkov }; 625*16fb89f9SDmitry Baryshkov 626*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { 627*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x8104, 628*16fb89f9SDmitry Baryshkov .mnd_width = 0, 629*16fb89f9SDmitry Baryshkov .hid_width = 5, 630*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_5, 631*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_rot_clk_src, 632*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 633*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rot_clk_src", 634*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_5, 635*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_5), 636*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 637*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_shared_ops, 638*16fb89f9SDmitry Baryshkov }, 639*16fb89f9SDmitry Baryshkov }; 640*16fb89f9SDmitry Baryshkov 641*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = { 642*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0x811c, 643*16fb89f9SDmitry Baryshkov .mnd_width = 0, 644*16fb89f9SDmitry Baryshkov .hid_width = 5, 645*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 646*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 647*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 648*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_vsync_clk_src", 649*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1, 650*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), 651*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 652*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 653*16fb89f9SDmitry Baryshkov }, 654*16fb89f9SDmitry Baryshkov }; 655*16fb89f9SDmitry Baryshkov 656*16fb89f9SDmitry Baryshkov static const struct freq_tbl ftbl_disp_cc_sleep_clk_src[] = { 657*16fb89f9SDmitry Baryshkov F(32000, P_SLEEP_CLK, 1, 0, 0), 658*16fb89f9SDmitry Baryshkov { } 659*16fb89f9SDmitry Baryshkov }; 660*16fb89f9SDmitry Baryshkov 661*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_sleep_clk_src = { 662*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0xe060, 663*16fb89f9SDmitry Baryshkov .mnd_width = 0, 664*16fb89f9SDmitry Baryshkov .hid_width = 5, 665*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_7, 666*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_sleep_clk_src, 667*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 668*16fb89f9SDmitry Baryshkov .name = "disp_cc_sleep_clk_src", 669*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_7, 670*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_7), 671*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 672*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 673*16fb89f9SDmitry Baryshkov }, 674*16fb89f9SDmitry Baryshkov }; 675*16fb89f9SDmitry Baryshkov 676*16fb89f9SDmitry Baryshkov static struct clk_rcg2 disp_cc_xo_clk_src = { 677*16fb89f9SDmitry Baryshkov .cmd_rcgr = 0xe044, 678*16fb89f9SDmitry Baryshkov .mnd_width = 0, 679*16fb89f9SDmitry Baryshkov .hid_width = 5, 680*16fb89f9SDmitry Baryshkov .parent_map = disp_cc_parent_map_1, 681*16fb89f9SDmitry Baryshkov .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src, 682*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 683*16fb89f9SDmitry Baryshkov .name = "disp_cc_xo_clk_src", 684*16fb89f9SDmitry Baryshkov .parent_data = disp_cc_parent_data_1_ao, 685*16fb89f9SDmitry Baryshkov .num_parents = ARRAY_SIZE(disp_cc_parent_data_1_ao), 686*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 687*16fb89f9SDmitry Baryshkov .ops = &clk_rcg2_ops, 688*16fb89f9SDmitry Baryshkov }, 689*16fb89f9SDmitry Baryshkov }; 690*16fb89f9SDmitry Baryshkov 691*16fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = { 692*16fb89f9SDmitry Baryshkov .reg = 0x814c, 693*16fb89f9SDmitry Baryshkov .shift = 0, 694*16fb89f9SDmitry Baryshkov .width = 4, 695*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 696*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte0_div_clk_src", 697*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 698*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_byte0_clk_src.clkr.hw, 699*16fb89f9SDmitry Baryshkov }, 700*16fb89f9SDmitry Baryshkov .num_parents = 1, 701*16fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ops, 702*16fb89f9SDmitry Baryshkov }, 703*16fb89f9SDmitry Baryshkov }; 704*16fb89f9SDmitry Baryshkov 705*16fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_byte1_div_clk_src = { 706*16fb89f9SDmitry Baryshkov .reg = 0x8168, 707*16fb89f9SDmitry Baryshkov .shift = 0, 708*16fb89f9SDmitry Baryshkov .width = 4, 709*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 710*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte1_div_clk_src", 711*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 712*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_byte1_clk_src.clkr.hw, 713*16fb89f9SDmitry Baryshkov }, 714*16fb89f9SDmitry Baryshkov .num_parents = 1, 715*16fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ops, 716*16fb89f9SDmitry Baryshkov }, 717*16fb89f9SDmitry Baryshkov }; 718*16fb89f9SDmitry Baryshkov 719*16fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_dptx0_link_div_clk_src = { 720*16fb89f9SDmitry Baryshkov .reg = 0x81b4, 721*16fb89f9SDmitry Baryshkov .shift = 0, 722*16fb89f9SDmitry Baryshkov .width = 4, 723*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 724*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_link_div_clk_src", 725*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 726*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx0_link_clk_src.clkr.hw, 727*16fb89f9SDmitry Baryshkov }, 728*16fb89f9SDmitry Baryshkov .num_parents = 1, 729*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 730*16fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ro_ops, 731*16fb89f9SDmitry Baryshkov }, 732*16fb89f9SDmitry Baryshkov }; 733*16fb89f9SDmitry Baryshkov 734*16fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_dptx1_link_div_clk_src = { 735*16fb89f9SDmitry Baryshkov .reg = 0x824c, 736*16fb89f9SDmitry Baryshkov .shift = 0, 737*16fb89f9SDmitry Baryshkov .width = 4, 738*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 739*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_link_div_clk_src", 740*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 741*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx1_link_clk_src.clkr.hw, 742*16fb89f9SDmitry Baryshkov }, 743*16fb89f9SDmitry Baryshkov .num_parents = 1, 744*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 745*16fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ro_ops, 746*16fb89f9SDmitry Baryshkov }, 747*16fb89f9SDmitry Baryshkov }; 748*16fb89f9SDmitry Baryshkov 749*16fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_dptx2_link_div_clk_src = { 750*16fb89f9SDmitry Baryshkov .reg = 0x8284, 751*16fb89f9SDmitry Baryshkov .shift = 0, 752*16fb89f9SDmitry Baryshkov .width = 4, 753*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 754*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_link_div_clk_src", 755*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 756*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx2_link_clk_src.clkr.hw, 757*16fb89f9SDmitry Baryshkov }, 758*16fb89f9SDmitry Baryshkov .num_parents = 1, 759*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 760*16fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ro_ops, 761*16fb89f9SDmitry Baryshkov }, 762*16fb89f9SDmitry Baryshkov }; 763*16fb89f9SDmitry Baryshkov 764*16fb89f9SDmitry Baryshkov static struct clk_regmap_div disp_cc_mdss_dptx3_link_div_clk_src = { 765*16fb89f9SDmitry Baryshkov .reg = 0x8304, 766*16fb89f9SDmitry Baryshkov .shift = 0, 767*16fb89f9SDmitry Baryshkov .width = 4, 768*16fb89f9SDmitry Baryshkov .clkr.hw.init = &(struct clk_init_data) { 769*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_link_div_clk_src", 770*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 771*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx3_link_clk_src.clkr.hw, 772*16fb89f9SDmitry Baryshkov }, 773*16fb89f9SDmitry Baryshkov .num_parents = 1, 774*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 775*16fb89f9SDmitry Baryshkov .ops = &clk_regmap_div_ro_ops, 776*16fb89f9SDmitry Baryshkov }, 777*16fb89f9SDmitry Baryshkov }; 778*16fb89f9SDmitry Baryshkov 779*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_ahb1_clk = { 780*16fb89f9SDmitry Baryshkov .halt_reg = 0xa020, 781*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 782*16fb89f9SDmitry Baryshkov .clkr = { 783*16fb89f9SDmitry Baryshkov .enable_reg = 0xa020, 784*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 785*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 786*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_ahb1_clk", 787*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 788*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_ahb_clk_src.clkr.hw, 789*16fb89f9SDmitry Baryshkov }, 790*16fb89f9SDmitry Baryshkov .num_parents = 1, 791*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 792*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 793*16fb89f9SDmitry Baryshkov }, 794*16fb89f9SDmitry Baryshkov }, 795*16fb89f9SDmitry Baryshkov }; 796*16fb89f9SDmitry Baryshkov 797*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_ahb_clk = { 798*16fb89f9SDmitry Baryshkov .halt_reg = 0x80a4, 799*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 800*16fb89f9SDmitry Baryshkov .clkr = { 801*16fb89f9SDmitry Baryshkov .enable_reg = 0x80a4, 802*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 803*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 804*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_ahb_clk", 805*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 806*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_ahb_clk_src.clkr.hw, 807*16fb89f9SDmitry Baryshkov }, 808*16fb89f9SDmitry Baryshkov .num_parents = 1, 809*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 810*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 811*16fb89f9SDmitry Baryshkov }, 812*16fb89f9SDmitry Baryshkov }, 813*16fb89f9SDmitry Baryshkov }; 814*16fb89f9SDmitry Baryshkov 815*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_byte0_clk = { 816*16fb89f9SDmitry Baryshkov .halt_reg = 0x8028, 817*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 818*16fb89f9SDmitry Baryshkov .clkr = { 819*16fb89f9SDmitry Baryshkov .enable_reg = 0x8028, 820*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 821*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 822*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte0_clk", 823*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 824*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_byte0_clk_src.clkr.hw, 825*16fb89f9SDmitry Baryshkov }, 826*16fb89f9SDmitry Baryshkov .num_parents = 1, 827*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 828*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 829*16fb89f9SDmitry Baryshkov }, 830*16fb89f9SDmitry Baryshkov }, 831*16fb89f9SDmitry Baryshkov }; 832*16fb89f9SDmitry Baryshkov 833*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_byte0_intf_clk = { 834*16fb89f9SDmitry Baryshkov .halt_reg = 0x802c, 835*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 836*16fb89f9SDmitry Baryshkov .clkr = { 837*16fb89f9SDmitry Baryshkov .enable_reg = 0x802c, 838*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 839*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 840*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte0_intf_clk", 841*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 842*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_byte0_div_clk_src.clkr.hw, 843*16fb89f9SDmitry Baryshkov }, 844*16fb89f9SDmitry Baryshkov .num_parents = 1, 845*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 846*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 847*16fb89f9SDmitry Baryshkov }, 848*16fb89f9SDmitry Baryshkov }, 849*16fb89f9SDmitry Baryshkov }; 850*16fb89f9SDmitry Baryshkov 851*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_byte1_clk = { 852*16fb89f9SDmitry Baryshkov .halt_reg = 0x8030, 853*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 854*16fb89f9SDmitry Baryshkov .clkr = { 855*16fb89f9SDmitry Baryshkov .enable_reg = 0x8030, 856*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 857*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 858*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte1_clk", 859*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 860*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_byte1_clk_src.clkr.hw, 861*16fb89f9SDmitry Baryshkov }, 862*16fb89f9SDmitry Baryshkov .num_parents = 1, 863*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 864*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 865*16fb89f9SDmitry Baryshkov }, 866*16fb89f9SDmitry Baryshkov }, 867*16fb89f9SDmitry Baryshkov }; 868*16fb89f9SDmitry Baryshkov 869*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_byte1_intf_clk = { 870*16fb89f9SDmitry Baryshkov .halt_reg = 0x8034, 871*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 872*16fb89f9SDmitry Baryshkov .clkr = { 873*16fb89f9SDmitry Baryshkov .enable_reg = 0x8034, 874*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 875*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 876*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_byte1_intf_clk", 877*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 878*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_byte1_div_clk_src.clkr.hw, 879*16fb89f9SDmitry Baryshkov }, 880*16fb89f9SDmitry Baryshkov .num_parents = 1, 881*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 882*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 883*16fb89f9SDmitry Baryshkov }, 884*16fb89f9SDmitry Baryshkov }, 885*16fb89f9SDmitry Baryshkov }; 886*16fb89f9SDmitry Baryshkov 887*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_aux_clk = { 888*16fb89f9SDmitry Baryshkov .halt_reg = 0x8058, 889*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 890*16fb89f9SDmitry Baryshkov .clkr = { 891*16fb89f9SDmitry Baryshkov .enable_reg = 0x8058, 892*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 893*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 894*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_aux_clk", 895*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 896*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx0_aux_clk_src.clkr.hw, 897*16fb89f9SDmitry Baryshkov }, 898*16fb89f9SDmitry Baryshkov .num_parents = 1, 899*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 900*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 901*16fb89f9SDmitry Baryshkov }, 902*16fb89f9SDmitry Baryshkov }, 903*16fb89f9SDmitry Baryshkov }; 904*16fb89f9SDmitry Baryshkov 905*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_crypto_clk = { 906*16fb89f9SDmitry Baryshkov .halt_reg = 0x804c, 907*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 908*16fb89f9SDmitry Baryshkov .clkr = { 909*16fb89f9SDmitry Baryshkov .enable_reg = 0x804c, 910*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 911*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 912*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_crypto_clk", 913*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 914*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx0_link_clk_src.clkr.hw, 915*16fb89f9SDmitry Baryshkov }, 916*16fb89f9SDmitry Baryshkov .num_parents = 1, 917*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 918*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 919*16fb89f9SDmitry Baryshkov }, 920*16fb89f9SDmitry Baryshkov }, 921*16fb89f9SDmitry Baryshkov }; 922*16fb89f9SDmitry Baryshkov 923*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_link_clk = { 924*16fb89f9SDmitry Baryshkov .halt_reg = 0x8040, 925*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 926*16fb89f9SDmitry Baryshkov .clkr = { 927*16fb89f9SDmitry Baryshkov .enable_reg = 0x8040, 928*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 929*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 930*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_link_clk", 931*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 932*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx0_link_clk_src.clkr.hw, 933*16fb89f9SDmitry Baryshkov }, 934*16fb89f9SDmitry Baryshkov .num_parents = 1, 935*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 936*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 937*16fb89f9SDmitry Baryshkov }, 938*16fb89f9SDmitry Baryshkov }, 939*16fb89f9SDmitry Baryshkov }; 940*16fb89f9SDmitry Baryshkov 941*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_link_intf_clk = { 942*16fb89f9SDmitry Baryshkov .halt_reg = 0x8048, 943*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 944*16fb89f9SDmitry Baryshkov .clkr = { 945*16fb89f9SDmitry Baryshkov .enable_reg = 0x8048, 946*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 947*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 948*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_link_intf_clk", 949*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 950*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw, 951*16fb89f9SDmitry Baryshkov }, 952*16fb89f9SDmitry Baryshkov .num_parents = 1, 953*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 954*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 955*16fb89f9SDmitry Baryshkov }, 956*16fb89f9SDmitry Baryshkov }, 957*16fb89f9SDmitry Baryshkov }; 958*16fb89f9SDmitry Baryshkov 959*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_pixel0_clk = { 960*16fb89f9SDmitry Baryshkov .halt_reg = 0x8050, 961*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 962*16fb89f9SDmitry Baryshkov .clkr = { 963*16fb89f9SDmitry Baryshkov .enable_reg = 0x8050, 964*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 965*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 966*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_pixel0_clk", 967*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 968*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx0_pixel0_clk_src.clkr.hw, 969*16fb89f9SDmitry Baryshkov }, 970*16fb89f9SDmitry Baryshkov .num_parents = 1, 971*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 972*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 973*16fb89f9SDmitry Baryshkov }, 974*16fb89f9SDmitry Baryshkov }, 975*16fb89f9SDmitry Baryshkov }; 976*16fb89f9SDmitry Baryshkov 977*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_pixel1_clk = { 978*16fb89f9SDmitry Baryshkov .halt_reg = 0x8054, 979*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 980*16fb89f9SDmitry Baryshkov .clkr = { 981*16fb89f9SDmitry Baryshkov .enable_reg = 0x8054, 982*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 983*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 984*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_pixel1_clk", 985*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 986*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx0_pixel1_clk_src.clkr.hw, 987*16fb89f9SDmitry Baryshkov }, 988*16fb89f9SDmitry Baryshkov .num_parents = 1, 989*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 990*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 991*16fb89f9SDmitry Baryshkov }, 992*16fb89f9SDmitry Baryshkov }, 993*16fb89f9SDmitry Baryshkov }; 994*16fb89f9SDmitry Baryshkov 995*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx0_usb_router_link_intf_clk = { 996*16fb89f9SDmitry Baryshkov .halt_reg = 0x8044, 997*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 998*16fb89f9SDmitry Baryshkov .clkr = { 999*16fb89f9SDmitry Baryshkov .enable_reg = 0x8044, 1000*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1001*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1002*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx0_usb_router_link_intf_clk", 1003*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1004*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw, 1005*16fb89f9SDmitry Baryshkov }, 1006*16fb89f9SDmitry Baryshkov .num_parents = 1, 1007*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1008*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1009*16fb89f9SDmitry Baryshkov }, 1010*16fb89f9SDmitry Baryshkov }, 1011*16fb89f9SDmitry Baryshkov }; 1012*16fb89f9SDmitry Baryshkov 1013*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_aux_clk = { 1014*16fb89f9SDmitry Baryshkov .halt_reg = 0x8074, 1015*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1016*16fb89f9SDmitry Baryshkov .clkr = { 1017*16fb89f9SDmitry Baryshkov .enable_reg = 0x8074, 1018*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1019*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1020*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_aux_clk", 1021*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1022*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx1_aux_clk_src.clkr.hw, 1023*16fb89f9SDmitry Baryshkov }, 1024*16fb89f9SDmitry Baryshkov .num_parents = 1, 1025*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1026*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1027*16fb89f9SDmitry Baryshkov }, 1028*16fb89f9SDmitry Baryshkov }, 1029*16fb89f9SDmitry Baryshkov }; 1030*16fb89f9SDmitry Baryshkov 1031*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_crypto_clk = { 1032*16fb89f9SDmitry Baryshkov .halt_reg = 0x8070, 1033*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1034*16fb89f9SDmitry Baryshkov .clkr = { 1035*16fb89f9SDmitry Baryshkov .enable_reg = 0x8070, 1036*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1037*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1038*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_crypto_clk", 1039*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1040*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx1_link_clk_src.clkr.hw, 1041*16fb89f9SDmitry Baryshkov }, 1042*16fb89f9SDmitry Baryshkov .num_parents = 1, 1043*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1044*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1045*16fb89f9SDmitry Baryshkov }, 1046*16fb89f9SDmitry Baryshkov }, 1047*16fb89f9SDmitry Baryshkov }; 1048*16fb89f9SDmitry Baryshkov 1049*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_link_clk = { 1050*16fb89f9SDmitry Baryshkov .halt_reg = 0x8064, 1051*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1052*16fb89f9SDmitry Baryshkov .clkr = { 1053*16fb89f9SDmitry Baryshkov .enable_reg = 0x8064, 1054*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1055*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1056*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_link_clk", 1057*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1058*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx1_link_clk_src.clkr.hw, 1059*16fb89f9SDmitry Baryshkov }, 1060*16fb89f9SDmitry Baryshkov .num_parents = 1, 1061*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1062*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1063*16fb89f9SDmitry Baryshkov }, 1064*16fb89f9SDmitry Baryshkov }, 1065*16fb89f9SDmitry Baryshkov }; 1066*16fb89f9SDmitry Baryshkov 1067*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_link_intf_clk = { 1068*16fb89f9SDmitry Baryshkov .halt_reg = 0x806c, 1069*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1070*16fb89f9SDmitry Baryshkov .clkr = { 1071*16fb89f9SDmitry Baryshkov .enable_reg = 0x806c, 1072*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1073*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1074*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_link_intf_clk", 1075*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1076*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx1_link_div_clk_src.clkr.hw, 1077*16fb89f9SDmitry Baryshkov }, 1078*16fb89f9SDmitry Baryshkov .num_parents = 1, 1079*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1080*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1081*16fb89f9SDmitry Baryshkov }, 1082*16fb89f9SDmitry Baryshkov }, 1083*16fb89f9SDmitry Baryshkov }; 1084*16fb89f9SDmitry Baryshkov 1085*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_pixel0_clk = { 1086*16fb89f9SDmitry Baryshkov .halt_reg = 0x805c, 1087*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1088*16fb89f9SDmitry Baryshkov .clkr = { 1089*16fb89f9SDmitry Baryshkov .enable_reg = 0x805c, 1090*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1091*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1092*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_pixel0_clk", 1093*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1094*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx1_pixel0_clk_src.clkr.hw, 1095*16fb89f9SDmitry Baryshkov }, 1096*16fb89f9SDmitry Baryshkov .num_parents = 1, 1097*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1098*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1099*16fb89f9SDmitry Baryshkov }, 1100*16fb89f9SDmitry Baryshkov }, 1101*16fb89f9SDmitry Baryshkov }; 1102*16fb89f9SDmitry Baryshkov 1103*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_pixel1_clk = { 1104*16fb89f9SDmitry Baryshkov .halt_reg = 0x8060, 1105*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1106*16fb89f9SDmitry Baryshkov .clkr = { 1107*16fb89f9SDmitry Baryshkov .enable_reg = 0x8060, 1108*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1109*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1110*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_pixel1_clk", 1111*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1112*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx1_pixel1_clk_src.clkr.hw, 1113*16fb89f9SDmitry Baryshkov }, 1114*16fb89f9SDmitry Baryshkov .num_parents = 1, 1115*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1116*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1117*16fb89f9SDmitry Baryshkov }, 1118*16fb89f9SDmitry Baryshkov }, 1119*16fb89f9SDmitry Baryshkov }; 1120*16fb89f9SDmitry Baryshkov 1121*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx1_usb_router_link_intf_clk = { 1122*16fb89f9SDmitry Baryshkov .halt_reg = 0x8068, 1123*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1124*16fb89f9SDmitry Baryshkov .clkr = { 1125*16fb89f9SDmitry Baryshkov .enable_reg = 0x8068, 1126*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1127*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1128*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx1_usb_router_link_intf_clk", 1129*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1130*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx0_link_div_clk_src.clkr.hw, 1131*16fb89f9SDmitry Baryshkov }, 1132*16fb89f9SDmitry Baryshkov .num_parents = 1, 1133*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1134*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1135*16fb89f9SDmitry Baryshkov }, 1136*16fb89f9SDmitry Baryshkov }, 1137*16fb89f9SDmitry Baryshkov }; 1138*16fb89f9SDmitry Baryshkov 1139*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_aux_clk = { 1140*16fb89f9SDmitry Baryshkov .halt_reg = 0x808c, 1141*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1142*16fb89f9SDmitry Baryshkov .clkr = { 1143*16fb89f9SDmitry Baryshkov .enable_reg = 0x808c, 1144*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1145*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1146*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_aux_clk", 1147*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1148*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx2_aux_clk_src.clkr.hw, 1149*16fb89f9SDmitry Baryshkov }, 1150*16fb89f9SDmitry Baryshkov .num_parents = 1, 1151*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1152*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1153*16fb89f9SDmitry Baryshkov }, 1154*16fb89f9SDmitry Baryshkov }, 1155*16fb89f9SDmitry Baryshkov }; 1156*16fb89f9SDmitry Baryshkov 1157*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_crypto_clk = { 1158*16fb89f9SDmitry Baryshkov .halt_reg = 0x8088, 1159*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1160*16fb89f9SDmitry Baryshkov .clkr = { 1161*16fb89f9SDmitry Baryshkov .enable_reg = 0x8088, 1162*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1163*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1164*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_crypto_clk", 1165*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1166*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx2_link_clk_src.clkr.hw, 1167*16fb89f9SDmitry Baryshkov }, 1168*16fb89f9SDmitry Baryshkov .num_parents = 1, 1169*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1170*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1171*16fb89f9SDmitry Baryshkov }, 1172*16fb89f9SDmitry Baryshkov }, 1173*16fb89f9SDmitry Baryshkov }; 1174*16fb89f9SDmitry Baryshkov 1175*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_link_clk = { 1176*16fb89f9SDmitry Baryshkov .halt_reg = 0x8080, 1177*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1178*16fb89f9SDmitry Baryshkov .clkr = { 1179*16fb89f9SDmitry Baryshkov .enable_reg = 0x8080, 1180*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1181*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1182*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_link_clk", 1183*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1184*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx2_link_clk_src.clkr.hw, 1185*16fb89f9SDmitry Baryshkov }, 1186*16fb89f9SDmitry Baryshkov .num_parents = 1, 1187*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1188*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1189*16fb89f9SDmitry Baryshkov }, 1190*16fb89f9SDmitry Baryshkov }, 1191*16fb89f9SDmitry Baryshkov }; 1192*16fb89f9SDmitry Baryshkov 1193*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_link_intf_clk = { 1194*16fb89f9SDmitry Baryshkov .halt_reg = 0x8084, 1195*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1196*16fb89f9SDmitry Baryshkov .clkr = { 1197*16fb89f9SDmitry Baryshkov .enable_reg = 0x8084, 1198*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1199*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1200*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_link_intf_clk", 1201*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1202*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx2_link_div_clk_src.clkr.hw, 1203*16fb89f9SDmitry Baryshkov }, 1204*16fb89f9SDmitry Baryshkov .num_parents = 1, 1205*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1206*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1207*16fb89f9SDmitry Baryshkov }, 1208*16fb89f9SDmitry Baryshkov }, 1209*16fb89f9SDmitry Baryshkov }; 1210*16fb89f9SDmitry Baryshkov 1211*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_pixel0_clk = { 1212*16fb89f9SDmitry Baryshkov .halt_reg = 0x8078, 1213*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1214*16fb89f9SDmitry Baryshkov .clkr = { 1215*16fb89f9SDmitry Baryshkov .enable_reg = 0x8078, 1216*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1217*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1218*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_pixel0_clk", 1219*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1220*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx2_pixel0_clk_src.clkr.hw, 1221*16fb89f9SDmitry Baryshkov }, 1222*16fb89f9SDmitry Baryshkov .num_parents = 1, 1223*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1224*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1225*16fb89f9SDmitry Baryshkov }, 1226*16fb89f9SDmitry Baryshkov }, 1227*16fb89f9SDmitry Baryshkov }; 1228*16fb89f9SDmitry Baryshkov 1229*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx2_pixel1_clk = { 1230*16fb89f9SDmitry Baryshkov .halt_reg = 0x807c, 1231*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1232*16fb89f9SDmitry Baryshkov .clkr = { 1233*16fb89f9SDmitry Baryshkov .enable_reg = 0x807c, 1234*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1235*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1236*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx2_pixel1_clk", 1237*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1238*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx2_pixel1_clk_src.clkr.hw, 1239*16fb89f9SDmitry Baryshkov }, 1240*16fb89f9SDmitry Baryshkov .num_parents = 1, 1241*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1242*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1243*16fb89f9SDmitry Baryshkov }, 1244*16fb89f9SDmitry Baryshkov }, 1245*16fb89f9SDmitry Baryshkov }; 1246*16fb89f9SDmitry Baryshkov 1247*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_aux_clk = { 1248*16fb89f9SDmitry Baryshkov .halt_reg = 0x809c, 1249*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1250*16fb89f9SDmitry Baryshkov .clkr = { 1251*16fb89f9SDmitry Baryshkov .enable_reg = 0x809c, 1252*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1253*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1254*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_aux_clk", 1255*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1256*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx3_aux_clk_src.clkr.hw, 1257*16fb89f9SDmitry Baryshkov }, 1258*16fb89f9SDmitry Baryshkov .num_parents = 1, 1259*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1260*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1261*16fb89f9SDmitry Baryshkov }, 1262*16fb89f9SDmitry Baryshkov }, 1263*16fb89f9SDmitry Baryshkov }; 1264*16fb89f9SDmitry Baryshkov 1265*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_crypto_clk = { 1266*16fb89f9SDmitry Baryshkov .halt_reg = 0x80a0, 1267*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1268*16fb89f9SDmitry Baryshkov .clkr = { 1269*16fb89f9SDmitry Baryshkov .enable_reg = 0x80a0, 1270*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1271*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1272*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_crypto_clk", 1273*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1274*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx3_link_clk_src.clkr.hw, 1275*16fb89f9SDmitry Baryshkov }, 1276*16fb89f9SDmitry Baryshkov .num_parents = 1, 1277*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1278*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1279*16fb89f9SDmitry Baryshkov }, 1280*16fb89f9SDmitry Baryshkov }, 1281*16fb89f9SDmitry Baryshkov }; 1282*16fb89f9SDmitry Baryshkov 1283*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_link_clk = { 1284*16fb89f9SDmitry Baryshkov .halt_reg = 0x8094, 1285*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1286*16fb89f9SDmitry Baryshkov .clkr = { 1287*16fb89f9SDmitry Baryshkov .enable_reg = 0x8094, 1288*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1289*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1290*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_link_clk", 1291*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1292*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx3_link_clk_src.clkr.hw, 1293*16fb89f9SDmitry Baryshkov }, 1294*16fb89f9SDmitry Baryshkov .num_parents = 1, 1295*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1296*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1297*16fb89f9SDmitry Baryshkov }, 1298*16fb89f9SDmitry Baryshkov }, 1299*16fb89f9SDmitry Baryshkov }; 1300*16fb89f9SDmitry Baryshkov 1301*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_link_intf_clk = { 1302*16fb89f9SDmitry Baryshkov .halt_reg = 0x8098, 1303*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1304*16fb89f9SDmitry Baryshkov .clkr = { 1305*16fb89f9SDmitry Baryshkov .enable_reg = 0x8098, 1306*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1307*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1308*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_link_intf_clk", 1309*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1310*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx3_link_div_clk_src.clkr.hw, 1311*16fb89f9SDmitry Baryshkov }, 1312*16fb89f9SDmitry Baryshkov .num_parents = 1, 1313*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1314*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1315*16fb89f9SDmitry Baryshkov }, 1316*16fb89f9SDmitry Baryshkov }, 1317*16fb89f9SDmitry Baryshkov }; 1318*16fb89f9SDmitry Baryshkov 1319*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_dptx3_pixel0_clk = { 1320*16fb89f9SDmitry Baryshkov .halt_reg = 0x8090, 1321*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1322*16fb89f9SDmitry Baryshkov .clkr = { 1323*16fb89f9SDmitry Baryshkov .enable_reg = 0x8090, 1324*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1325*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1326*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_dptx3_pixel0_clk", 1327*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1328*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_dptx3_pixel0_clk_src.clkr.hw, 1329*16fb89f9SDmitry Baryshkov }, 1330*16fb89f9SDmitry Baryshkov .num_parents = 1, 1331*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1332*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1333*16fb89f9SDmitry Baryshkov }, 1334*16fb89f9SDmitry Baryshkov }, 1335*16fb89f9SDmitry Baryshkov }; 1336*16fb89f9SDmitry Baryshkov 1337*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_esc0_clk = { 1338*16fb89f9SDmitry Baryshkov .halt_reg = 0x8038, 1339*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1340*16fb89f9SDmitry Baryshkov .clkr = { 1341*16fb89f9SDmitry Baryshkov .enable_reg = 0x8038, 1342*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1343*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1344*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_esc0_clk", 1345*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1346*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_esc0_clk_src.clkr.hw, 1347*16fb89f9SDmitry Baryshkov }, 1348*16fb89f9SDmitry Baryshkov .num_parents = 1, 1349*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1350*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1351*16fb89f9SDmitry Baryshkov }, 1352*16fb89f9SDmitry Baryshkov }, 1353*16fb89f9SDmitry Baryshkov }; 1354*16fb89f9SDmitry Baryshkov 1355*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_esc1_clk = { 1356*16fb89f9SDmitry Baryshkov .halt_reg = 0x803c, 1357*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1358*16fb89f9SDmitry Baryshkov .clkr = { 1359*16fb89f9SDmitry Baryshkov .enable_reg = 0x803c, 1360*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1361*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1362*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_esc1_clk", 1363*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1364*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_esc1_clk_src.clkr.hw, 1365*16fb89f9SDmitry Baryshkov }, 1366*16fb89f9SDmitry Baryshkov .num_parents = 1, 1367*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1368*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1369*16fb89f9SDmitry Baryshkov }, 1370*16fb89f9SDmitry Baryshkov }, 1371*16fb89f9SDmitry Baryshkov }; 1372*16fb89f9SDmitry Baryshkov 1373*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_mdp1_clk = { 1374*16fb89f9SDmitry Baryshkov .halt_reg = 0xa004, 1375*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1376*16fb89f9SDmitry Baryshkov .clkr = { 1377*16fb89f9SDmitry Baryshkov .enable_reg = 0xa004, 1378*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1379*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1380*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp1_clk", 1381*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1382*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, 1383*16fb89f9SDmitry Baryshkov }, 1384*16fb89f9SDmitry Baryshkov .num_parents = 1, 1385*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1386*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1387*16fb89f9SDmitry Baryshkov }, 1388*16fb89f9SDmitry Baryshkov }, 1389*16fb89f9SDmitry Baryshkov }; 1390*16fb89f9SDmitry Baryshkov 1391*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_mdp_clk = { 1392*16fb89f9SDmitry Baryshkov .halt_reg = 0x800c, 1393*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1394*16fb89f9SDmitry Baryshkov .clkr = { 1395*16fb89f9SDmitry Baryshkov .enable_reg = 0x800c, 1396*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1397*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1398*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp_clk", 1399*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1400*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, 1401*16fb89f9SDmitry Baryshkov }, 1402*16fb89f9SDmitry Baryshkov .num_parents = 1, 1403*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1404*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1405*16fb89f9SDmitry Baryshkov }, 1406*16fb89f9SDmitry Baryshkov }, 1407*16fb89f9SDmitry Baryshkov }; 1408*16fb89f9SDmitry Baryshkov 1409*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_mdp_lut1_clk = { 1410*16fb89f9SDmitry Baryshkov .halt_reg = 0xa014, 1411*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1412*16fb89f9SDmitry Baryshkov .clkr = { 1413*16fb89f9SDmitry Baryshkov .enable_reg = 0xa014, 1414*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1415*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1416*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp_lut1_clk", 1417*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1418*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, 1419*16fb89f9SDmitry Baryshkov }, 1420*16fb89f9SDmitry Baryshkov .num_parents = 1, 1421*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1422*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1423*16fb89f9SDmitry Baryshkov }, 1424*16fb89f9SDmitry Baryshkov }, 1425*16fb89f9SDmitry Baryshkov }; 1426*16fb89f9SDmitry Baryshkov 1427*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_mdp_lut_clk = { 1428*16fb89f9SDmitry Baryshkov .halt_reg = 0x801c, 1429*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT_VOTED, 1430*16fb89f9SDmitry Baryshkov .clkr = { 1431*16fb89f9SDmitry Baryshkov .enable_reg = 0x801c, 1432*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1433*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1434*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_mdp_lut_clk", 1435*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1436*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, 1437*16fb89f9SDmitry Baryshkov }, 1438*16fb89f9SDmitry Baryshkov .num_parents = 1, 1439*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1440*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1441*16fb89f9SDmitry Baryshkov }, 1442*16fb89f9SDmitry Baryshkov }, 1443*16fb89f9SDmitry Baryshkov }; 1444*16fb89f9SDmitry Baryshkov 1445*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_non_gdsc_ahb_clk = { 1446*16fb89f9SDmitry Baryshkov .halt_reg = 0xc004, 1447*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT_VOTED, 1448*16fb89f9SDmitry Baryshkov .clkr = { 1449*16fb89f9SDmitry Baryshkov .enable_reg = 0xc004, 1450*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1451*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1452*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_non_gdsc_ahb_clk", 1453*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1454*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_ahb_clk_src.clkr.hw, 1455*16fb89f9SDmitry Baryshkov }, 1456*16fb89f9SDmitry Baryshkov .num_parents = 1, 1457*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1458*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1459*16fb89f9SDmitry Baryshkov }, 1460*16fb89f9SDmitry Baryshkov }, 1461*16fb89f9SDmitry Baryshkov }; 1462*16fb89f9SDmitry Baryshkov 1463*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_pclk0_clk = { 1464*16fb89f9SDmitry Baryshkov .halt_reg = 0x8004, 1465*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1466*16fb89f9SDmitry Baryshkov .clkr = { 1467*16fb89f9SDmitry Baryshkov .enable_reg = 0x8004, 1468*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1469*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1470*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_pclk0_clk", 1471*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1472*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_pclk0_clk_src.clkr.hw, 1473*16fb89f9SDmitry Baryshkov }, 1474*16fb89f9SDmitry Baryshkov .num_parents = 1, 1475*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1476*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1477*16fb89f9SDmitry Baryshkov }, 1478*16fb89f9SDmitry Baryshkov }, 1479*16fb89f9SDmitry Baryshkov }; 1480*16fb89f9SDmitry Baryshkov 1481*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_pclk1_clk = { 1482*16fb89f9SDmitry Baryshkov .halt_reg = 0x8008, 1483*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1484*16fb89f9SDmitry Baryshkov .clkr = { 1485*16fb89f9SDmitry Baryshkov .enable_reg = 0x8008, 1486*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1487*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1488*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_pclk1_clk", 1489*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1490*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_pclk1_clk_src.clkr.hw, 1491*16fb89f9SDmitry Baryshkov }, 1492*16fb89f9SDmitry Baryshkov .num_parents = 1, 1493*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1494*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1495*16fb89f9SDmitry Baryshkov }, 1496*16fb89f9SDmitry Baryshkov }, 1497*16fb89f9SDmitry Baryshkov }; 1498*16fb89f9SDmitry Baryshkov 1499*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_rot1_clk = { 1500*16fb89f9SDmitry Baryshkov .halt_reg = 0xa00c, 1501*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1502*16fb89f9SDmitry Baryshkov .clkr = { 1503*16fb89f9SDmitry Baryshkov .enable_reg = 0xa00c, 1504*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1505*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1506*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rot1_clk", 1507*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1508*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_rot_clk_src.clkr.hw, 1509*16fb89f9SDmitry Baryshkov }, 1510*16fb89f9SDmitry Baryshkov .num_parents = 1, 1511*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1512*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1513*16fb89f9SDmitry Baryshkov }, 1514*16fb89f9SDmitry Baryshkov }, 1515*16fb89f9SDmitry Baryshkov }; 1516*16fb89f9SDmitry Baryshkov 1517*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_rot_clk = { 1518*16fb89f9SDmitry Baryshkov .halt_reg = 0x8014, 1519*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1520*16fb89f9SDmitry Baryshkov .clkr = { 1521*16fb89f9SDmitry Baryshkov .enable_reg = 0x8014, 1522*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1523*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1524*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rot_clk", 1525*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1526*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_rot_clk_src.clkr.hw, 1527*16fb89f9SDmitry Baryshkov }, 1528*16fb89f9SDmitry Baryshkov .num_parents = 1, 1529*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1530*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1531*16fb89f9SDmitry Baryshkov }, 1532*16fb89f9SDmitry Baryshkov }, 1533*16fb89f9SDmitry Baryshkov }; 1534*16fb89f9SDmitry Baryshkov 1535*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_rscc_ahb_clk = { 1536*16fb89f9SDmitry Baryshkov .halt_reg = 0xc00c, 1537*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1538*16fb89f9SDmitry Baryshkov .clkr = { 1539*16fb89f9SDmitry Baryshkov .enable_reg = 0xc00c, 1540*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1541*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1542*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rscc_ahb_clk", 1543*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1544*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_ahb_clk_src.clkr.hw, 1545*16fb89f9SDmitry Baryshkov }, 1546*16fb89f9SDmitry Baryshkov .num_parents = 1, 1547*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1548*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1549*16fb89f9SDmitry Baryshkov }, 1550*16fb89f9SDmitry Baryshkov }, 1551*16fb89f9SDmitry Baryshkov }; 1552*16fb89f9SDmitry Baryshkov 1553*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_rscc_vsync_clk = { 1554*16fb89f9SDmitry Baryshkov .halt_reg = 0xc008, 1555*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1556*16fb89f9SDmitry Baryshkov .clkr = { 1557*16fb89f9SDmitry Baryshkov .enable_reg = 0xc008, 1558*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1559*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1560*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_rscc_vsync_clk", 1561*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1562*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_vsync_clk_src.clkr.hw, 1563*16fb89f9SDmitry Baryshkov }, 1564*16fb89f9SDmitry Baryshkov .num_parents = 1, 1565*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1566*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1567*16fb89f9SDmitry Baryshkov }, 1568*16fb89f9SDmitry Baryshkov }, 1569*16fb89f9SDmitry Baryshkov }; 1570*16fb89f9SDmitry Baryshkov 1571*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_vsync1_clk = { 1572*16fb89f9SDmitry Baryshkov .halt_reg = 0xa01c, 1573*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1574*16fb89f9SDmitry Baryshkov .clkr = { 1575*16fb89f9SDmitry Baryshkov .enable_reg = 0xa01c, 1576*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1577*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1578*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_vsync1_clk", 1579*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1580*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_vsync_clk_src.clkr.hw, 1581*16fb89f9SDmitry Baryshkov }, 1582*16fb89f9SDmitry Baryshkov .num_parents = 1, 1583*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1584*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1585*16fb89f9SDmitry Baryshkov }, 1586*16fb89f9SDmitry Baryshkov }, 1587*16fb89f9SDmitry Baryshkov }; 1588*16fb89f9SDmitry Baryshkov 1589*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_mdss_vsync_clk = { 1590*16fb89f9SDmitry Baryshkov .halt_reg = 0x8024, 1591*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1592*16fb89f9SDmitry Baryshkov .clkr = { 1593*16fb89f9SDmitry Baryshkov .enable_reg = 0x8024, 1594*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1595*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1596*16fb89f9SDmitry Baryshkov .name = "disp_cc_mdss_vsync_clk", 1597*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1598*16fb89f9SDmitry Baryshkov .hw = &disp_cc_mdss_vsync_clk_src.clkr.hw, 1599*16fb89f9SDmitry Baryshkov }, 1600*16fb89f9SDmitry Baryshkov .num_parents = 1, 1601*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1602*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1603*16fb89f9SDmitry Baryshkov }, 1604*16fb89f9SDmitry Baryshkov }, 1605*16fb89f9SDmitry Baryshkov }; 1606*16fb89f9SDmitry Baryshkov 1607*16fb89f9SDmitry Baryshkov static struct clk_branch disp_cc_sleep_clk = { 1608*16fb89f9SDmitry Baryshkov .halt_reg = 0xe078, 1609*16fb89f9SDmitry Baryshkov .halt_check = BRANCH_HALT, 1610*16fb89f9SDmitry Baryshkov .clkr = { 1611*16fb89f9SDmitry Baryshkov .enable_reg = 0xe078, 1612*16fb89f9SDmitry Baryshkov .enable_mask = BIT(0), 1613*16fb89f9SDmitry Baryshkov .hw.init = &(struct clk_init_data) { 1614*16fb89f9SDmitry Baryshkov .name = "disp_cc_sleep_clk", 1615*16fb89f9SDmitry Baryshkov .parent_data = &(const struct clk_parent_data) { 1616*16fb89f9SDmitry Baryshkov .hw = &disp_cc_sleep_clk_src.clkr.hw, 1617*16fb89f9SDmitry Baryshkov }, 1618*16fb89f9SDmitry Baryshkov .num_parents = 1, 1619*16fb89f9SDmitry Baryshkov .flags = CLK_SET_RATE_PARENT, 1620*16fb89f9SDmitry Baryshkov .ops = &clk_branch2_ops, 1621*16fb89f9SDmitry Baryshkov }, 1622*16fb89f9SDmitry Baryshkov }, 1623*16fb89f9SDmitry Baryshkov }; 1624*16fb89f9SDmitry Baryshkov 1625*16fb89f9SDmitry Baryshkov static struct gdsc mdss_gdsc = { 1626*16fb89f9SDmitry Baryshkov .gdscr = 0x9000, 1627*16fb89f9SDmitry Baryshkov .pd = { 1628*16fb89f9SDmitry Baryshkov .name = "mdss_gdsc", 1629*16fb89f9SDmitry Baryshkov }, 1630*16fb89f9SDmitry Baryshkov .pwrsts = PWRSTS_OFF_ON, 1631*16fb89f9SDmitry Baryshkov .flags = HW_CTRL | RETAIN_FF_ENABLE, 1632*16fb89f9SDmitry Baryshkov }; 1633*16fb89f9SDmitry Baryshkov 1634*16fb89f9SDmitry Baryshkov static struct gdsc mdss_int2_gdsc = { 1635*16fb89f9SDmitry Baryshkov .gdscr = 0xb000, 1636*16fb89f9SDmitry Baryshkov .pd = { 1637*16fb89f9SDmitry Baryshkov .name = "mdss_int2_gdsc", 1638*16fb89f9SDmitry Baryshkov }, 1639*16fb89f9SDmitry Baryshkov .pwrsts = PWRSTS_OFF_ON, 1640*16fb89f9SDmitry Baryshkov .flags = HW_CTRL | RETAIN_FF_ENABLE, 1641*16fb89f9SDmitry Baryshkov }; 1642*16fb89f9SDmitry Baryshkov 1643*16fb89f9SDmitry Baryshkov static struct clk_regmap *disp_cc_sm8450_clocks[] = { 1644*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_AHB1_CLK] = &disp_cc_mdss_ahb1_clk.clkr, 1645*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_AHB_CLK] = &disp_cc_mdss_ahb_clk.clkr, 1646*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_AHB_CLK_SRC] = &disp_cc_mdss_ahb_clk_src.clkr, 1647*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr, 1648*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr, 1649*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr, 1650*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr, 1651*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr, 1652*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr, 1653*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE1_DIV_CLK_SRC] = &disp_cc_mdss_byte1_div_clk_src.clkr, 1654*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp_cc_mdss_byte1_intf_clk.clkr, 1655*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_AUX_CLK] = &disp_cc_mdss_dptx0_aux_clk.clkr, 1656*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_AUX_CLK_SRC] = &disp_cc_mdss_dptx0_aux_clk_src.clkr, 1657*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_CRYPTO_CLK] = &disp_cc_mdss_dptx0_crypto_clk.clkr, 1658*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_LINK_CLK] = &disp_cc_mdss_dptx0_link_clk.clkr, 1659*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_LINK_CLK_SRC] = &disp_cc_mdss_dptx0_link_clk_src.clkr, 1660*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_LINK_DIV_CLK_SRC] = &disp_cc_mdss_dptx0_link_div_clk_src.clkr, 1661*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_LINK_INTF_CLK] = &disp_cc_mdss_dptx0_link_intf_clk.clkr, 1662*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_PIXEL0_CLK] = &disp_cc_mdss_dptx0_pixel0_clk.clkr, 1663*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC] = &disp_cc_mdss_dptx0_pixel0_clk_src.clkr, 1664*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_PIXEL1_CLK] = &disp_cc_mdss_dptx0_pixel1_clk.clkr, 1665*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC] = &disp_cc_mdss_dptx0_pixel1_clk_src.clkr, 1666*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX0_USB_ROUTER_LINK_INTF_CLK] = 1667*16fb89f9SDmitry Baryshkov &disp_cc_mdss_dptx0_usb_router_link_intf_clk.clkr, 1668*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_AUX_CLK] = &disp_cc_mdss_dptx1_aux_clk.clkr, 1669*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_AUX_CLK_SRC] = &disp_cc_mdss_dptx1_aux_clk_src.clkr, 1670*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_CRYPTO_CLK] = &disp_cc_mdss_dptx1_crypto_clk.clkr, 1671*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_LINK_CLK] = &disp_cc_mdss_dptx1_link_clk.clkr, 1672*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_LINK_CLK_SRC] = &disp_cc_mdss_dptx1_link_clk_src.clkr, 1673*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_LINK_DIV_CLK_SRC] = &disp_cc_mdss_dptx1_link_div_clk_src.clkr, 1674*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_LINK_INTF_CLK] = &disp_cc_mdss_dptx1_link_intf_clk.clkr, 1675*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_PIXEL0_CLK] = &disp_cc_mdss_dptx1_pixel0_clk.clkr, 1676*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC] = &disp_cc_mdss_dptx1_pixel0_clk_src.clkr, 1677*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_PIXEL1_CLK] = &disp_cc_mdss_dptx1_pixel1_clk.clkr, 1678*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC] = &disp_cc_mdss_dptx1_pixel1_clk_src.clkr, 1679*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX1_USB_ROUTER_LINK_INTF_CLK] = 1680*16fb89f9SDmitry Baryshkov &disp_cc_mdss_dptx1_usb_router_link_intf_clk.clkr, 1681*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_AUX_CLK] = &disp_cc_mdss_dptx2_aux_clk.clkr, 1682*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_AUX_CLK_SRC] = &disp_cc_mdss_dptx2_aux_clk_src.clkr, 1683*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_CRYPTO_CLK] = &disp_cc_mdss_dptx2_crypto_clk.clkr, 1684*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_LINK_CLK] = &disp_cc_mdss_dptx2_link_clk.clkr, 1685*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_LINK_CLK_SRC] = &disp_cc_mdss_dptx2_link_clk_src.clkr, 1686*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_LINK_DIV_CLK_SRC] = &disp_cc_mdss_dptx2_link_div_clk_src.clkr, 1687*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_LINK_INTF_CLK] = &disp_cc_mdss_dptx2_link_intf_clk.clkr, 1688*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_PIXEL0_CLK] = &disp_cc_mdss_dptx2_pixel0_clk.clkr, 1689*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC] = &disp_cc_mdss_dptx2_pixel0_clk_src.clkr, 1690*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_PIXEL1_CLK] = &disp_cc_mdss_dptx2_pixel1_clk.clkr, 1691*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC] = &disp_cc_mdss_dptx2_pixel1_clk_src.clkr, 1692*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_AUX_CLK] = &disp_cc_mdss_dptx3_aux_clk.clkr, 1693*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_AUX_CLK_SRC] = &disp_cc_mdss_dptx3_aux_clk_src.clkr, 1694*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_CRYPTO_CLK] = &disp_cc_mdss_dptx3_crypto_clk.clkr, 1695*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_LINK_CLK] = &disp_cc_mdss_dptx3_link_clk.clkr, 1696*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_LINK_CLK_SRC] = &disp_cc_mdss_dptx3_link_clk_src.clkr, 1697*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_LINK_DIV_CLK_SRC] = &disp_cc_mdss_dptx3_link_div_clk_src.clkr, 1698*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_LINK_INTF_CLK] = &disp_cc_mdss_dptx3_link_intf_clk.clkr, 1699*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_PIXEL0_CLK] = &disp_cc_mdss_dptx3_pixel0_clk.clkr, 1700*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_DPTX3_PIXEL0_CLK_SRC] = &disp_cc_mdss_dptx3_pixel0_clk_src.clkr, 1701*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ESC0_CLK] = &disp_cc_mdss_esc0_clk.clkr, 1702*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ESC0_CLK_SRC] = &disp_cc_mdss_esc0_clk_src.clkr, 1703*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ESC1_CLK] = &disp_cc_mdss_esc1_clk.clkr, 1704*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ESC1_CLK_SRC] = &disp_cc_mdss_esc1_clk_src.clkr, 1705*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP1_CLK] = &disp_cc_mdss_mdp1_clk.clkr, 1706*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP_CLK] = &disp_cc_mdss_mdp_clk.clkr, 1707*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP_CLK_SRC] = &disp_cc_mdss_mdp_clk_src.clkr, 1708*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP_LUT1_CLK] = &disp_cc_mdss_mdp_lut1_clk.clkr, 1709*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_MDP_LUT_CLK] = &disp_cc_mdss_mdp_lut_clk.clkr, 1710*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_NON_GDSC_AHB_CLK] = &disp_cc_mdss_non_gdsc_ahb_clk.clkr, 1711*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_PCLK0_CLK] = &disp_cc_mdss_pclk0_clk.clkr, 1712*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_PCLK0_CLK_SRC] = &disp_cc_mdss_pclk0_clk_src.clkr, 1713*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr, 1714*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr, 1715*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ROT1_CLK] = &disp_cc_mdss_rot1_clk.clkr, 1716*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ROT_CLK] = &disp_cc_mdss_rot_clk.clkr, 1717*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_ROT_CLK_SRC] = &disp_cc_mdss_rot_clk_src.clkr, 1718*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_RSCC_AHB_CLK] = &disp_cc_mdss_rscc_ahb_clk.clkr, 1719*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr, 1720*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_VSYNC1_CLK] = &disp_cc_mdss_vsync1_clk.clkr, 1721*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr, 1722*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_VSYNC_CLK_SRC] = &disp_cc_mdss_vsync_clk_src.clkr, 1723*16fb89f9SDmitry Baryshkov [DISP_CC_PLL0] = &disp_cc_pll0.clkr, 1724*16fb89f9SDmitry Baryshkov [DISP_CC_PLL1] = &disp_cc_pll1.clkr, 1725*16fb89f9SDmitry Baryshkov [DISP_CC_SLEEP_CLK] = &disp_cc_sleep_clk.clkr, 1726*16fb89f9SDmitry Baryshkov [DISP_CC_SLEEP_CLK_SRC] = &disp_cc_sleep_clk_src.clkr, 1727*16fb89f9SDmitry Baryshkov [DISP_CC_XO_CLK_SRC] = &disp_cc_xo_clk_src.clkr, 1728*16fb89f9SDmitry Baryshkov }; 1729*16fb89f9SDmitry Baryshkov 1730*16fb89f9SDmitry Baryshkov static const struct qcom_reset_map disp_cc_sm8450_resets[] = { 1731*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_CORE_BCR] = { 0x8000 }, 1732*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_CORE_INT2_BCR] = { 0xa000 }, 1733*16fb89f9SDmitry Baryshkov [DISP_CC_MDSS_RSCC_BCR] = { 0xc000 }, 1734*16fb89f9SDmitry Baryshkov }; 1735*16fb89f9SDmitry Baryshkov 1736*16fb89f9SDmitry Baryshkov static struct gdsc *disp_cc_sm8450_gdscs[] = { 1737*16fb89f9SDmitry Baryshkov [MDSS_GDSC] = &mdss_gdsc, 1738*16fb89f9SDmitry Baryshkov [MDSS_INT2_GDSC] = &mdss_int2_gdsc, 1739*16fb89f9SDmitry Baryshkov }; 1740*16fb89f9SDmitry Baryshkov 1741*16fb89f9SDmitry Baryshkov static const struct regmap_config disp_cc_sm8450_regmap_config = { 1742*16fb89f9SDmitry Baryshkov .reg_bits = 32, 1743*16fb89f9SDmitry Baryshkov .reg_stride = 4, 1744*16fb89f9SDmitry Baryshkov .val_bits = 32, 1745*16fb89f9SDmitry Baryshkov .max_register = 0x11008, 1746*16fb89f9SDmitry Baryshkov .fast_io = true, 1747*16fb89f9SDmitry Baryshkov }; 1748*16fb89f9SDmitry Baryshkov 1749*16fb89f9SDmitry Baryshkov static struct qcom_cc_desc disp_cc_sm8450_desc = { 1750*16fb89f9SDmitry Baryshkov .config = &disp_cc_sm8450_regmap_config, 1751*16fb89f9SDmitry Baryshkov .clks = disp_cc_sm8450_clocks, 1752*16fb89f9SDmitry Baryshkov .num_clks = ARRAY_SIZE(disp_cc_sm8450_clocks), 1753*16fb89f9SDmitry Baryshkov .resets = disp_cc_sm8450_resets, 1754*16fb89f9SDmitry Baryshkov .num_resets = ARRAY_SIZE(disp_cc_sm8450_resets), 1755*16fb89f9SDmitry Baryshkov .gdscs = disp_cc_sm8450_gdscs, 1756*16fb89f9SDmitry Baryshkov .num_gdscs = ARRAY_SIZE(disp_cc_sm8450_gdscs), 1757*16fb89f9SDmitry Baryshkov }; 1758*16fb89f9SDmitry Baryshkov 1759*16fb89f9SDmitry Baryshkov static const struct of_device_id disp_cc_sm8450_match_table[] = { 1760*16fb89f9SDmitry Baryshkov { .compatible = "qcom,sm8450-dispcc" }, 1761*16fb89f9SDmitry Baryshkov { } 1762*16fb89f9SDmitry Baryshkov }; 1763*16fb89f9SDmitry Baryshkov MODULE_DEVICE_TABLE(of, disp_cc_sm8450_match_table); 1764*16fb89f9SDmitry Baryshkov 1765*16fb89f9SDmitry Baryshkov static void disp_cc_sm8450_pm_runtime_disable(void *data) 1766*16fb89f9SDmitry Baryshkov { 1767*16fb89f9SDmitry Baryshkov pm_runtime_disable(data); 1768*16fb89f9SDmitry Baryshkov } 1769*16fb89f9SDmitry Baryshkov 1770*16fb89f9SDmitry Baryshkov static int disp_cc_sm8450_probe(struct platform_device *pdev) 1771*16fb89f9SDmitry Baryshkov { 1772*16fb89f9SDmitry Baryshkov struct regmap *regmap; 1773*16fb89f9SDmitry Baryshkov int ret; 1774*16fb89f9SDmitry Baryshkov 1775*16fb89f9SDmitry Baryshkov pm_runtime_enable(&pdev->dev); 1776*16fb89f9SDmitry Baryshkov 1777*16fb89f9SDmitry Baryshkov ret = devm_add_action_or_reset(&pdev->dev, disp_cc_sm8450_pm_runtime_disable, &pdev->dev); 1778*16fb89f9SDmitry Baryshkov if (ret) 1779*16fb89f9SDmitry Baryshkov return ret; 1780*16fb89f9SDmitry Baryshkov 1781*16fb89f9SDmitry Baryshkov ret = pm_runtime_resume_and_get(&pdev->dev); 1782*16fb89f9SDmitry Baryshkov if (ret) 1783*16fb89f9SDmitry Baryshkov return ret; 1784*16fb89f9SDmitry Baryshkov 1785*16fb89f9SDmitry Baryshkov regmap = qcom_cc_map(pdev, &disp_cc_sm8450_desc); 1786*16fb89f9SDmitry Baryshkov if (IS_ERR(regmap)) 1787*16fb89f9SDmitry Baryshkov return PTR_ERR(regmap); 1788*16fb89f9SDmitry Baryshkov 1789*16fb89f9SDmitry Baryshkov clk_lucid_evo_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); 1790*16fb89f9SDmitry Baryshkov clk_lucid_evo_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config); 1791*16fb89f9SDmitry Baryshkov 1792*16fb89f9SDmitry Baryshkov /* Enable clock gating for MDP clocks */ 1793*16fb89f9SDmitry Baryshkov regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10); 1794*16fb89f9SDmitry Baryshkov 1795*16fb89f9SDmitry Baryshkov /* 1796*16fb89f9SDmitry Baryshkov * Keep clocks always enabled: 1797*16fb89f9SDmitry Baryshkov * disp_cc_xo_clk 1798*16fb89f9SDmitry Baryshkov */ 1799*16fb89f9SDmitry Baryshkov regmap_update_bits(regmap, 0xe05c, BIT(0), BIT(0)); 1800*16fb89f9SDmitry Baryshkov 1801*16fb89f9SDmitry Baryshkov ret = qcom_cc_really_probe(pdev, &disp_cc_sm8450_desc, regmap); 1802*16fb89f9SDmitry Baryshkov 1803*16fb89f9SDmitry Baryshkov pm_runtime_put(&pdev->dev); 1804*16fb89f9SDmitry Baryshkov 1805*16fb89f9SDmitry Baryshkov return ret; 1806*16fb89f9SDmitry Baryshkov } 1807*16fb89f9SDmitry Baryshkov 1808*16fb89f9SDmitry Baryshkov static struct platform_driver disp_cc_sm8450_driver = { 1809*16fb89f9SDmitry Baryshkov .probe = disp_cc_sm8450_probe, 1810*16fb89f9SDmitry Baryshkov .driver = { 1811*16fb89f9SDmitry Baryshkov .name = "disp_cc-sm8450", 1812*16fb89f9SDmitry Baryshkov .of_match_table = disp_cc_sm8450_match_table, 1813*16fb89f9SDmitry Baryshkov }, 1814*16fb89f9SDmitry Baryshkov }; 1815*16fb89f9SDmitry Baryshkov 1816*16fb89f9SDmitry Baryshkov static int __init disp_cc_sm8450_init(void) 1817*16fb89f9SDmitry Baryshkov { 1818*16fb89f9SDmitry Baryshkov return platform_driver_register(&disp_cc_sm8450_driver); 1819*16fb89f9SDmitry Baryshkov } 1820*16fb89f9SDmitry Baryshkov subsys_initcall(disp_cc_sm8450_init); 1821*16fb89f9SDmitry Baryshkov 1822*16fb89f9SDmitry Baryshkov static void __exit disp_cc_sm8450_exit(void) 1823*16fb89f9SDmitry Baryshkov { 1824*16fb89f9SDmitry Baryshkov platform_driver_unregister(&disp_cc_sm8450_driver); 1825*16fb89f9SDmitry Baryshkov } 1826*16fb89f9SDmitry Baryshkov module_exit(disp_cc_sm8450_exit); 1827*16fb89f9SDmitry Baryshkov 1828*16fb89f9SDmitry Baryshkov MODULE_DESCRIPTION("QTI DISPCC SM8450 Driver"); 1829*16fb89f9SDmitry Baryshkov MODULE_LICENSE("GPL"); 1830