19c7e4702STaniya Das // SPDX-License-Identifier: GPL-2.0 29c7e4702STaniya Das /* 3fff2b9a6STaniya Das * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. 49c7e4702STaniya Das */ 59c7e4702STaniya Das 69c7e4702STaniya Das #include <linux/clk-provider.h> 79c7e4702STaniya Das #include <linux/err.h> 89c7e4702STaniya Das #include <linux/kernel.h> 99c7e4702STaniya Das #include <linux/module.h> 109c7e4702STaniya Das #include <linux/of.h> 119c7e4702STaniya Das #include <linux/of_device.h> 129c7e4702STaniya Das #include <linux/platform_device.h> 139c7e4702STaniya Das #include <soc/qcom/cmd-db.h> 149c7e4702STaniya Das #include <soc/qcom/rpmh.h> 156311b652SJordan Crouse #include <soc/qcom/tcs.h> 169c7e4702STaniya Das 179c7e4702STaniya Das #include <dt-bindings/clock/qcom,rpmh.h> 189c7e4702STaniya Das 199c7e4702STaniya Das #define CLK_RPMH_ARC_EN_OFFSET 0 209c7e4702STaniya Das #define CLK_RPMH_VRM_EN_OFFSET 4 219c7e4702STaniya Das 2204053f4dSDavid Dai /** 2304053f4dSDavid Dai * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM) 2404053f4dSDavid Dai * @unit: divisor used to convert Hz value to an RPMh msg 2504053f4dSDavid Dai * @width: multiplier used to convert Hz value to an RPMh msg 2604053f4dSDavid Dai * @vcd: virtual clock domain that this bcm belongs to 2704053f4dSDavid Dai * @reserved: reserved to pad the struct 2804053f4dSDavid Dai */ 2904053f4dSDavid Dai struct bcm_db { 3004053f4dSDavid Dai __le32 unit; 3104053f4dSDavid Dai __le16 width; 3204053f4dSDavid Dai u8 vcd; 3304053f4dSDavid Dai u8 reserved; 3404053f4dSDavid Dai }; 3504053f4dSDavid Dai 369c7e4702STaniya Das /** 379c7e4702STaniya Das * struct clk_rpmh - individual rpmh clock data structure 389c7e4702STaniya Das * @hw: handle between common and hardware-specific interfaces 399c7e4702STaniya Das * @res_name: resource name for the rpmh clock 409c7e4702STaniya Das * @div: clock divider to compute the clock rate 419c7e4702STaniya Das * @res_addr: base address of the rpmh resource within the RPMh 429c7e4702STaniya Das * @res_on_val: rpmh clock enable value 439c7e4702STaniya Das * @state: rpmh clock requested state 449c7e4702STaniya Das * @aggr_state: rpmh clock aggregated state 459c7e4702STaniya Das * @last_sent_aggr_state: rpmh clock last aggr state sent to RPMh 469c7e4702STaniya Das * @valid_state_mask: mask to determine the state of the rpmh clock 4704053f4dSDavid Dai * @unit: divisor to convert rate to rpmh msg in magnitudes of Khz 489c7e4702STaniya Das * @dev: device to which it is attached 499c7e4702STaniya Das * @peer: pointer to the clock rpmh sibling 509c7e4702STaniya Das */ 519c7e4702STaniya Das struct clk_rpmh { 529c7e4702STaniya Das struct clk_hw hw; 539c7e4702STaniya Das const char *res_name; 549c7e4702STaniya Das u8 div; 559c7e4702STaniya Das u32 res_addr; 569c7e4702STaniya Das u32 res_on_val; 579c7e4702STaniya Das u32 state; 589c7e4702STaniya Das u32 aggr_state; 599c7e4702STaniya Das u32 last_sent_aggr_state; 609c7e4702STaniya Das u32 valid_state_mask; 6104053f4dSDavid Dai u32 unit; 629c7e4702STaniya Das struct device *dev; 639c7e4702STaniya Das struct clk_rpmh *peer; 649c7e4702STaniya Das }; 659c7e4702STaniya Das 669c7e4702STaniya Das struct clk_rpmh_desc { 679c7e4702STaniya Das struct clk_hw **clks; 689c7e4702STaniya Das size_t num_clks; 699c7e4702STaniya Das }; 709c7e4702STaniya Das 719c7e4702STaniya Das static DEFINE_MUTEX(rpmh_clk_lock); 729c7e4702STaniya Das 73ec304d02SDmitry Baryshkov #define __DEFINE_CLK_RPMH(_name, _clk_name, _res_name, \ 749c7e4702STaniya Das _res_en_offset, _res_on, _div) \ 75ec304d02SDmitry Baryshkov static struct clk_rpmh clk_rpmh_##_clk_name##_ao; \ 76ec304d02SDmitry Baryshkov static struct clk_rpmh clk_rpmh_##_clk_name = { \ 779c7e4702STaniya Das .res_name = _res_name, \ 789c7e4702STaniya Das .res_addr = _res_en_offset, \ 799c7e4702STaniya Das .res_on_val = _res_on, \ 809c7e4702STaniya Das .div = _div, \ 81ec304d02SDmitry Baryshkov .peer = &clk_rpmh_##_clk_name##_ao, \ 829c7e4702STaniya Das .valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) | \ 839c7e4702STaniya Das BIT(RPMH_ACTIVE_ONLY_STATE) | \ 849c7e4702STaniya Das BIT(RPMH_SLEEP_STATE)), \ 859c7e4702STaniya Das .hw.init = &(struct clk_init_data){ \ 869c7e4702STaniya Das .ops = &clk_rpmh_ops, \ 879c7e4702STaniya Das .name = #_name, \ 88a64a9e51SVinod Koul .parent_data = &(const struct clk_parent_data){ \ 89a64a9e51SVinod Koul .fw_name = "xo", \ 90a64a9e51SVinod Koul .name = "xo_board", \ 91a64a9e51SVinod Koul }, \ 929c7e4702STaniya Das .num_parents = 1, \ 939c7e4702STaniya Das }, \ 949c7e4702STaniya Das }; \ 95ec304d02SDmitry Baryshkov static struct clk_rpmh clk_rpmh_##_clk_name##_ao= { \ 969c7e4702STaniya Das .res_name = _res_name, \ 979c7e4702STaniya Das .res_addr = _res_en_offset, \ 989c7e4702STaniya Das .res_on_val = _res_on, \ 999c7e4702STaniya Das .div = _div, \ 100ec304d02SDmitry Baryshkov .peer = &clk_rpmh_##_clk_name, \ 1019c7e4702STaniya Das .valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) | \ 1029c7e4702STaniya Das BIT(RPMH_ACTIVE_ONLY_STATE)), \ 1039c7e4702STaniya Das .hw.init = &(struct clk_init_data){ \ 1049c7e4702STaniya Das .ops = &clk_rpmh_ops, \ 105012c226fSDmitry Baryshkov .name = #_name "_ao", \ 106a64a9e51SVinod Koul .parent_data = &(const struct clk_parent_data){ \ 107a64a9e51SVinod Koul .fw_name = "xo", \ 108a64a9e51SVinod Koul .name = "xo_board", \ 109a64a9e51SVinod Koul }, \ 1109c7e4702STaniya Das .num_parents = 1, \ 1119c7e4702STaniya Das }, \ 1129c7e4702STaniya Das } 1139c7e4702STaniya Das 114ec304d02SDmitry Baryshkov #define DEFINE_CLK_RPMH_ARC(_name, _res_name, _res_on, _div) \ 115ec304d02SDmitry Baryshkov __DEFINE_CLK_RPMH(_name, _name##_##div##_div, _res_name, \ 1169c7e4702STaniya Das CLK_RPMH_ARC_EN_OFFSET, _res_on, _div) 1179c7e4702STaniya Das 118ec304d02SDmitry Baryshkov #define DEFINE_CLK_RPMH_VRM(_name, _suffix, _res_name, _div) \ 119ec304d02SDmitry Baryshkov __DEFINE_CLK_RPMH(_name, _name##_suffix, _res_name, \ 1209c7e4702STaniya Das CLK_RPMH_VRM_EN_OFFSET, 1, _div) 1219c7e4702STaniya Das 122fe20294fSDmitry Baryshkov #define DEFINE_CLK_RPMH_BCM(_name, _res_name) \ 123fe20294fSDmitry Baryshkov static struct clk_rpmh clk_rpmh_##_name = { \ 12404053f4dSDavid Dai .res_name = _res_name, \ 12504053f4dSDavid Dai .valid_state_mask = BIT(RPMH_ACTIVE_ONLY_STATE), \ 12604053f4dSDavid Dai .div = 1, \ 12704053f4dSDavid Dai .hw.init = &(struct clk_init_data){ \ 12804053f4dSDavid Dai .ops = &clk_rpmh_bcm_ops, \ 12904053f4dSDavid Dai .name = #_name, \ 13004053f4dSDavid Dai }, \ 13104053f4dSDavid Dai } 13204053f4dSDavid Dai 1339c7e4702STaniya Das static inline struct clk_rpmh *to_clk_rpmh(struct clk_hw *_hw) 1349c7e4702STaniya Das { 1359c7e4702STaniya Das return container_of(_hw, struct clk_rpmh, hw); 1369c7e4702STaniya Das } 1379c7e4702STaniya Das 1389c7e4702STaniya Das static inline bool has_state_changed(struct clk_rpmh *c, u32 state) 1399c7e4702STaniya Das { 1409c7e4702STaniya Das return (c->last_sent_aggr_state & BIT(state)) 1419c7e4702STaniya Das != (c->aggr_state & BIT(state)); 1429c7e4702STaniya Das } 1439c7e4702STaniya Das 144dad4e7fdSMike Tipton static int clk_rpmh_send(struct clk_rpmh *c, enum rpmh_state state, 145dad4e7fdSMike Tipton struct tcs_cmd *cmd, bool wait) 146dad4e7fdSMike Tipton { 147dad4e7fdSMike Tipton if (wait) 148dad4e7fdSMike Tipton return rpmh_write(c->dev, state, cmd, 1); 149dad4e7fdSMike Tipton 150dad4e7fdSMike Tipton return rpmh_write_async(c->dev, state, cmd, 1); 151dad4e7fdSMike Tipton } 152dad4e7fdSMike Tipton 1539c7e4702STaniya Das static int clk_rpmh_send_aggregate_command(struct clk_rpmh *c) 1549c7e4702STaniya Das { 1559c7e4702STaniya Das struct tcs_cmd cmd = { 0 }; 1569c7e4702STaniya Das u32 cmd_state, on_val; 1579c7e4702STaniya Das enum rpmh_state state = RPMH_SLEEP_STATE; 1589c7e4702STaniya Das int ret; 159dad4e7fdSMike Tipton bool wait; 1609c7e4702STaniya Das 1619c7e4702STaniya Das cmd.addr = c->res_addr; 1629c7e4702STaniya Das cmd_state = c->aggr_state; 1639c7e4702STaniya Das on_val = c->res_on_val; 1649c7e4702STaniya Das 1659c7e4702STaniya Das for (; state <= RPMH_ACTIVE_ONLY_STATE; state++) { 1669c7e4702STaniya Das if (has_state_changed(c, state)) { 1679c7e4702STaniya Das if (cmd_state & BIT(state)) 1689c7e4702STaniya Das cmd.data = on_val; 1699c7e4702STaniya Das 170dad4e7fdSMike Tipton wait = cmd_state && state == RPMH_ACTIVE_ONLY_STATE; 171dad4e7fdSMike Tipton ret = clk_rpmh_send(c, state, &cmd, wait); 1729c7e4702STaniya Das if (ret) { 1739c7e4702STaniya Das dev_err(c->dev, "set %s state of %s failed: (%d)\n", 1749c7e4702STaniya Das !state ? "sleep" : 1759c7e4702STaniya Das state == RPMH_WAKE_ONLY_STATE ? 1769c7e4702STaniya Das "wake" : "active", c->res_name, ret); 1779c7e4702STaniya Das return ret; 1789c7e4702STaniya Das } 1799c7e4702STaniya Das } 1809c7e4702STaniya Das } 1819c7e4702STaniya Das 1829c7e4702STaniya Das c->last_sent_aggr_state = c->aggr_state; 1839c7e4702STaniya Das c->peer->last_sent_aggr_state = c->last_sent_aggr_state; 1849c7e4702STaniya Das 1859c7e4702STaniya Das return 0; 1869c7e4702STaniya Das } 1879c7e4702STaniya Das 1889c7e4702STaniya Das /* 1899c7e4702STaniya Das * Update state and aggregate state values based on enable value. 1909c7e4702STaniya Das */ 1919c7e4702STaniya Das static int clk_rpmh_aggregate_state_send_command(struct clk_rpmh *c, 1929c7e4702STaniya Das bool enable) 1939c7e4702STaniya Das { 1949c7e4702STaniya Das int ret; 1959c7e4702STaniya Das 1969c7e4702STaniya Das c->state = enable ? c->valid_state_mask : 0; 1979c7e4702STaniya Das c->aggr_state = c->state | c->peer->state; 1989c7e4702STaniya Das c->peer->aggr_state = c->aggr_state; 1999c7e4702STaniya Das 2009c7e4702STaniya Das ret = clk_rpmh_send_aggregate_command(c); 2019c7e4702STaniya Das if (!ret) 2029c7e4702STaniya Das return 0; 2039c7e4702STaniya Das 2049c7e4702STaniya Das if (ret && enable) 2059c7e4702STaniya Das c->state = 0; 2069c7e4702STaniya Das else if (ret) 2079c7e4702STaniya Das c->state = c->valid_state_mask; 2089c7e4702STaniya Das 2099c7e4702STaniya Das WARN(1, "clk: %s failed to %s\n", c->res_name, 2109c7e4702STaniya Das enable ? "enable" : "disable"); 2119c7e4702STaniya Das return ret; 2129c7e4702STaniya Das } 2139c7e4702STaniya Das 2149c7e4702STaniya Das static int clk_rpmh_prepare(struct clk_hw *hw) 2159c7e4702STaniya Das { 2169c7e4702STaniya Das struct clk_rpmh *c = to_clk_rpmh(hw); 2179c7e4702STaniya Das int ret = 0; 2189c7e4702STaniya Das 2199c7e4702STaniya Das mutex_lock(&rpmh_clk_lock); 2209c7e4702STaniya Das ret = clk_rpmh_aggregate_state_send_command(c, true); 2219c7e4702STaniya Das mutex_unlock(&rpmh_clk_lock); 2229c7e4702STaniya Das 2239c7e4702STaniya Das return ret; 224751d7923SStephen Boyd } 2259c7e4702STaniya Das 2269c7e4702STaniya Das static void clk_rpmh_unprepare(struct clk_hw *hw) 2279c7e4702STaniya Das { 2289c7e4702STaniya Das struct clk_rpmh *c = to_clk_rpmh(hw); 2299c7e4702STaniya Das 2309c7e4702STaniya Das mutex_lock(&rpmh_clk_lock); 2319c7e4702STaniya Das clk_rpmh_aggregate_state_send_command(c, false); 2329c7e4702STaniya Das mutex_unlock(&rpmh_clk_lock); 2339c7e4702STaniya Das }; 2349c7e4702STaniya Das 2359c7e4702STaniya Das static unsigned long clk_rpmh_recalc_rate(struct clk_hw *hw, 2369c7e4702STaniya Das unsigned long prate) 2379c7e4702STaniya Das { 2389c7e4702STaniya Das struct clk_rpmh *r = to_clk_rpmh(hw); 2399c7e4702STaniya Das 2409c7e4702STaniya Das /* 2419c7e4702STaniya Das * RPMh clocks have a fixed rate. Return static rate. 2429c7e4702STaniya Das */ 2439c7e4702STaniya Das return prate / r->div; 2449c7e4702STaniya Das } 2459c7e4702STaniya Das 2469c7e4702STaniya Das static const struct clk_ops clk_rpmh_ops = { 2479c7e4702STaniya Das .prepare = clk_rpmh_prepare, 2489c7e4702STaniya Das .unprepare = clk_rpmh_unprepare, 2499c7e4702STaniya Das .recalc_rate = clk_rpmh_recalc_rate, 2509c7e4702STaniya Das }; 2519c7e4702STaniya Das 25204053f4dSDavid Dai static int clk_rpmh_bcm_send_cmd(struct clk_rpmh *c, bool enable) 25304053f4dSDavid Dai { 25404053f4dSDavid Dai struct tcs_cmd cmd = { 0 }; 25504053f4dSDavid Dai u32 cmd_state; 2562cf7a4cbSStephen Boyd int ret = 0; 25704053f4dSDavid Dai 25804053f4dSDavid Dai mutex_lock(&rpmh_clk_lock); 25904053f4dSDavid Dai if (enable) { 26004053f4dSDavid Dai cmd_state = 1; 26104053f4dSDavid Dai if (c->aggr_state) 26204053f4dSDavid Dai cmd_state = c->aggr_state; 2632cf7a4cbSStephen Boyd } else { 2642cf7a4cbSStephen Boyd cmd_state = 0; 26504053f4dSDavid Dai } 26604053f4dSDavid Dai 2672cf7a4cbSStephen Boyd if (c->last_sent_aggr_state != cmd_state) { 26804053f4dSDavid Dai cmd.addr = c->res_addr; 2696311b652SJordan Crouse cmd.data = BCM_TCS_CMD(1, enable, 0, cmd_state); 27004053f4dSDavid Dai 27129f66b62SStephen Boyd /* 27229f66b62SStephen Boyd * Send only an active only state request. RPMh continues to 27329f66b62SStephen Boyd * use the active state when we're in sleep/wake state as long 27429f66b62SStephen Boyd * as the sleep/wake state has never been set. 27529f66b62SStephen Boyd */ 276dad4e7fdSMike Tipton ret = clk_rpmh_send(c, RPMH_ACTIVE_ONLY_STATE, &cmd, enable); 27704053f4dSDavid Dai if (ret) { 27804053f4dSDavid Dai dev_err(c->dev, "set active state of %s failed: (%d)\n", 27904053f4dSDavid Dai c->res_name, ret); 2802cf7a4cbSStephen Boyd } else { 2812cf7a4cbSStephen Boyd c->last_sent_aggr_state = cmd_state; 2822cf7a4cbSStephen Boyd } 28304053f4dSDavid Dai } 28404053f4dSDavid Dai 28504053f4dSDavid Dai mutex_unlock(&rpmh_clk_lock); 28604053f4dSDavid Dai 2872cf7a4cbSStephen Boyd return ret; 28804053f4dSDavid Dai } 28904053f4dSDavid Dai 29004053f4dSDavid Dai static int clk_rpmh_bcm_prepare(struct clk_hw *hw) 29104053f4dSDavid Dai { 29204053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 29304053f4dSDavid Dai 29404053f4dSDavid Dai return clk_rpmh_bcm_send_cmd(c, true); 295751d7923SStephen Boyd } 29604053f4dSDavid Dai 29704053f4dSDavid Dai static void clk_rpmh_bcm_unprepare(struct clk_hw *hw) 29804053f4dSDavid Dai { 29904053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 30004053f4dSDavid Dai 30104053f4dSDavid Dai clk_rpmh_bcm_send_cmd(c, false); 302751d7923SStephen Boyd } 30304053f4dSDavid Dai 30404053f4dSDavid Dai static int clk_rpmh_bcm_set_rate(struct clk_hw *hw, unsigned long rate, 30504053f4dSDavid Dai unsigned long parent_rate) 30604053f4dSDavid Dai { 30704053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 30804053f4dSDavid Dai 30904053f4dSDavid Dai c->aggr_state = rate / c->unit; 31004053f4dSDavid Dai /* 31104053f4dSDavid Dai * Since any non-zero value sent to hw would result in enabling the 31204053f4dSDavid Dai * clock, only send the value if the clock has already been prepared. 31304053f4dSDavid Dai */ 31404053f4dSDavid Dai if (clk_hw_is_prepared(hw)) 31504053f4dSDavid Dai clk_rpmh_bcm_send_cmd(c, true); 31604053f4dSDavid Dai 31704053f4dSDavid Dai return 0; 318751d7923SStephen Boyd } 31904053f4dSDavid Dai 32004053f4dSDavid Dai static long clk_rpmh_round_rate(struct clk_hw *hw, unsigned long rate, 32104053f4dSDavid Dai unsigned long *parent_rate) 32204053f4dSDavid Dai { 32304053f4dSDavid Dai return rate; 32404053f4dSDavid Dai } 32504053f4dSDavid Dai 32604053f4dSDavid Dai static unsigned long clk_rpmh_bcm_recalc_rate(struct clk_hw *hw, 32704053f4dSDavid Dai unsigned long prate) 32804053f4dSDavid Dai { 32904053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 33004053f4dSDavid Dai 33104053f4dSDavid Dai return c->aggr_state * c->unit; 33204053f4dSDavid Dai } 33304053f4dSDavid Dai 33404053f4dSDavid Dai static const struct clk_ops clk_rpmh_bcm_ops = { 33504053f4dSDavid Dai .prepare = clk_rpmh_bcm_prepare, 33604053f4dSDavid Dai .unprepare = clk_rpmh_bcm_unprepare, 33704053f4dSDavid Dai .set_rate = clk_rpmh_bcm_set_rate, 33804053f4dSDavid Dai .round_rate = clk_rpmh_round_rate, 33904053f4dSDavid Dai .recalc_rate = clk_rpmh_bcm_recalc_rate, 34004053f4dSDavid Dai }; 34104053f4dSDavid Dai 342f5790382SStephen Boyd /* Resource name must match resource id present in cmd-db */ 343ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_ARC(bi_tcxo, "xo.lvl", 0x3, 1); 344ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_ARC(bi_tcxo, "xo.lvl", 0x3, 2); 345ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_ARC(bi_tcxo, "xo.lvl", 0x3, 4); 346ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_ARC(qlink, "qphy.lvl", 0x1, 4); 34782349cc0SDmitry Baryshkov 348ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(ln_bb_clk1, _a2, "lnbclka1", 2); 349ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(ln_bb_clk2, _a2, "lnbclka2", 2); 350ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(ln_bb_clk3, _a2, "lnbclka3", 2); 35182349cc0SDmitry Baryshkov 352ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(ln_bb_clk1, _a4, "lnbclka1", 4); 353ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(ln_bb_clk2, _a4, "lnbclka2", 4); 35482349cc0SDmitry Baryshkov 355ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(ln_bb_clk2, _g4, "lnbclkg2", 4); 356ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(ln_bb_clk3, _g4, "lnbclkg3", 4); 35782349cc0SDmitry Baryshkov 358ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(rf_clk1, _a, "rfclka1", 1); 359ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(rf_clk2, _a, "rfclka2", 1); 360ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(rf_clk3, _a, "rfclka3", 1); 361ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(rf_clk4, _a, "rfclka4", 1); 362ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(rf_clk5, _a, "rfclka5", 1); 36382349cc0SDmitry Baryshkov 364ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(rf_clk1, _d, "rfclkd1", 1); 365ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(rf_clk2, _d, "rfclkd2", 1); 366ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(rf_clk3, _d, "rfclkd3", 1); 367ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(rf_clk4, _d, "rfclkd4", 1); 36882349cc0SDmitry Baryshkov 369478a573bSAbel Vesa DEFINE_CLK_RPMH_VRM(clk1, _a1, "clka1", 1); 370478a573bSAbel Vesa DEFINE_CLK_RPMH_VRM(clk2, _a1, "clka2", 1); 371478a573bSAbel Vesa DEFINE_CLK_RPMH_VRM(clk3, _a1, "clka3", 1); 372478a573bSAbel Vesa DEFINE_CLK_RPMH_VRM(clk4, _a1, "clka4", 1); 373478a573bSAbel Vesa DEFINE_CLK_RPMH_VRM(clk5, _a1, "clka5", 1); 374478a573bSAbel Vesa 375478a573bSAbel Vesa DEFINE_CLK_RPMH_VRM(clk6, _a2, "clka6", 2); 376478a573bSAbel Vesa DEFINE_CLK_RPMH_VRM(clk7, _a2, "clka7", 2); 377478a573bSAbel Vesa DEFINE_CLK_RPMH_VRM(clk8, _a2, "clka8", 2); 378478a573bSAbel Vesa 379ec304d02SDmitry Baryshkov DEFINE_CLK_RPMH_VRM(div_clk1, _div2, "divclka1", 2); 38082349cc0SDmitry Baryshkov 381fe20294fSDmitry Baryshkov DEFINE_CLK_RPMH_BCM(ce, "CE0"); 382fe20294fSDmitry Baryshkov DEFINE_CLK_RPMH_BCM(hwkm, "HK0"); 383fe20294fSDmitry Baryshkov DEFINE_CLK_RPMH_BCM(ipa, "IP0"); 384fe20294fSDmitry Baryshkov DEFINE_CLK_RPMH_BCM(pka, "PKA0"); 385fe20294fSDmitry Baryshkov DEFINE_CLK_RPMH_BCM(qpic_clk, "QP0"); 3869c7e4702STaniya Das 3879c7e4702STaniya Das static struct clk_hw *sdm845_rpmh_clocks[] = { 388ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 389ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 390ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a2.hw, 391ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a2_ao.hw, 392ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3] = &clk_rpmh_ln_bb_clk3_a2.hw, 393ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3_A] = &clk_rpmh_ln_bb_clk3_a2_ao.hw, 394ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, 395ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, 396ec304d02SDmitry Baryshkov [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw, 397ec304d02SDmitry Baryshkov [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw, 398ec304d02SDmitry Baryshkov [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a.hw, 399ec304d02SDmitry Baryshkov [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a_ao.hw, 400fe20294fSDmitry Baryshkov [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 401fe20294fSDmitry Baryshkov [RPMH_CE_CLK] = &clk_rpmh_ce.hw, 4029c7e4702STaniya Das }; 4039c7e4702STaniya Das 4049c7e4702STaniya Das static const struct clk_rpmh_desc clk_rpmh_sdm845 = { 4059c7e4702STaniya Das .clks = sdm845_rpmh_clocks, 4069c7e4702STaniya Das .num_clks = ARRAY_SIZE(sdm845_rpmh_clocks), 4079c7e4702STaniya Das }; 4089c7e4702STaniya Das 409*ce273e69SBartosz Golaszewski static struct clk_hw *sa8775p_rpmh_clocks[] = { 410*ce273e69SBartosz Golaszewski [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 411*ce273e69SBartosz Golaszewski [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 412*ce273e69SBartosz Golaszewski [RPMH_LN_BB_CLK1] = &clk_rpmh_ln_bb_clk1_a2.hw, 413*ce273e69SBartosz Golaszewski [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a2.hw, 414*ce273e69SBartosz Golaszewski [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a4_ao.hw, 415*ce273e69SBartosz Golaszewski [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 416*ce273e69SBartosz Golaszewski [RPMH_PKA_CLK] = &clk_rpmh_pka.hw, 417*ce273e69SBartosz Golaszewski [RPMH_HWKM_CLK] = &clk_rpmh_hwkm.hw, 418*ce273e69SBartosz Golaszewski }; 419*ce273e69SBartosz Golaszewski 420*ce273e69SBartosz Golaszewski static const struct clk_rpmh_desc clk_rpmh_sa8775p = { 421*ce273e69SBartosz Golaszewski .clks = sa8775p_rpmh_clocks, 422*ce273e69SBartosz Golaszewski .num_clks = ARRAY_SIZE(sa8775p_rpmh_clocks), 423*ce273e69SBartosz Golaszewski }; 424*ce273e69SBartosz Golaszewski 4252ded040cSRichard Acayan static struct clk_hw *sdm670_rpmh_clocks[] = { 426ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 427ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 428ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a2.hw, 429ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a2_ao.hw, 430ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3] = &clk_rpmh_ln_bb_clk3_a2.hw, 431ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3_A] = &clk_rpmh_ln_bb_clk3_a2_ao.hw, 432ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, 433ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, 434ec304d02SDmitry Baryshkov [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw, 435ec304d02SDmitry Baryshkov [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw, 436fe20294fSDmitry Baryshkov [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 437fe20294fSDmitry Baryshkov [RPMH_CE_CLK] = &clk_rpmh_ce.hw, 4382ded040cSRichard Acayan }; 4392ded040cSRichard Acayan 4402ded040cSRichard Acayan static const struct clk_rpmh_desc clk_rpmh_sdm670 = { 4412ded040cSRichard Acayan .clks = sdm670_rpmh_clocks, 4422ded040cSRichard Acayan .num_clks = ARRAY_SIZE(sdm670_rpmh_clocks), 4432ded040cSRichard Acayan }; 4442ded040cSRichard Acayan 445f7b36cc1SVinod Koul static struct clk_hw *sdx55_rpmh_clocks[] = { 446ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 447ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 448ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_d.hw, 449ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_d_ao.hw, 450ec304d02SDmitry Baryshkov [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_d.hw, 451ec304d02SDmitry Baryshkov [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_d_ao.hw, 452fe20294fSDmitry Baryshkov [RPMH_QPIC_CLK] = &clk_rpmh_qpic_clk.hw, 453fe20294fSDmitry Baryshkov [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 454f7b36cc1SVinod Koul }; 455f7b36cc1SVinod Koul 456f7b36cc1SVinod Koul static const struct clk_rpmh_desc clk_rpmh_sdx55 = { 457f7b36cc1SVinod Koul .clks = sdx55_rpmh_clocks, 458f7b36cc1SVinod Koul .num_clks = ARRAY_SIZE(sdx55_rpmh_clocks), 459f7b36cc1SVinod Koul }; 460f7b36cc1SVinod Koul 4612243fd41SVinod Koul static struct clk_hw *sm8150_rpmh_clocks[] = { 462ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 463ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 464ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a2.hw, 465ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a2_ao.hw, 466ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3] = &clk_rpmh_ln_bb_clk3_a2.hw, 467ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3_A] = &clk_rpmh_ln_bb_clk3_a2_ao.hw, 468ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, 469ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, 470ec304d02SDmitry Baryshkov [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw, 471ec304d02SDmitry Baryshkov [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw, 472ec304d02SDmitry Baryshkov [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a.hw, 473ec304d02SDmitry Baryshkov [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a_ao.hw, 4742243fd41SVinod Koul }; 4752243fd41SVinod Koul 4762243fd41SVinod Koul static const struct clk_rpmh_desc clk_rpmh_sm8150 = { 4772243fd41SVinod Koul .clks = sm8150_rpmh_clocks, 4782243fd41SVinod Koul .num_clks = ARRAY_SIZE(sm8150_rpmh_clocks), 4792243fd41SVinod Koul }; 4802243fd41SVinod Koul 481eee28109STaniya Das static struct clk_hw *sc7180_rpmh_clocks[] = { 482ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 483ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 484ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a2.hw, 485ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a2_ao.hw, 486ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3] = &clk_rpmh_ln_bb_clk3_a2.hw, 487ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3_A] = &clk_rpmh_ln_bb_clk3_a2_ao.hw, 488ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, 489ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, 490ec304d02SDmitry Baryshkov [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw, 491ec304d02SDmitry Baryshkov [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw, 492fe20294fSDmitry Baryshkov [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 493eee28109STaniya Das }; 494eee28109STaniya Das 495eee28109STaniya Das static const struct clk_rpmh_desc clk_rpmh_sc7180 = { 496eee28109STaniya Das .clks = sc7180_rpmh_clocks, 497eee28109STaniya Das .num_clks = ARRAY_SIZE(sc7180_rpmh_clocks), 498eee28109STaniya Das }; 499eee28109STaniya Das 5008a1f7fb1SBjorn Andersson static struct clk_hw *sc8180x_rpmh_clocks[] = { 501ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 502ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 503ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a2.hw, 504ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a2_ao.hw, 505ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3] = &clk_rpmh_ln_bb_clk3_a2.hw, 506ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3_A] = &clk_rpmh_ln_bb_clk3_a2_ao.hw, 507ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_d.hw, 508ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_d_ao.hw, 509ec304d02SDmitry Baryshkov [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_d.hw, 510ec304d02SDmitry Baryshkov [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_d_ao.hw, 511ec304d02SDmitry Baryshkov [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_d.hw, 512ec304d02SDmitry Baryshkov [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_d_ao.hw, 5138a1f7fb1SBjorn Andersson }; 5148a1f7fb1SBjorn Andersson 5158a1f7fb1SBjorn Andersson static const struct clk_rpmh_desc clk_rpmh_sc8180x = { 5168a1f7fb1SBjorn Andersson .clks = sc8180x_rpmh_clocks, 5178a1f7fb1SBjorn Andersson .num_clks = ARRAY_SIZE(sc8180x_rpmh_clocks), 5188a1f7fb1SBjorn Andersson }; 5198a1f7fb1SBjorn Andersson 52029093b1aSTaniya Das static struct clk_hw *sm8250_rpmh_clocks[] = { 521ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 522ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 523ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK1] = &clk_rpmh_ln_bb_clk1_a2.hw, 524ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK1_A] = &clk_rpmh_ln_bb_clk1_a2_ao.hw, 525ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a2.hw, 526ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a2_ao.hw, 527ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3] = &clk_rpmh_ln_bb_clk3_a2.hw, 528ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3_A] = &clk_rpmh_ln_bb_clk3_a2_ao.hw, 529ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, 530ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, 531ec304d02SDmitry Baryshkov [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a.hw, 532ec304d02SDmitry Baryshkov [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a_ao.hw, 53329093b1aSTaniya Das }; 53429093b1aSTaniya Das 53529093b1aSTaniya Das static const struct clk_rpmh_desc clk_rpmh_sm8250 = { 53629093b1aSTaniya Das .clks = sm8250_rpmh_clocks, 53729093b1aSTaniya Das .num_clks = ARRAY_SIZE(sm8250_rpmh_clocks), 53829093b1aSTaniya Das }; 53929093b1aSTaniya Das 540f7b36cc1SVinod Koul static struct clk_hw *sm8350_rpmh_clocks[] = { 541ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 542ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 543ec304d02SDmitry Baryshkov [RPMH_DIV_CLK1] = &clk_rpmh_div_clk1_div2.hw, 544ec304d02SDmitry Baryshkov [RPMH_DIV_CLK1_A] = &clk_rpmh_div_clk1_div2_ao.hw, 545ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK1] = &clk_rpmh_ln_bb_clk1_a2.hw, 546ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK1_A] = &clk_rpmh_ln_bb_clk1_a2_ao.hw, 547ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a2.hw, 548ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a2_ao.hw, 549ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, 550ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, 551ec304d02SDmitry Baryshkov [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a.hw, 552ec304d02SDmitry Baryshkov [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a_ao.hw, 553ec304d02SDmitry Baryshkov [RPMH_RF_CLK4] = &clk_rpmh_rf_clk4_a.hw, 554ec304d02SDmitry Baryshkov [RPMH_RF_CLK4_A] = &clk_rpmh_rf_clk4_a_ao.hw, 555ec304d02SDmitry Baryshkov [RPMH_RF_CLK5] = &clk_rpmh_rf_clk5_a.hw, 556ec304d02SDmitry Baryshkov [RPMH_RF_CLK5_A] = &clk_rpmh_rf_clk5_a_ao.hw, 557fe20294fSDmitry Baryshkov [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 558fe20294fSDmitry Baryshkov [RPMH_PKA_CLK] = &clk_rpmh_pka.hw, 559fe20294fSDmitry Baryshkov [RPMH_HWKM_CLK] = &clk_rpmh_hwkm.hw, 560afacfbbeSManivannan Sadhasivam }; 561afacfbbeSManivannan Sadhasivam 562f7b36cc1SVinod Koul static const struct clk_rpmh_desc clk_rpmh_sm8350 = { 563f7b36cc1SVinod Koul .clks = sm8350_rpmh_clocks, 564f7b36cc1SVinod Koul .num_clks = ARRAY_SIZE(sm8350_rpmh_clocks), 565afacfbbeSManivannan Sadhasivam }; 566afacfbbeSManivannan Sadhasivam 567809b4828SBjorn Andersson static struct clk_hw *sc8280xp_rpmh_clocks[] = { 568ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 569ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 570ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3] = &clk_rpmh_ln_bb_clk3_a2.hw, 571ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3_A] = &clk_rpmh_ln_bb_clk3_a2_ao.hw, 572fe20294fSDmitry Baryshkov [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 573fe20294fSDmitry Baryshkov [RPMH_PKA_CLK] = &clk_rpmh_pka.hw, 574fe20294fSDmitry Baryshkov [RPMH_HWKM_CLK] = &clk_rpmh_hwkm.hw, 575809b4828SBjorn Andersson }; 576809b4828SBjorn Andersson 577809b4828SBjorn Andersson static const struct clk_rpmh_desc clk_rpmh_sc8280xp = { 578809b4828SBjorn Andersson .clks = sc8280xp_rpmh_clocks, 579809b4828SBjorn Andersson .num_clks = ARRAY_SIZE(sc8280xp_rpmh_clocks), 580809b4828SBjorn Andersson }; 581809b4828SBjorn Andersson 582ab5d3179SVinod Koul static struct clk_hw *sm8450_rpmh_clocks[] = { 583ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div4.hw, 584ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div4_ao.hw, 585ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK1] = &clk_rpmh_ln_bb_clk1_a4.hw, 586ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK1_A] = &clk_rpmh_ln_bb_clk1_a4_ao.hw, 587ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a4.hw, 588ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a4_ao.hw, 589ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, 590ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, 591ec304d02SDmitry Baryshkov [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw, 592ec304d02SDmitry Baryshkov [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw, 593ec304d02SDmitry Baryshkov [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a.hw, 594ec304d02SDmitry Baryshkov [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a_ao.hw, 595ec304d02SDmitry Baryshkov [RPMH_RF_CLK4] = &clk_rpmh_rf_clk4_a.hw, 596ec304d02SDmitry Baryshkov [RPMH_RF_CLK4_A] = &clk_rpmh_rf_clk4_a_ao.hw, 597fe20294fSDmitry Baryshkov [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 598ab5d3179SVinod Koul }; 599ab5d3179SVinod Koul 600ab5d3179SVinod Koul static const struct clk_rpmh_desc clk_rpmh_sm8450 = { 601ab5d3179SVinod Koul .clks = sm8450_rpmh_clocks, 602ab5d3179SVinod Koul .num_clks = ARRAY_SIZE(sm8450_rpmh_clocks), 603ab5d3179SVinod Koul }; 604ab5d3179SVinod Koul 605478a573bSAbel Vesa static struct clk_hw *sm8550_rpmh_clocks[] = { 606478a573bSAbel Vesa [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, 607478a573bSAbel Vesa [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, 608478a573bSAbel Vesa [RPMH_LN_BB_CLK1] = &clk_rpmh_clk6_a2.hw, 609478a573bSAbel Vesa [RPMH_LN_BB_CLK1_A] = &clk_rpmh_clk6_a2_ao.hw, 610478a573bSAbel Vesa [RPMH_LN_BB_CLK2] = &clk_rpmh_clk7_a2.hw, 611478a573bSAbel Vesa [RPMH_LN_BB_CLK2_A] = &clk_rpmh_clk7_a2_ao.hw, 612478a573bSAbel Vesa [RPMH_LN_BB_CLK3] = &clk_rpmh_clk8_a2.hw, 613478a573bSAbel Vesa [RPMH_LN_BB_CLK3_A] = &clk_rpmh_clk8_a2_ao.hw, 614478a573bSAbel Vesa [RPMH_RF_CLK1] = &clk_rpmh_clk1_a1.hw, 615478a573bSAbel Vesa [RPMH_RF_CLK1_A] = &clk_rpmh_clk1_a1_ao.hw, 616478a573bSAbel Vesa [RPMH_RF_CLK2] = &clk_rpmh_clk2_a1.hw, 617478a573bSAbel Vesa [RPMH_RF_CLK2_A] = &clk_rpmh_clk2_a1_ao.hw, 618478a573bSAbel Vesa [RPMH_RF_CLK3] = &clk_rpmh_clk3_a1.hw, 619478a573bSAbel Vesa [RPMH_RF_CLK3_A] = &clk_rpmh_clk3_a1_ao.hw, 620478a573bSAbel Vesa [RPMH_RF_CLK4] = &clk_rpmh_clk4_a1.hw, 621478a573bSAbel Vesa [RPMH_RF_CLK4_A] = &clk_rpmh_clk4_a1_ao.hw, 622478a573bSAbel Vesa [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 623478a573bSAbel Vesa }; 624478a573bSAbel Vesa 625478a573bSAbel Vesa static const struct clk_rpmh_desc clk_rpmh_sm8550 = { 626478a573bSAbel Vesa .clks = sm8550_rpmh_clocks, 627478a573bSAbel Vesa .num_clks = ARRAY_SIZE(sm8550_rpmh_clocks), 628478a573bSAbel Vesa }; 629478a573bSAbel Vesa 630fff2b9a6STaniya Das static struct clk_hw *sc7280_rpmh_clocks[] = { 631ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div4.hw, 632ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div4_ao.hw, 633ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_a2.hw, 634ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_a2_ao.hw, 635ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, 636ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, 637ec304d02SDmitry Baryshkov [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a.hw, 638ec304d02SDmitry Baryshkov [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a_ao.hw, 639ec304d02SDmitry Baryshkov [RPMH_RF_CLK4] = &clk_rpmh_rf_clk4_a.hw, 640ec304d02SDmitry Baryshkov [RPMH_RF_CLK4_A] = &clk_rpmh_rf_clk4_a_ao.hw, 641fe20294fSDmitry Baryshkov [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 642fe20294fSDmitry Baryshkov [RPMH_PKA_CLK] = &clk_rpmh_pka.hw, 643fe20294fSDmitry Baryshkov [RPMH_HWKM_CLK] = &clk_rpmh_hwkm.hw, 644fff2b9a6STaniya Das }; 645fff2b9a6STaniya Das 646fff2b9a6STaniya Das static const struct clk_rpmh_desc clk_rpmh_sc7280 = { 647fff2b9a6STaniya Das .clks = sc7280_rpmh_clocks, 648fff2b9a6STaniya Das .num_clks = ARRAY_SIZE(sc7280_rpmh_clocks), 649fff2b9a6STaniya Das }; 650fff2b9a6STaniya Das 651be5b605dSKonrad Dybcio static struct clk_hw *sm6350_rpmh_clocks[] = { 652ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div4.hw, 653ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div4_ao.hw, 654ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2] = &clk_rpmh_ln_bb_clk2_g4.hw, 655ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK2_A] = &clk_rpmh_ln_bb_clk2_g4_ao.hw, 656ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3] = &clk_rpmh_ln_bb_clk3_g4.hw, 657ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK3_A] = &clk_rpmh_ln_bb_clk3_g4_ao.hw, 658ec304d02SDmitry Baryshkov [RPMH_QLINK_CLK] = &clk_rpmh_qlink_div4.hw, 659ec304d02SDmitry Baryshkov [RPMH_QLINK_CLK_A] = &clk_rpmh_qlink_div4_ao.hw, 6602931aa67SLuca Weiss [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 661be5b605dSKonrad Dybcio }; 662be5b605dSKonrad Dybcio 663be5b605dSKonrad Dybcio static const struct clk_rpmh_desc clk_rpmh_sm6350 = { 664be5b605dSKonrad Dybcio .clks = sm6350_rpmh_clocks, 665be5b605dSKonrad Dybcio .num_clks = ARRAY_SIZE(sm6350_rpmh_clocks), 666be5b605dSKonrad Dybcio }; 667be5b605dSKonrad Dybcio 66840affbf8SVamsi krishna Lanka static struct clk_hw *sdx65_rpmh_clocks[] = { 669ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div4.hw, 670ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div4_ao.hw, 671ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK1] = &clk_rpmh_ln_bb_clk1_a4.hw, 672ec304d02SDmitry Baryshkov [RPMH_LN_BB_CLK1_A] = &clk_rpmh_ln_bb_clk1_a4_ao.hw, 673ec304d02SDmitry Baryshkov [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, 674ec304d02SDmitry Baryshkov [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, 675ec304d02SDmitry Baryshkov [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw, 676ec304d02SDmitry Baryshkov [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw, 677ec304d02SDmitry Baryshkov [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a.hw, 678ec304d02SDmitry Baryshkov [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a_ao.hw, 679ec304d02SDmitry Baryshkov [RPMH_RF_CLK4] = &clk_rpmh_rf_clk4_a.hw, 680ec304d02SDmitry Baryshkov [RPMH_RF_CLK4_A] = &clk_rpmh_rf_clk4_a_ao.hw, 681fe20294fSDmitry Baryshkov [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, 682fe20294fSDmitry Baryshkov [RPMH_QPIC_CLK] = &clk_rpmh_qpic_clk.hw, 68340affbf8SVamsi krishna Lanka }; 68440affbf8SVamsi krishna Lanka 68540affbf8SVamsi krishna Lanka static const struct clk_rpmh_desc clk_rpmh_sdx65 = { 68640affbf8SVamsi krishna Lanka .clks = sdx65_rpmh_clocks, 68740affbf8SVamsi krishna Lanka .num_clks = ARRAY_SIZE(sdx65_rpmh_clocks), 68840affbf8SVamsi krishna Lanka }; 68940affbf8SVamsi krishna Lanka 69005e5c125SMelody Olvera static struct clk_hw *qdu1000_rpmh_clocks[] = { 691ec304d02SDmitry Baryshkov [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div1.hw, 692ec304d02SDmitry Baryshkov [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div1_ao.hw, 69305e5c125SMelody Olvera }; 69405e5c125SMelody Olvera 69505e5c125SMelody Olvera static const struct clk_rpmh_desc clk_rpmh_qdu1000 = { 69605e5c125SMelody Olvera .clks = qdu1000_rpmh_clocks, 69705e5c125SMelody Olvera .num_clks = ARRAY_SIZE(qdu1000_rpmh_clocks), 69805e5c125SMelody Olvera }; 69905e5c125SMelody Olvera 7009c7e4702STaniya Das static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, 7019c7e4702STaniya Das void *data) 7029c7e4702STaniya Das { 7039c7e4702STaniya Das struct clk_rpmh_desc *rpmh = data; 7049c7e4702STaniya Das unsigned int idx = clkspec->args[0]; 7059c7e4702STaniya Das 7069c7e4702STaniya Das if (idx >= rpmh->num_clks) { 7079c7e4702STaniya Das pr_err("%s: invalid index %u\n", __func__, idx); 7089c7e4702STaniya Das return ERR_PTR(-EINVAL); 7099c7e4702STaniya Das } 7109c7e4702STaniya Das 7119c7e4702STaniya Das return rpmh->clks[idx]; 7129c7e4702STaniya Das } 7139c7e4702STaniya Das 7149c7e4702STaniya Das static int clk_rpmh_probe(struct platform_device *pdev) 7159c7e4702STaniya Das { 7169c7e4702STaniya Das struct clk_hw **hw_clks; 7179c7e4702STaniya Das struct clk_rpmh *rpmh_clk; 7189c7e4702STaniya Das const struct clk_rpmh_desc *desc; 7199c7e4702STaniya Das int ret, i; 7209c7e4702STaniya Das 7219c7e4702STaniya Das desc = of_device_get_match_data(&pdev->dev); 7229c7e4702STaniya Das if (!desc) 7239c7e4702STaniya Das return -ENODEV; 7249c7e4702STaniya Das 7259c7e4702STaniya Das hw_clks = desc->clks; 7269c7e4702STaniya Das 7279c7e4702STaniya Das for (i = 0; i < desc->num_clks; i++) { 728924e2d01STaniya Das const char *name; 7299c7e4702STaniya Das u32 res_addr; 73004053f4dSDavid Dai size_t aux_data_len; 73104053f4dSDavid Dai const struct bcm_db *data; 7329c7e4702STaniya Das 733924e2d01STaniya Das if (!hw_clks[i]) 734924e2d01STaniya Das continue; 735924e2d01STaniya Das 736924e2d01STaniya Das name = hw_clks[i]->init->name; 737924e2d01STaniya Das 7389c7e4702STaniya Das rpmh_clk = to_clk_rpmh(hw_clks[i]); 7399c7e4702STaniya Das res_addr = cmd_db_read_addr(rpmh_clk->res_name); 7409c7e4702STaniya Das if (!res_addr) { 7419c7e4702STaniya Das dev_err(&pdev->dev, "missing RPMh resource address for %s\n", 7429c7e4702STaniya Das rpmh_clk->res_name); 7439c7e4702STaniya Das return -ENODEV; 7449c7e4702STaniya Das } 74504053f4dSDavid Dai 74604053f4dSDavid Dai data = cmd_db_read_aux_data(rpmh_clk->res_name, &aux_data_len); 74704053f4dSDavid Dai if (IS_ERR(data)) { 74804053f4dSDavid Dai ret = PTR_ERR(data); 74904053f4dSDavid Dai dev_err(&pdev->dev, 75004053f4dSDavid Dai "error reading RPMh aux data for %s (%d)\n", 75104053f4dSDavid Dai rpmh_clk->res_name, ret); 75204053f4dSDavid Dai return ret; 75304053f4dSDavid Dai } 75404053f4dSDavid Dai 75504053f4dSDavid Dai /* Convert unit from Khz to Hz */ 75604053f4dSDavid Dai if (aux_data_len == sizeof(*data)) 75704053f4dSDavid Dai rpmh_clk->unit = le32_to_cpu(data->unit) * 1000ULL; 75804053f4dSDavid Dai 7599c7e4702STaniya Das rpmh_clk->res_addr += res_addr; 7609c7e4702STaniya Das rpmh_clk->dev = &pdev->dev; 7619c7e4702STaniya Das 7629c7e4702STaniya Das ret = devm_clk_hw_register(&pdev->dev, hw_clks[i]); 7639c7e4702STaniya Das if (ret) { 764af884a5dSStephen Boyd dev_err(&pdev->dev, "failed to register %s\n", name); 7659c7e4702STaniya Das return ret; 7669c7e4702STaniya Das } 7679c7e4702STaniya Das } 7689c7e4702STaniya Das 7699c7e4702STaniya Das /* typecast to silence compiler warning */ 7709c7e4702STaniya Das ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_rpmh_hw_get, 7719c7e4702STaniya Das (void *)desc); 7729c7e4702STaniya Das if (ret) { 7739c7e4702STaniya Das dev_err(&pdev->dev, "Failed to add clock provider\n"); 7749c7e4702STaniya Das return ret; 7759c7e4702STaniya Das } 7769c7e4702STaniya Das 7779c7e4702STaniya Das dev_dbg(&pdev->dev, "Registered RPMh clocks\n"); 7789c7e4702STaniya Das 7799c7e4702STaniya Das return 0; 7809c7e4702STaniya Das } 7819c7e4702STaniya Das 7829c7e4702STaniya Das static const struct of_device_id clk_rpmh_match_table[] = { 78305e5c125SMelody Olvera { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000}, 784*ce273e69SBartosz Golaszewski { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p}, 7859e0cda72SBjorn Andersson { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180}, 7868a1f7fb1SBjorn Andersson { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, 787809b4828SBjorn Andersson { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, 7889c7e4702STaniya Das { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, 7892ded040cSRichard Acayan { .compatible = "qcom,sdm670-rpmh-clk", .data = &clk_rpmh_sdm670}, 790afacfbbeSManivannan Sadhasivam { .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55}, 79140affbf8SVamsi krishna Lanka { .compatible = "qcom,sdx65-rpmh-clk", .data = &clk_rpmh_sdx65}, 792be5b605dSKonrad Dybcio { .compatible = "qcom,sm6350-rpmh-clk", .data = &clk_rpmh_sm6350}, 7932243fd41SVinod Koul { .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150}, 79429093b1aSTaniya Das { .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250}, 795f7b36cc1SVinod Koul { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350}, 796ab5d3179SVinod Koul { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, 797478a573bSAbel Vesa { .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550}, 798fff2b9a6STaniya Das { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, 7999c7e4702STaniya Das { } 8009c7e4702STaniya Das }; 8019c7e4702STaniya Das MODULE_DEVICE_TABLE(of, clk_rpmh_match_table); 8029c7e4702STaniya Das 8039c7e4702STaniya Das static struct platform_driver clk_rpmh_driver = { 8049c7e4702STaniya Das .probe = clk_rpmh_probe, 8059c7e4702STaniya Das .driver = { 8069c7e4702STaniya Das .name = "clk-rpmh", 8079c7e4702STaniya Das .of_match_table = clk_rpmh_match_table, 8089c7e4702STaniya Das }, 8099c7e4702STaniya Das }; 8109c7e4702STaniya Das 8119c7e4702STaniya Das static int __init clk_rpmh_init(void) 8129c7e4702STaniya Das { 8139c7e4702STaniya Das return platform_driver_register(&clk_rpmh_driver); 8149c7e4702STaniya Das } 815b418bab4SAmit Kucheria core_initcall(clk_rpmh_init); 8169c7e4702STaniya Das 8179c7e4702STaniya Das static void __exit clk_rpmh_exit(void) 8189c7e4702STaniya Das { 8199c7e4702STaniya Das platform_driver_unregister(&clk_rpmh_driver); 8209c7e4702STaniya Das } 8219c7e4702STaniya Das module_exit(clk_rpmh_exit); 8229c7e4702STaniya Das 8239c7e4702STaniya Das MODULE_DESCRIPTION("QCOM RPMh Clock Driver"); 8249c7e4702STaniya Das MODULE_LICENSE("GPL v2"); 825