19c7e4702STaniya Das // SPDX-License-Identifier: GPL-2.0 29c7e4702STaniya Das /* 39c7e4702STaniya Das * Copyright (c) 2018, The Linux Foundation. All rights reserved. 49c7e4702STaniya Das */ 59c7e4702STaniya Das 69c7e4702STaniya Das #include <linux/clk-provider.h> 79c7e4702STaniya Das #include <linux/err.h> 89c7e4702STaniya Das #include <linux/kernel.h> 99c7e4702STaniya Das #include <linux/module.h> 109c7e4702STaniya Das #include <linux/of.h> 119c7e4702STaniya Das #include <linux/of_device.h> 129c7e4702STaniya Das #include <linux/platform_device.h> 139c7e4702STaniya Das #include <soc/qcom/cmd-db.h> 149c7e4702STaniya Das #include <soc/qcom/rpmh.h> 159c7e4702STaniya Das 169c7e4702STaniya Das #include <dt-bindings/clock/qcom,rpmh.h> 179c7e4702STaniya Das 189c7e4702STaniya Das #define CLK_RPMH_ARC_EN_OFFSET 0 199c7e4702STaniya Das #define CLK_RPMH_VRM_EN_OFFSET 4 209c7e4702STaniya Das 2104053f4dSDavid Dai #define BCM_TCS_CMD_COMMIT_MASK 0x40000000 2204053f4dSDavid Dai #define BCM_TCS_CMD_VALID_SHIFT 29 2304053f4dSDavid Dai #define BCM_TCS_CMD_VOTE_MASK 0x3fff 2404053f4dSDavid Dai #define BCM_TCS_CMD_VOTE_SHIFT 0 2504053f4dSDavid Dai 2604053f4dSDavid Dai #define BCM_TCS_CMD(valid, vote) \ 2704053f4dSDavid Dai (BCM_TCS_CMD_COMMIT_MASK | \ 2804053f4dSDavid Dai ((valid) << BCM_TCS_CMD_VALID_SHIFT) | \ 2904053f4dSDavid Dai ((vote & BCM_TCS_CMD_VOTE_MASK) \ 3004053f4dSDavid Dai << BCM_TCS_CMD_VOTE_SHIFT)) 3104053f4dSDavid Dai 3204053f4dSDavid Dai /** 3304053f4dSDavid Dai * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM) 3404053f4dSDavid Dai * @unit: divisor used to convert Hz value to an RPMh msg 3504053f4dSDavid Dai * @width: multiplier used to convert Hz value to an RPMh msg 3604053f4dSDavid Dai * @vcd: virtual clock domain that this bcm belongs to 3704053f4dSDavid Dai * @reserved: reserved to pad the struct 3804053f4dSDavid Dai */ 3904053f4dSDavid Dai struct bcm_db { 4004053f4dSDavid Dai __le32 unit; 4104053f4dSDavid Dai __le16 width; 4204053f4dSDavid Dai u8 vcd; 4304053f4dSDavid Dai u8 reserved; 4404053f4dSDavid Dai }; 4504053f4dSDavid Dai 469c7e4702STaniya Das /** 479c7e4702STaniya Das * struct clk_rpmh - individual rpmh clock data structure 489c7e4702STaniya Das * @hw: handle between common and hardware-specific interfaces 499c7e4702STaniya Das * @res_name: resource name for the rpmh clock 509c7e4702STaniya Das * @div: clock divider to compute the clock rate 519c7e4702STaniya Das * @res_addr: base address of the rpmh resource within the RPMh 529c7e4702STaniya Das * @res_on_val: rpmh clock enable value 539c7e4702STaniya Das * @state: rpmh clock requested state 549c7e4702STaniya Das * @aggr_state: rpmh clock aggregated state 559c7e4702STaniya Das * @last_sent_aggr_state: rpmh clock last aggr state sent to RPMh 569c7e4702STaniya Das * @valid_state_mask: mask to determine the state of the rpmh clock 5704053f4dSDavid Dai * @unit: divisor to convert rate to rpmh msg in magnitudes of Khz 589c7e4702STaniya Das * @dev: device to which it is attached 599c7e4702STaniya Das * @peer: pointer to the clock rpmh sibling 609c7e4702STaniya Das */ 619c7e4702STaniya Das struct clk_rpmh { 629c7e4702STaniya Das struct clk_hw hw; 639c7e4702STaniya Das const char *res_name; 649c7e4702STaniya Das u8 div; 659c7e4702STaniya Das u32 res_addr; 669c7e4702STaniya Das u32 res_on_val; 679c7e4702STaniya Das u32 state; 689c7e4702STaniya Das u32 aggr_state; 699c7e4702STaniya Das u32 last_sent_aggr_state; 709c7e4702STaniya Das u32 valid_state_mask; 7104053f4dSDavid Dai u32 unit; 729c7e4702STaniya Das struct device *dev; 739c7e4702STaniya Das struct clk_rpmh *peer; 749c7e4702STaniya Das }; 759c7e4702STaniya Das 769c7e4702STaniya Das struct clk_rpmh_desc { 779c7e4702STaniya Das struct clk_hw **clks; 789c7e4702STaniya Das size_t num_clks; 799c7e4702STaniya Das }; 809c7e4702STaniya Das 819c7e4702STaniya Das static DEFINE_MUTEX(rpmh_clk_lock); 829c7e4702STaniya Das 839c7e4702STaniya Das #define __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name, \ 849c7e4702STaniya Das _res_en_offset, _res_on, _div) \ 859c7e4702STaniya Das static struct clk_rpmh _platform##_##_name_active; \ 869c7e4702STaniya Das static struct clk_rpmh _platform##_##_name = { \ 879c7e4702STaniya Das .res_name = _res_name, \ 889c7e4702STaniya Das .res_addr = _res_en_offset, \ 899c7e4702STaniya Das .res_on_val = _res_on, \ 909c7e4702STaniya Das .div = _div, \ 919c7e4702STaniya Das .peer = &_platform##_##_name_active, \ 929c7e4702STaniya Das .valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) | \ 939c7e4702STaniya Das BIT(RPMH_ACTIVE_ONLY_STATE) | \ 949c7e4702STaniya Das BIT(RPMH_SLEEP_STATE)), \ 959c7e4702STaniya Das .hw.init = &(struct clk_init_data){ \ 969c7e4702STaniya Das .ops = &clk_rpmh_ops, \ 979c7e4702STaniya Das .name = #_name, \ 98a64a9e51SVinod Koul .parent_data = &(const struct clk_parent_data){ \ 99a64a9e51SVinod Koul .fw_name = "xo", \ 100a64a9e51SVinod Koul .name = "xo_board", \ 101a64a9e51SVinod Koul }, \ 1029c7e4702STaniya Das .num_parents = 1, \ 1039c7e4702STaniya Das }, \ 1049c7e4702STaniya Das }; \ 1059c7e4702STaniya Das static struct clk_rpmh _platform##_##_name_active = { \ 1069c7e4702STaniya Das .res_name = _res_name, \ 1079c7e4702STaniya Das .res_addr = _res_en_offset, \ 1089c7e4702STaniya Das .res_on_val = _res_on, \ 1099c7e4702STaniya Das .div = _div, \ 1109c7e4702STaniya Das .peer = &_platform##_##_name, \ 1119c7e4702STaniya Das .valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) | \ 1129c7e4702STaniya Das BIT(RPMH_ACTIVE_ONLY_STATE)), \ 1139c7e4702STaniya Das .hw.init = &(struct clk_init_data){ \ 1149c7e4702STaniya Das .ops = &clk_rpmh_ops, \ 1159c7e4702STaniya Das .name = #_name_active, \ 116a64a9e51SVinod Koul .parent_data = &(const struct clk_parent_data){ \ 117a64a9e51SVinod Koul .fw_name = "xo", \ 118a64a9e51SVinod Koul .name = "xo_board", \ 119a64a9e51SVinod Koul }, \ 1209c7e4702STaniya Das .num_parents = 1, \ 1219c7e4702STaniya Das }, \ 1229c7e4702STaniya Das } 1239c7e4702STaniya Das 1249c7e4702STaniya Das #define DEFINE_CLK_RPMH_ARC(_platform, _name, _name_active, _res_name, \ 1259c7e4702STaniya Das _res_on, _div) \ 1269c7e4702STaniya Das __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name, \ 1279c7e4702STaniya Das CLK_RPMH_ARC_EN_OFFSET, _res_on, _div) 1289c7e4702STaniya Das 1299c7e4702STaniya Das #define DEFINE_CLK_RPMH_VRM(_platform, _name, _name_active, _res_name, \ 1309c7e4702STaniya Das _div) \ 1319c7e4702STaniya Das __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name, \ 1329c7e4702STaniya Das CLK_RPMH_VRM_EN_OFFSET, 1, _div) 1339c7e4702STaniya Das 13404053f4dSDavid Dai #define DEFINE_CLK_RPMH_BCM(_platform, _name, _res_name) \ 13504053f4dSDavid Dai static struct clk_rpmh _platform##_##_name = { \ 13604053f4dSDavid Dai .res_name = _res_name, \ 13704053f4dSDavid Dai .valid_state_mask = BIT(RPMH_ACTIVE_ONLY_STATE), \ 13804053f4dSDavid Dai .div = 1, \ 13904053f4dSDavid Dai .hw.init = &(struct clk_init_data){ \ 14004053f4dSDavid Dai .ops = &clk_rpmh_bcm_ops, \ 14104053f4dSDavid Dai .name = #_name, \ 14204053f4dSDavid Dai }, \ 14304053f4dSDavid Dai } 14404053f4dSDavid Dai 1459c7e4702STaniya Das static inline struct clk_rpmh *to_clk_rpmh(struct clk_hw *_hw) 1469c7e4702STaniya Das { 1479c7e4702STaniya Das return container_of(_hw, struct clk_rpmh, hw); 1489c7e4702STaniya Das } 1499c7e4702STaniya Das 1509c7e4702STaniya Das static inline bool has_state_changed(struct clk_rpmh *c, u32 state) 1519c7e4702STaniya Das { 1529c7e4702STaniya Das return (c->last_sent_aggr_state & BIT(state)) 1539c7e4702STaniya Das != (c->aggr_state & BIT(state)); 1549c7e4702STaniya Das } 1559c7e4702STaniya Das 1569c7e4702STaniya Das static int clk_rpmh_send_aggregate_command(struct clk_rpmh *c) 1579c7e4702STaniya Das { 1589c7e4702STaniya Das struct tcs_cmd cmd = { 0 }; 1599c7e4702STaniya Das u32 cmd_state, on_val; 1609c7e4702STaniya Das enum rpmh_state state = RPMH_SLEEP_STATE; 1619c7e4702STaniya Das int ret; 1629c7e4702STaniya Das 1639c7e4702STaniya Das cmd.addr = c->res_addr; 1649c7e4702STaniya Das cmd_state = c->aggr_state; 1659c7e4702STaniya Das on_val = c->res_on_val; 1669c7e4702STaniya Das 1679c7e4702STaniya Das for (; state <= RPMH_ACTIVE_ONLY_STATE; state++) { 1689c7e4702STaniya Das if (has_state_changed(c, state)) { 1699c7e4702STaniya Das if (cmd_state & BIT(state)) 1709c7e4702STaniya Das cmd.data = on_val; 1719c7e4702STaniya Das 1729c7e4702STaniya Das ret = rpmh_write_async(c->dev, state, &cmd, 1); 1739c7e4702STaniya Das if (ret) { 1749c7e4702STaniya Das dev_err(c->dev, "set %s state of %s failed: (%d)\n", 1759c7e4702STaniya Das !state ? "sleep" : 1769c7e4702STaniya Das state == RPMH_WAKE_ONLY_STATE ? 1779c7e4702STaniya Das "wake" : "active", c->res_name, ret); 1789c7e4702STaniya Das return ret; 1799c7e4702STaniya Das } 1809c7e4702STaniya Das } 1819c7e4702STaniya Das } 1829c7e4702STaniya Das 1839c7e4702STaniya Das c->last_sent_aggr_state = c->aggr_state; 1849c7e4702STaniya Das c->peer->last_sent_aggr_state = c->last_sent_aggr_state; 1859c7e4702STaniya Das 1869c7e4702STaniya Das return 0; 1879c7e4702STaniya Das } 1889c7e4702STaniya Das 1899c7e4702STaniya Das /* 1909c7e4702STaniya Das * Update state and aggregate state values based on enable value. 1919c7e4702STaniya Das */ 1929c7e4702STaniya Das static int clk_rpmh_aggregate_state_send_command(struct clk_rpmh *c, 1939c7e4702STaniya Das bool enable) 1949c7e4702STaniya Das { 1959c7e4702STaniya Das int ret; 1969c7e4702STaniya Das 1979c7e4702STaniya Das /* Nothing required to be done if already off or on */ 1989c7e4702STaniya Das if (enable == c->state) 1999c7e4702STaniya Das return 0; 2009c7e4702STaniya Das 2019c7e4702STaniya Das c->state = enable ? c->valid_state_mask : 0; 2029c7e4702STaniya Das c->aggr_state = c->state | c->peer->state; 2039c7e4702STaniya Das c->peer->aggr_state = c->aggr_state; 2049c7e4702STaniya Das 2059c7e4702STaniya Das ret = clk_rpmh_send_aggregate_command(c); 2069c7e4702STaniya Das if (!ret) 2079c7e4702STaniya Das return 0; 2089c7e4702STaniya Das 2099c7e4702STaniya Das if (ret && enable) 2109c7e4702STaniya Das c->state = 0; 2119c7e4702STaniya Das else if (ret) 2129c7e4702STaniya Das c->state = c->valid_state_mask; 2139c7e4702STaniya Das 2149c7e4702STaniya Das WARN(1, "clk: %s failed to %s\n", c->res_name, 2159c7e4702STaniya Das enable ? "enable" : "disable"); 2169c7e4702STaniya Das return ret; 2179c7e4702STaniya Das } 2189c7e4702STaniya Das 2199c7e4702STaniya Das static int clk_rpmh_prepare(struct clk_hw *hw) 2209c7e4702STaniya Das { 2219c7e4702STaniya Das struct clk_rpmh *c = to_clk_rpmh(hw); 2229c7e4702STaniya Das int ret = 0; 2239c7e4702STaniya Das 2249c7e4702STaniya Das mutex_lock(&rpmh_clk_lock); 2259c7e4702STaniya Das ret = clk_rpmh_aggregate_state_send_command(c, true); 2269c7e4702STaniya Das mutex_unlock(&rpmh_clk_lock); 2279c7e4702STaniya Das 2289c7e4702STaniya Das return ret; 2299c7e4702STaniya Das }; 2309c7e4702STaniya Das 2319c7e4702STaniya Das static void clk_rpmh_unprepare(struct clk_hw *hw) 2329c7e4702STaniya Das { 2339c7e4702STaniya Das struct clk_rpmh *c = to_clk_rpmh(hw); 2349c7e4702STaniya Das 2359c7e4702STaniya Das mutex_lock(&rpmh_clk_lock); 2369c7e4702STaniya Das clk_rpmh_aggregate_state_send_command(c, false); 2379c7e4702STaniya Das mutex_unlock(&rpmh_clk_lock); 2389c7e4702STaniya Das }; 2399c7e4702STaniya Das 2409c7e4702STaniya Das static unsigned long clk_rpmh_recalc_rate(struct clk_hw *hw, 2419c7e4702STaniya Das unsigned long prate) 2429c7e4702STaniya Das { 2439c7e4702STaniya Das struct clk_rpmh *r = to_clk_rpmh(hw); 2449c7e4702STaniya Das 2459c7e4702STaniya Das /* 2469c7e4702STaniya Das * RPMh clocks have a fixed rate. Return static rate. 2479c7e4702STaniya Das */ 2489c7e4702STaniya Das return prate / r->div; 2499c7e4702STaniya Das } 2509c7e4702STaniya Das 2519c7e4702STaniya Das static const struct clk_ops clk_rpmh_ops = { 2529c7e4702STaniya Das .prepare = clk_rpmh_prepare, 2539c7e4702STaniya Das .unprepare = clk_rpmh_unprepare, 2549c7e4702STaniya Das .recalc_rate = clk_rpmh_recalc_rate, 2559c7e4702STaniya Das }; 2569c7e4702STaniya Das 25704053f4dSDavid Dai static int clk_rpmh_bcm_send_cmd(struct clk_rpmh *c, bool enable) 25804053f4dSDavid Dai { 25904053f4dSDavid Dai struct tcs_cmd cmd = { 0 }; 26004053f4dSDavid Dai u32 cmd_state; 26104053f4dSDavid Dai int ret; 26204053f4dSDavid Dai 26304053f4dSDavid Dai mutex_lock(&rpmh_clk_lock); 26404053f4dSDavid Dai 26504053f4dSDavid Dai cmd_state = 0; 26604053f4dSDavid Dai if (enable) { 26704053f4dSDavid Dai cmd_state = 1; 26804053f4dSDavid Dai if (c->aggr_state) 26904053f4dSDavid Dai cmd_state = c->aggr_state; 27004053f4dSDavid Dai } 27104053f4dSDavid Dai 27204053f4dSDavid Dai if (c->last_sent_aggr_state == cmd_state) { 27304053f4dSDavid Dai mutex_unlock(&rpmh_clk_lock); 27404053f4dSDavid Dai return 0; 27504053f4dSDavid Dai } 27604053f4dSDavid Dai 27704053f4dSDavid Dai cmd.addr = c->res_addr; 27804053f4dSDavid Dai cmd.data = BCM_TCS_CMD(enable, cmd_state); 27904053f4dSDavid Dai 28004053f4dSDavid Dai ret = rpmh_write_async(c->dev, RPMH_ACTIVE_ONLY_STATE, &cmd, 1); 28104053f4dSDavid Dai if (ret) { 28204053f4dSDavid Dai dev_err(c->dev, "set active state of %s failed: (%d)\n", 28304053f4dSDavid Dai c->res_name, ret); 28404053f4dSDavid Dai mutex_unlock(&rpmh_clk_lock); 28504053f4dSDavid Dai return ret; 28604053f4dSDavid Dai } 28704053f4dSDavid Dai 28804053f4dSDavid Dai c->last_sent_aggr_state = cmd_state; 28904053f4dSDavid Dai 29004053f4dSDavid Dai mutex_unlock(&rpmh_clk_lock); 29104053f4dSDavid Dai 29204053f4dSDavid Dai return 0; 29304053f4dSDavid Dai } 29404053f4dSDavid Dai 29504053f4dSDavid Dai static int clk_rpmh_bcm_prepare(struct clk_hw *hw) 29604053f4dSDavid Dai { 29704053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 29804053f4dSDavid Dai 29904053f4dSDavid Dai return clk_rpmh_bcm_send_cmd(c, true); 30004053f4dSDavid Dai }; 30104053f4dSDavid Dai 30204053f4dSDavid Dai static void clk_rpmh_bcm_unprepare(struct clk_hw *hw) 30304053f4dSDavid Dai { 30404053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 30504053f4dSDavid Dai 30604053f4dSDavid Dai clk_rpmh_bcm_send_cmd(c, false); 30704053f4dSDavid Dai }; 30804053f4dSDavid Dai 30904053f4dSDavid Dai static int clk_rpmh_bcm_set_rate(struct clk_hw *hw, unsigned long rate, 31004053f4dSDavid Dai unsigned long parent_rate) 31104053f4dSDavid Dai { 31204053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 31304053f4dSDavid Dai 31404053f4dSDavid Dai c->aggr_state = rate / c->unit; 31504053f4dSDavid Dai /* 31604053f4dSDavid Dai * Since any non-zero value sent to hw would result in enabling the 31704053f4dSDavid Dai * clock, only send the value if the clock has already been prepared. 31804053f4dSDavid Dai */ 31904053f4dSDavid Dai if (clk_hw_is_prepared(hw)) 32004053f4dSDavid Dai clk_rpmh_bcm_send_cmd(c, true); 32104053f4dSDavid Dai 32204053f4dSDavid Dai return 0; 32304053f4dSDavid Dai }; 32404053f4dSDavid Dai 32504053f4dSDavid Dai static long clk_rpmh_round_rate(struct clk_hw *hw, unsigned long rate, 32604053f4dSDavid Dai unsigned long *parent_rate) 32704053f4dSDavid Dai { 32804053f4dSDavid Dai return rate; 32904053f4dSDavid Dai } 33004053f4dSDavid Dai 33104053f4dSDavid Dai static unsigned long clk_rpmh_bcm_recalc_rate(struct clk_hw *hw, 33204053f4dSDavid Dai unsigned long prate) 33304053f4dSDavid Dai { 33404053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 33504053f4dSDavid Dai 33604053f4dSDavid Dai return c->aggr_state * c->unit; 33704053f4dSDavid Dai } 33804053f4dSDavid Dai 33904053f4dSDavid Dai static const struct clk_ops clk_rpmh_bcm_ops = { 34004053f4dSDavid Dai .prepare = clk_rpmh_bcm_prepare, 34104053f4dSDavid Dai .unprepare = clk_rpmh_bcm_unprepare, 34204053f4dSDavid Dai .set_rate = clk_rpmh_bcm_set_rate, 34304053f4dSDavid Dai .round_rate = clk_rpmh_round_rate, 34404053f4dSDavid Dai .recalc_rate = clk_rpmh_bcm_recalc_rate, 34504053f4dSDavid Dai }; 34604053f4dSDavid Dai 3479c7e4702STaniya Das /* Resource name must match resource id present in cmd-db. */ 3489c7e4702STaniya Das DEFINE_CLK_RPMH_ARC(sdm845, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 2); 3499c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 2); 3509c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk3, ln_bb_clk3_ao, "lnbclka3", 2); 3519c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, rf_clk1, rf_clk1_ao, "rfclka1", 1); 3529c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1); 3539c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1); 35404053f4dSDavid Dai DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0"); 3559c7e4702STaniya Das 3569c7e4702STaniya Das static struct clk_hw *sdm845_rpmh_clocks[] = { 3579c7e4702STaniya Das [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 3589c7e4702STaniya Das [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 3599c7e4702STaniya Das [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 3609c7e4702STaniya Das [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 3619c7e4702STaniya Das [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 3629c7e4702STaniya Das [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 3639c7e4702STaniya Das [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 3649c7e4702STaniya Das [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 3659c7e4702STaniya Das [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 3669c7e4702STaniya Das [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 3679c7e4702STaniya Das [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 3689c7e4702STaniya Das [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 36904053f4dSDavid Dai [RPMH_IPA_CLK] = &sdm845_ipa.hw, 3709c7e4702STaniya Das }; 3719c7e4702STaniya Das 3729c7e4702STaniya Das static const struct clk_rpmh_desc clk_rpmh_sdm845 = { 3739c7e4702STaniya Das .clks = sdm845_rpmh_clocks, 3749c7e4702STaniya Das .num_clks = ARRAY_SIZE(sdm845_rpmh_clocks), 3759c7e4702STaniya Das }; 3769c7e4702STaniya Das 3779c7e4702STaniya Das static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, 3789c7e4702STaniya Das void *data) 3799c7e4702STaniya Das { 3809c7e4702STaniya Das struct clk_rpmh_desc *rpmh = data; 3819c7e4702STaniya Das unsigned int idx = clkspec->args[0]; 3829c7e4702STaniya Das 3839c7e4702STaniya Das if (idx >= rpmh->num_clks) { 3849c7e4702STaniya Das pr_err("%s: invalid index %u\n", __func__, idx); 3859c7e4702STaniya Das return ERR_PTR(-EINVAL); 3869c7e4702STaniya Das } 3879c7e4702STaniya Das 3889c7e4702STaniya Das return rpmh->clks[idx]; 3899c7e4702STaniya Das } 3909c7e4702STaniya Das 3919c7e4702STaniya Das static int clk_rpmh_probe(struct platform_device *pdev) 3929c7e4702STaniya Das { 3939c7e4702STaniya Das struct clk_hw **hw_clks; 3949c7e4702STaniya Das struct clk_rpmh *rpmh_clk; 3959c7e4702STaniya Das const struct clk_rpmh_desc *desc; 3969c7e4702STaniya Das int ret, i; 3979c7e4702STaniya Das 3989c7e4702STaniya Das desc = of_device_get_match_data(&pdev->dev); 3999c7e4702STaniya Das if (!desc) 4009c7e4702STaniya Das return -ENODEV; 4019c7e4702STaniya Das 4029c7e4702STaniya Das hw_clks = desc->clks; 4039c7e4702STaniya Das 4049c7e4702STaniya Das for (i = 0; i < desc->num_clks; i++) { 4059c7e4702STaniya Das u32 res_addr; 40604053f4dSDavid Dai size_t aux_data_len; 40704053f4dSDavid Dai const struct bcm_db *data; 4089c7e4702STaniya Das 4099c7e4702STaniya Das rpmh_clk = to_clk_rpmh(hw_clks[i]); 4109c7e4702STaniya Das res_addr = cmd_db_read_addr(rpmh_clk->res_name); 4119c7e4702STaniya Das if (!res_addr) { 4129c7e4702STaniya Das dev_err(&pdev->dev, "missing RPMh resource address for %s\n", 4139c7e4702STaniya Das rpmh_clk->res_name); 4149c7e4702STaniya Das return -ENODEV; 4159c7e4702STaniya Das } 41604053f4dSDavid Dai 41704053f4dSDavid Dai data = cmd_db_read_aux_data(rpmh_clk->res_name, &aux_data_len); 41804053f4dSDavid Dai if (IS_ERR(data)) { 41904053f4dSDavid Dai ret = PTR_ERR(data); 42004053f4dSDavid Dai dev_err(&pdev->dev, 42104053f4dSDavid Dai "error reading RPMh aux data for %s (%d)\n", 42204053f4dSDavid Dai rpmh_clk->res_name, ret); 42304053f4dSDavid Dai return ret; 42404053f4dSDavid Dai } 42504053f4dSDavid Dai 42604053f4dSDavid Dai /* Convert unit from Khz to Hz */ 42704053f4dSDavid Dai if (aux_data_len == sizeof(*data)) 42804053f4dSDavid Dai rpmh_clk->unit = le32_to_cpu(data->unit) * 1000ULL; 42904053f4dSDavid Dai 4309c7e4702STaniya Das rpmh_clk->res_addr += res_addr; 4319c7e4702STaniya Das rpmh_clk->dev = &pdev->dev; 4329c7e4702STaniya Das 4339c7e4702STaniya Das ret = devm_clk_hw_register(&pdev->dev, hw_clks[i]); 4349c7e4702STaniya Das if (ret) { 4359c7e4702STaniya Das dev_err(&pdev->dev, "failed to register %s\n", 4369c7e4702STaniya Das hw_clks[i]->init->name); 4379c7e4702STaniya Das return ret; 4389c7e4702STaniya Das } 4399c7e4702STaniya Das } 4409c7e4702STaniya Das 4419c7e4702STaniya Das /* typecast to silence compiler warning */ 4429c7e4702STaniya Das ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_rpmh_hw_get, 4439c7e4702STaniya Das (void *)desc); 4449c7e4702STaniya Das if (ret) { 4459c7e4702STaniya Das dev_err(&pdev->dev, "Failed to add clock provider\n"); 4469c7e4702STaniya Das return ret; 4479c7e4702STaniya Das } 4489c7e4702STaniya Das 4499c7e4702STaniya Das dev_dbg(&pdev->dev, "Registered RPMh clocks\n"); 4509c7e4702STaniya Das 4519c7e4702STaniya Das return 0; 4529c7e4702STaniya Das } 4539c7e4702STaniya Das 4549c7e4702STaniya Das static const struct of_device_id clk_rpmh_match_table[] = { 4559c7e4702STaniya Das { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, 4569c7e4702STaniya Das { } 4579c7e4702STaniya Das }; 4589c7e4702STaniya Das MODULE_DEVICE_TABLE(of, clk_rpmh_match_table); 4599c7e4702STaniya Das 4609c7e4702STaniya Das static struct platform_driver clk_rpmh_driver = { 4619c7e4702STaniya Das .probe = clk_rpmh_probe, 4629c7e4702STaniya Das .driver = { 4639c7e4702STaniya Das .name = "clk-rpmh", 4649c7e4702STaniya Das .of_match_table = clk_rpmh_match_table, 4659c7e4702STaniya Das }, 4669c7e4702STaniya Das }; 4679c7e4702STaniya Das 4689c7e4702STaniya Das static int __init clk_rpmh_init(void) 4699c7e4702STaniya Das { 4709c7e4702STaniya Das return platform_driver_register(&clk_rpmh_driver); 4719c7e4702STaniya Das } 4729c7e4702STaniya Das subsys_initcall(clk_rpmh_init); 4739c7e4702STaniya Das 4749c7e4702STaniya Das static void __exit clk_rpmh_exit(void) 4759c7e4702STaniya Das { 4769c7e4702STaniya Das platform_driver_unregister(&clk_rpmh_driver); 4779c7e4702STaniya Das } 4789c7e4702STaniya Das module_exit(clk_rpmh_exit); 4799c7e4702STaniya Das 4809c7e4702STaniya Das MODULE_DESCRIPTION("QCOM RPMh Clock Driver"); 4819c7e4702STaniya Das MODULE_LICENSE("GPL v2"); 482