19c7e4702STaniya Das // SPDX-License-Identifier: GPL-2.0 29c7e4702STaniya Das /* 329093b1aSTaniya Das * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 49c7e4702STaniya Das */ 59c7e4702STaniya Das 69c7e4702STaniya Das #include <linux/clk-provider.h> 79c7e4702STaniya Das #include <linux/err.h> 89c7e4702STaniya Das #include <linux/kernel.h> 99c7e4702STaniya Das #include <linux/module.h> 109c7e4702STaniya Das #include <linux/of.h> 119c7e4702STaniya Das #include <linux/of_device.h> 129c7e4702STaniya Das #include <linux/platform_device.h> 139c7e4702STaniya Das #include <soc/qcom/cmd-db.h> 149c7e4702STaniya Das #include <soc/qcom/rpmh.h> 156311b652SJordan Crouse #include <soc/qcom/tcs.h> 169c7e4702STaniya Das 179c7e4702STaniya Das #include <dt-bindings/clock/qcom,rpmh.h> 189c7e4702STaniya Das 199c7e4702STaniya Das #define CLK_RPMH_ARC_EN_OFFSET 0 209c7e4702STaniya Das #define CLK_RPMH_VRM_EN_OFFSET 4 219c7e4702STaniya Das 2204053f4dSDavid Dai /** 2304053f4dSDavid Dai * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM) 2404053f4dSDavid Dai * @unit: divisor used to convert Hz value to an RPMh msg 2504053f4dSDavid Dai * @width: multiplier used to convert Hz value to an RPMh msg 2604053f4dSDavid Dai * @vcd: virtual clock domain that this bcm belongs to 2704053f4dSDavid Dai * @reserved: reserved to pad the struct 2804053f4dSDavid Dai */ 2904053f4dSDavid Dai struct bcm_db { 3004053f4dSDavid Dai __le32 unit; 3104053f4dSDavid Dai __le16 width; 3204053f4dSDavid Dai u8 vcd; 3304053f4dSDavid Dai u8 reserved; 3404053f4dSDavid Dai }; 3504053f4dSDavid Dai 369c7e4702STaniya Das /** 379c7e4702STaniya Das * struct clk_rpmh - individual rpmh clock data structure 389c7e4702STaniya Das * @hw: handle between common and hardware-specific interfaces 399c7e4702STaniya Das * @res_name: resource name for the rpmh clock 409c7e4702STaniya Das * @div: clock divider to compute the clock rate 419c7e4702STaniya Das * @res_addr: base address of the rpmh resource within the RPMh 429c7e4702STaniya Das * @res_on_val: rpmh clock enable value 439c7e4702STaniya Das * @state: rpmh clock requested state 449c7e4702STaniya Das * @aggr_state: rpmh clock aggregated state 459c7e4702STaniya Das * @last_sent_aggr_state: rpmh clock last aggr state sent to RPMh 469c7e4702STaniya Das * @valid_state_mask: mask to determine the state of the rpmh clock 4704053f4dSDavid Dai * @unit: divisor to convert rate to rpmh msg in magnitudes of Khz 489c7e4702STaniya Das * @dev: device to which it is attached 499c7e4702STaniya Das * @peer: pointer to the clock rpmh sibling 509c7e4702STaniya Das */ 519c7e4702STaniya Das struct clk_rpmh { 529c7e4702STaniya Das struct clk_hw hw; 539c7e4702STaniya Das const char *res_name; 549c7e4702STaniya Das u8 div; 559c7e4702STaniya Das u32 res_addr; 569c7e4702STaniya Das u32 res_on_val; 579c7e4702STaniya Das u32 state; 589c7e4702STaniya Das u32 aggr_state; 599c7e4702STaniya Das u32 last_sent_aggr_state; 609c7e4702STaniya Das u32 valid_state_mask; 6104053f4dSDavid Dai u32 unit; 629c7e4702STaniya Das struct device *dev; 639c7e4702STaniya Das struct clk_rpmh *peer; 649c7e4702STaniya Das }; 659c7e4702STaniya Das 669c7e4702STaniya Das struct clk_rpmh_desc { 679c7e4702STaniya Das struct clk_hw **clks; 689c7e4702STaniya Das size_t num_clks; 699c7e4702STaniya Das }; 709c7e4702STaniya Das 719c7e4702STaniya Das static DEFINE_MUTEX(rpmh_clk_lock); 729c7e4702STaniya Das 739c7e4702STaniya Das #define __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name, \ 749c7e4702STaniya Das _res_en_offset, _res_on, _div) \ 759c7e4702STaniya Das static struct clk_rpmh _platform##_##_name_active; \ 769c7e4702STaniya Das static struct clk_rpmh _platform##_##_name = { \ 779c7e4702STaniya Das .res_name = _res_name, \ 789c7e4702STaniya Das .res_addr = _res_en_offset, \ 799c7e4702STaniya Das .res_on_val = _res_on, \ 809c7e4702STaniya Das .div = _div, \ 819c7e4702STaniya Das .peer = &_platform##_##_name_active, \ 829c7e4702STaniya Das .valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) | \ 839c7e4702STaniya Das BIT(RPMH_ACTIVE_ONLY_STATE) | \ 849c7e4702STaniya Das BIT(RPMH_SLEEP_STATE)), \ 859c7e4702STaniya Das .hw.init = &(struct clk_init_data){ \ 869c7e4702STaniya Das .ops = &clk_rpmh_ops, \ 879c7e4702STaniya Das .name = #_name, \ 88a64a9e51SVinod Koul .parent_data = &(const struct clk_parent_data){ \ 89a64a9e51SVinod Koul .fw_name = "xo", \ 90a64a9e51SVinod Koul .name = "xo_board", \ 91a64a9e51SVinod Koul }, \ 929c7e4702STaniya Das .num_parents = 1, \ 939c7e4702STaniya Das }, \ 949c7e4702STaniya Das }; \ 959c7e4702STaniya Das static struct clk_rpmh _platform##_##_name_active = { \ 969c7e4702STaniya Das .res_name = _res_name, \ 979c7e4702STaniya Das .res_addr = _res_en_offset, \ 989c7e4702STaniya Das .res_on_val = _res_on, \ 999c7e4702STaniya Das .div = _div, \ 1009c7e4702STaniya Das .peer = &_platform##_##_name, \ 1019c7e4702STaniya Das .valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) | \ 1029c7e4702STaniya Das BIT(RPMH_ACTIVE_ONLY_STATE)), \ 1039c7e4702STaniya Das .hw.init = &(struct clk_init_data){ \ 1049c7e4702STaniya Das .ops = &clk_rpmh_ops, \ 1059c7e4702STaniya Das .name = #_name_active, \ 106a64a9e51SVinod Koul .parent_data = &(const struct clk_parent_data){ \ 107a64a9e51SVinod Koul .fw_name = "xo", \ 108a64a9e51SVinod Koul .name = "xo_board", \ 109a64a9e51SVinod Koul }, \ 1109c7e4702STaniya Das .num_parents = 1, \ 1119c7e4702STaniya Das }, \ 1129c7e4702STaniya Das } 1139c7e4702STaniya Das 1149c7e4702STaniya Das #define DEFINE_CLK_RPMH_ARC(_platform, _name, _name_active, _res_name, \ 1159c7e4702STaniya Das _res_on, _div) \ 1169c7e4702STaniya Das __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name, \ 1179c7e4702STaniya Das CLK_RPMH_ARC_EN_OFFSET, _res_on, _div) 1189c7e4702STaniya Das 1199c7e4702STaniya Das #define DEFINE_CLK_RPMH_VRM(_platform, _name, _name_active, _res_name, \ 1209c7e4702STaniya Das _div) \ 1219c7e4702STaniya Das __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name, \ 1229c7e4702STaniya Das CLK_RPMH_VRM_EN_OFFSET, 1, _div) 1239c7e4702STaniya Das 12404053f4dSDavid Dai #define DEFINE_CLK_RPMH_BCM(_platform, _name, _res_name) \ 12504053f4dSDavid Dai static struct clk_rpmh _platform##_##_name = { \ 12604053f4dSDavid Dai .res_name = _res_name, \ 12704053f4dSDavid Dai .valid_state_mask = BIT(RPMH_ACTIVE_ONLY_STATE), \ 12804053f4dSDavid Dai .div = 1, \ 12904053f4dSDavid Dai .hw.init = &(struct clk_init_data){ \ 13004053f4dSDavid Dai .ops = &clk_rpmh_bcm_ops, \ 13104053f4dSDavid Dai .name = #_name, \ 13204053f4dSDavid Dai }, \ 13304053f4dSDavid Dai } 13404053f4dSDavid Dai 1359c7e4702STaniya Das static inline struct clk_rpmh *to_clk_rpmh(struct clk_hw *_hw) 1369c7e4702STaniya Das { 1379c7e4702STaniya Das return container_of(_hw, struct clk_rpmh, hw); 1389c7e4702STaniya Das } 1399c7e4702STaniya Das 1409c7e4702STaniya Das static inline bool has_state_changed(struct clk_rpmh *c, u32 state) 1419c7e4702STaniya Das { 1429c7e4702STaniya Das return (c->last_sent_aggr_state & BIT(state)) 1439c7e4702STaniya Das != (c->aggr_state & BIT(state)); 1449c7e4702STaniya Das } 1459c7e4702STaniya Das 146dad4e7fdSMike Tipton static int clk_rpmh_send(struct clk_rpmh *c, enum rpmh_state state, 147dad4e7fdSMike Tipton struct tcs_cmd *cmd, bool wait) 148dad4e7fdSMike Tipton { 149dad4e7fdSMike Tipton if (wait) 150dad4e7fdSMike Tipton return rpmh_write(c->dev, state, cmd, 1); 151dad4e7fdSMike Tipton 152dad4e7fdSMike Tipton return rpmh_write_async(c->dev, state, cmd, 1); 153dad4e7fdSMike Tipton } 154dad4e7fdSMike Tipton 1559c7e4702STaniya Das static int clk_rpmh_send_aggregate_command(struct clk_rpmh *c) 1569c7e4702STaniya Das { 1579c7e4702STaniya Das struct tcs_cmd cmd = { 0 }; 1589c7e4702STaniya Das u32 cmd_state, on_val; 1599c7e4702STaniya Das enum rpmh_state state = RPMH_SLEEP_STATE; 1609c7e4702STaniya Das int ret; 161dad4e7fdSMike Tipton bool wait; 1629c7e4702STaniya Das 1639c7e4702STaniya Das cmd.addr = c->res_addr; 1649c7e4702STaniya Das cmd_state = c->aggr_state; 1659c7e4702STaniya Das on_val = c->res_on_val; 1669c7e4702STaniya Das 1679c7e4702STaniya Das for (; state <= RPMH_ACTIVE_ONLY_STATE; state++) { 1689c7e4702STaniya Das if (has_state_changed(c, state)) { 1699c7e4702STaniya Das if (cmd_state & BIT(state)) 1709c7e4702STaniya Das cmd.data = on_val; 1719c7e4702STaniya Das 172dad4e7fdSMike Tipton wait = cmd_state && state == RPMH_ACTIVE_ONLY_STATE; 173dad4e7fdSMike Tipton ret = clk_rpmh_send(c, state, &cmd, wait); 1749c7e4702STaniya Das if (ret) { 1759c7e4702STaniya Das dev_err(c->dev, "set %s state of %s failed: (%d)\n", 1769c7e4702STaniya Das !state ? "sleep" : 1779c7e4702STaniya Das state == RPMH_WAKE_ONLY_STATE ? 1789c7e4702STaniya Das "wake" : "active", c->res_name, ret); 1799c7e4702STaniya Das return ret; 1809c7e4702STaniya Das } 1819c7e4702STaniya Das } 1829c7e4702STaniya Das } 1839c7e4702STaniya Das 1849c7e4702STaniya Das c->last_sent_aggr_state = c->aggr_state; 1859c7e4702STaniya Das c->peer->last_sent_aggr_state = c->last_sent_aggr_state; 1869c7e4702STaniya Das 1879c7e4702STaniya Das return 0; 1889c7e4702STaniya Das } 1899c7e4702STaniya Das 1909c7e4702STaniya Das /* 1919c7e4702STaniya Das * Update state and aggregate state values based on enable value. 1929c7e4702STaniya Das */ 1939c7e4702STaniya Das static int clk_rpmh_aggregate_state_send_command(struct clk_rpmh *c, 1949c7e4702STaniya Das bool enable) 1959c7e4702STaniya Das { 1969c7e4702STaniya Das int ret; 1979c7e4702STaniya Das 1989c7e4702STaniya Das /* Nothing required to be done if already off or on */ 1999c7e4702STaniya Das if (enable == c->state) 2009c7e4702STaniya Das return 0; 2019c7e4702STaniya Das 2029c7e4702STaniya Das c->state = enable ? c->valid_state_mask : 0; 2039c7e4702STaniya Das c->aggr_state = c->state | c->peer->state; 2049c7e4702STaniya Das c->peer->aggr_state = c->aggr_state; 2059c7e4702STaniya Das 2069c7e4702STaniya Das ret = clk_rpmh_send_aggregate_command(c); 2079c7e4702STaniya Das if (!ret) 2089c7e4702STaniya Das return 0; 2099c7e4702STaniya Das 2109c7e4702STaniya Das if (ret && enable) 2119c7e4702STaniya Das c->state = 0; 2129c7e4702STaniya Das else if (ret) 2139c7e4702STaniya Das c->state = c->valid_state_mask; 2149c7e4702STaniya Das 2159c7e4702STaniya Das WARN(1, "clk: %s failed to %s\n", c->res_name, 2169c7e4702STaniya Das enable ? "enable" : "disable"); 2179c7e4702STaniya Das return ret; 2189c7e4702STaniya Das } 2199c7e4702STaniya Das 2209c7e4702STaniya Das static int clk_rpmh_prepare(struct clk_hw *hw) 2219c7e4702STaniya Das { 2229c7e4702STaniya Das struct clk_rpmh *c = to_clk_rpmh(hw); 2239c7e4702STaniya Das int ret = 0; 2249c7e4702STaniya Das 2259c7e4702STaniya Das mutex_lock(&rpmh_clk_lock); 2269c7e4702STaniya Das ret = clk_rpmh_aggregate_state_send_command(c, true); 2279c7e4702STaniya Das mutex_unlock(&rpmh_clk_lock); 2289c7e4702STaniya Das 2299c7e4702STaniya Das return ret; 230751d7923SStephen Boyd } 2319c7e4702STaniya Das 2329c7e4702STaniya Das static void clk_rpmh_unprepare(struct clk_hw *hw) 2339c7e4702STaniya Das { 2349c7e4702STaniya Das struct clk_rpmh *c = to_clk_rpmh(hw); 2359c7e4702STaniya Das 2369c7e4702STaniya Das mutex_lock(&rpmh_clk_lock); 2379c7e4702STaniya Das clk_rpmh_aggregate_state_send_command(c, false); 2389c7e4702STaniya Das mutex_unlock(&rpmh_clk_lock); 2399c7e4702STaniya Das }; 2409c7e4702STaniya Das 2419c7e4702STaniya Das static unsigned long clk_rpmh_recalc_rate(struct clk_hw *hw, 2429c7e4702STaniya Das unsigned long prate) 2439c7e4702STaniya Das { 2449c7e4702STaniya Das struct clk_rpmh *r = to_clk_rpmh(hw); 2459c7e4702STaniya Das 2469c7e4702STaniya Das /* 2479c7e4702STaniya Das * RPMh clocks have a fixed rate. Return static rate. 2489c7e4702STaniya Das */ 2499c7e4702STaniya Das return prate / r->div; 2509c7e4702STaniya Das } 2519c7e4702STaniya Das 2529c7e4702STaniya Das static const struct clk_ops clk_rpmh_ops = { 2539c7e4702STaniya Das .prepare = clk_rpmh_prepare, 2549c7e4702STaniya Das .unprepare = clk_rpmh_unprepare, 2559c7e4702STaniya Das .recalc_rate = clk_rpmh_recalc_rate, 2569c7e4702STaniya Das }; 2579c7e4702STaniya Das 25804053f4dSDavid Dai static int clk_rpmh_bcm_send_cmd(struct clk_rpmh *c, bool enable) 25904053f4dSDavid Dai { 26004053f4dSDavid Dai struct tcs_cmd cmd = { 0 }; 26104053f4dSDavid Dai u32 cmd_state; 2622cf7a4cbSStephen Boyd int ret = 0; 26304053f4dSDavid Dai 26404053f4dSDavid Dai mutex_lock(&rpmh_clk_lock); 26504053f4dSDavid Dai if (enable) { 26604053f4dSDavid Dai cmd_state = 1; 26704053f4dSDavid Dai if (c->aggr_state) 26804053f4dSDavid Dai cmd_state = c->aggr_state; 2692cf7a4cbSStephen Boyd } else { 2702cf7a4cbSStephen Boyd cmd_state = 0; 27104053f4dSDavid Dai } 27204053f4dSDavid Dai 2732cf7a4cbSStephen Boyd if (c->last_sent_aggr_state != cmd_state) { 27404053f4dSDavid Dai cmd.addr = c->res_addr; 2756311b652SJordan Crouse cmd.data = BCM_TCS_CMD(1, enable, 0, cmd_state); 27604053f4dSDavid Dai 277dad4e7fdSMike Tipton ret = clk_rpmh_send(c, RPMH_ACTIVE_ONLY_STATE, &cmd, enable); 27804053f4dSDavid Dai if (ret) { 27904053f4dSDavid Dai dev_err(c->dev, "set active state of %s failed: (%d)\n", 28004053f4dSDavid Dai c->res_name, ret); 2812cf7a4cbSStephen Boyd } else { 2822cf7a4cbSStephen Boyd c->last_sent_aggr_state = cmd_state; 2832cf7a4cbSStephen Boyd } 28404053f4dSDavid Dai } 28504053f4dSDavid Dai 28604053f4dSDavid Dai mutex_unlock(&rpmh_clk_lock); 28704053f4dSDavid Dai 2882cf7a4cbSStephen Boyd return ret; 28904053f4dSDavid Dai } 29004053f4dSDavid Dai 29104053f4dSDavid Dai static int clk_rpmh_bcm_prepare(struct clk_hw *hw) 29204053f4dSDavid Dai { 29304053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 29404053f4dSDavid Dai 29504053f4dSDavid Dai return clk_rpmh_bcm_send_cmd(c, true); 296751d7923SStephen Boyd } 29704053f4dSDavid Dai 29804053f4dSDavid Dai static void clk_rpmh_bcm_unprepare(struct clk_hw *hw) 29904053f4dSDavid Dai { 30004053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 30104053f4dSDavid Dai 30204053f4dSDavid Dai clk_rpmh_bcm_send_cmd(c, false); 303751d7923SStephen Boyd } 30404053f4dSDavid Dai 30504053f4dSDavid Dai static int clk_rpmh_bcm_set_rate(struct clk_hw *hw, unsigned long rate, 30604053f4dSDavid Dai unsigned long parent_rate) 30704053f4dSDavid Dai { 30804053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 30904053f4dSDavid Dai 31004053f4dSDavid Dai c->aggr_state = rate / c->unit; 31104053f4dSDavid Dai /* 31204053f4dSDavid Dai * Since any non-zero value sent to hw would result in enabling the 31304053f4dSDavid Dai * clock, only send the value if the clock has already been prepared. 31404053f4dSDavid Dai */ 31504053f4dSDavid Dai if (clk_hw_is_prepared(hw)) 31604053f4dSDavid Dai clk_rpmh_bcm_send_cmd(c, true); 31704053f4dSDavid Dai 31804053f4dSDavid Dai return 0; 319751d7923SStephen Boyd } 32004053f4dSDavid Dai 32104053f4dSDavid Dai static long clk_rpmh_round_rate(struct clk_hw *hw, unsigned long rate, 32204053f4dSDavid Dai unsigned long *parent_rate) 32304053f4dSDavid Dai { 32404053f4dSDavid Dai return rate; 32504053f4dSDavid Dai } 32604053f4dSDavid Dai 32704053f4dSDavid Dai static unsigned long clk_rpmh_bcm_recalc_rate(struct clk_hw *hw, 32804053f4dSDavid Dai unsigned long prate) 32904053f4dSDavid Dai { 33004053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 33104053f4dSDavid Dai 33204053f4dSDavid Dai return c->aggr_state * c->unit; 33304053f4dSDavid Dai } 33404053f4dSDavid Dai 33504053f4dSDavid Dai static const struct clk_ops clk_rpmh_bcm_ops = { 33604053f4dSDavid Dai .prepare = clk_rpmh_bcm_prepare, 33704053f4dSDavid Dai .unprepare = clk_rpmh_bcm_unprepare, 33804053f4dSDavid Dai .set_rate = clk_rpmh_bcm_set_rate, 33904053f4dSDavid Dai .round_rate = clk_rpmh_round_rate, 34004053f4dSDavid Dai .recalc_rate = clk_rpmh_bcm_recalc_rate, 34104053f4dSDavid Dai }; 34204053f4dSDavid Dai 343f5790382SStephen Boyd /* Resource name must match resource id present in cmd-db */ 3449c7e4702STaniya Das DEFINE_CLK_RPMH_ARC(sdm845, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 2); 3459c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 2); 3469c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk3, ln_bb_clk3_ao, "lnbclka3", 2); 3479c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, rf_clk1, rf_clk1_ao, "rfclka1", 1); 3489c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1); 3499c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1); 350f5790382SStephen Boyd DEFINE_CLK_RPMH_VRM(sm8150, rf_clk3, rf_clk3_ao, "rfclka3", 1); 35104053f4dSDavid Dai DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0"); 3529c7e4702STaniya Das 3539c7e4702STaniya Das static struct clk_hw *sdm845_rpmh_clocks[] = { 3549c7e4702STaniya Das [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 3559c7e4702STaniya Das [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 3569c7e4702STaniya Das [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 3579c7e4702STaniya Das [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 3589c7e4702STaniya Das [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 3599c7e4702STaniya Das [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 3609c7e4702STaniya Das [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 3619c7e4702STaniya Das [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 3629c7e4702STaniya Das [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 3639c7e4702STaniya Das [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 3649c7e4702STaniya Das [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 3659c7e4702STaniya Das [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 36604053f4dSDavid Dai [RPMH_IPA_CLK] = &sdm845_ipa.hw, 3679c7e4702STaniya Das }; 3689c7e4702STaniya Das 3699c7e4702STaniya Das static const struct clk_rpmh_desc clk_rpmh_sdm845 = { 3709c7e4702STaniya Das .clks = sdm845_rpmh_clocks, 3719c7e4702STaniya Das .num_clks = ARRAY_SIZE(sdm845_rpmh_clocks), 3729c7e4702STaniya Das }; 3739c7e4702STaniya Das 3742243fd41SVinod Koul static struct clk_hw *sm8150_rpmh_clocks[] = { 375f5790382SStephen Boyd [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 376f5790382SStephen Boyd [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 377f5790382SStephen Boyd [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 378f5790382SStephen Boyd [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 379f5790382SStephen Boyd [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 380f5790382SStephen Boyd [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 381f5790382SStephen Boyd [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 382f5790382SStephen Boyd [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 383f5790382SStephen Boyd [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 384f5790382SStephen Boyd [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 385f5790382SStephen Boyd [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 386f5790382SStephen Boyd [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 3872243fd41SVinod Koul }; 3882243fd41SVinod Koul 3892243fd41SVinod Koul static const struct clk_rpmh_desc clk_rpmh_sm8150 = { 3902243fd41SVinod Koul .clks = sm8150_rpmh_clocks, 3912243fd41SVinod Koul .num_clks = ARRAY_SIZE(sm8150_rpmh_clocks), 3922243fd41SVinod Koul }; 3932243fd41SVinod Koul 394eee28109STaniya Das static struct clk_hw *sc7180_rpmh_clocks[] = { 395eee28109STaniya Das [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 396eee28109STaniya Das [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 397eee28109STaniya Das [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 398eee28109STaniya Das [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 399eee28109STaniya Das [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 400eee28109STaniya Das [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 401eee28109STaniya Das [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 402eee28109STaniya Das [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 403eee28109STaniya Das [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 404eee28109STaniya Das [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 405bcd63d22STaniya Das [RPMH_IPA_CLK] = &sdm845_ipa.hw, 406eee28109STaniya Das }; 407eee28109STaniya Das 408eee28109STaniya Das static const struct clk_rpmh_desc clk_rpmh_sc7180 = { 409eee28109STaniya Das .clks = sc7180_rpmh_clocks, 410eee28109STaniya Das .num_clks = ARRAY_SIZE(sc7180_rpmh_clocks), 411eee28109STaniya Das }; 412eee28109STaniya Das 41329093b1aSTaniya Das DEFINE_CLK_RPMH_VRM(sm8250, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 2); 41429093b1aSTaniya Das 41529093b1aSTaniya Das static struct clk_hw *sm8250_rpmh_clocks[] = { 41629093b1aSTaniya Das [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 41729093b1aSTaniya Das [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 41829093b1aSTaniya Das [RPMH_LN_BB_CLK1] = &sm8250_ln_bb_clk1.hw, 41929093b1aSTaniya Das [RPMH_LN_BB_CLK1_A] = &sm8250_ln_bb_clk1_ao.hw, 42029093b1aSTaniya Das [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 42129093b1aSTaniya Das [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 42229093b1aSTaniya Das [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 42329093b1aSTaniya Das [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 42429093b1aSTaniya Das [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 42529093b1aSTaniya Das [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 42629093b1aSTaniya Das [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 42729093b1aSTaniya Das [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 42829093b1aSTaniya Das }; 42929093b1aSTaniya Das 43029093b1aSTaniya Das static const struct clk_rpmh_desc clk_rpmh_sm8250 = { 43129093b1aSTaniya Das .clks = sm8250_rpmh_clocks, 43229093b1aSTaniya Das .num_clks = ARRAY_SIZE(sm8250_rpmh_clocks), 43329093b1aSTaniya Das }; 43429093b1aSTaniya Das 4359c7e4702STaniya Das static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, 4369c7e4702STaniya Das void *data) 4379c7e4702STaniya Das { 4389c7e4702STaniya Das struct clk_rpmh_desc *rpmh = data; 4399c7e4702STaniya Das unsigned int idx = clkspec->args[0]; 4409c7e4702STaniya Das 4419c7e4702STaniya Das if (idx >= rpmh->num_clks) { 4429c7e4702STaniya Das pr_err("%s: invalid index %u\n", __func__, idx); 4439c7e4702STaniya Das return ERR_PTR(-EINVAL); 4449c7e4702STaniya Das } 4459c7e4702STaniya Das 4469c7e4702STaniya Das return rpmh->clks[idx]; 4479c7e4702STaniya Das } 4489c7e4702STaniya Das 4499c7e4702STaniya Das static int clk_rpmh_probe(struct platform_device *pdev) 4509c7e4702STaniya Das { 4519c7e4702STaniya Das struct clk_hw **hw_clks; 4529c7e4702STaniya Das struct clk_rpmh *rpmh_clk; 4539c7e4702STaniya Das const struct clk_rpmh_desc *desc; 4549c7e4702STaniya Das int ret, i; 4559c7e4702STaniya Das 4569c7e4702STaniya Das desc = of_device_get_match_data(&pdev->dev); 4579c7e4702STaniya Das if (!desc) 4589c7e4702STaniya Das return -ENODEV; 4599c7e4702STaniya Das 4609c7e4702STaniya Das hw_clks = desc->clks; 4619c7e4702STaniya Das 4629c7e4702STaniya Das for (i = 0; i < desc->num_clks; i++) { 463924e2d01STaniya Das const char *name; 4649c7e4702STaniya Das u32 res_addr; 46504053f4dSDavid Dai size_t aux_data_len; 46604053f4dSDavid Dai const struct bcm_db *data; 4679c7e4702STaniya Das 468924e2d01STaniya Das if (!hw_clks[i]) 469924e2d01STaniya Das continue; 470924e2d01STaniya Das 471924e2d01STaniya Das name = hw_clks[i]->init->name; 472924e2d01STaniya Das 4739c7e4702STaniya Das rpmh_clk = to_clk_rpmh(hw_clks[i]); 4749c7e4702STaniya Das res_addr = cmd_db_read_addr(rpmh_clk->res_name); 4759c7e4702STaniya Das if (!res_addr) { 4769c7e4702STaniya Das dev_err(&pdev->dev, "missing RPMh resource address for %s\n", 4779c7e4702STaniya Das rpmh_clk->res_name); 4789c7e4702STaniya Das return -ENODEV; 4799c7e4702STaniya Das } 48004053f4dSDavid Dai 48104053f4dSDavid Dai data = cmd_db_read_aux_data(rpmh_clk->res_name, &aux_data_len); 48204053f4dSDavid Dai if (IS_ERR(data)) { 48304053f4dSDavid Dai ret = PTR_ERR(data); 48404053f4dSDavid Dai dev_err(&pdev->dev, 48504053f4dSDavid Dai "error reading RPMh aux data for %s (%d)\n", 48604053f4dSDavid Dai rpmh_clk->res_name, ret); 48704053f4dSDavid Dai return ret; 48804053f4dSDavid Dai } 48904053f4dSDavid Dai 49004053f4dSDavid Dai /* Convert unit from Khz to Hz */ 49104053f4dSDavid Dai if (aux_data_len == sizeof(*data)) 49204053f4dSDavid Dai rpmh_clk->unit = le32_to_cpu(data->unit) * 1000ULL; 49304053f4dSDavid Dai 4949c7e4702STaniya Das rpmh_clk->res_addr += res_addr; 4959c7e4702STaniya Das rpmh_clk->dev = &pdev->dev; 4969c7e4702STaniya Das 4979c7e4702STaniya Das ret = devm_clk_hw_register(&pdev->dev, hw_clks[i]); 4989c7e4702STaniya Das if (ret) { 499af884a5dSStephen Boyd dev_err(&pdev->dev, "failed to register %s\n", name); 5009c7e4702STaniya Das return ret; 5019c7e4702STaniya Das } 5029c7e4702STaniya Das } 5039c7e4702STaniya Das 5049c7e4702STaniya Das /* typecast to silence compiler warning */ 5059c7e4702STaniya Das ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_rpmh_hw_get, 5069c7e4702STaniya Das (void *)desc); 5079c7e4702STaniya Das if (ret) { 5089c7e4702STaniya Das dev_err(&pdev->dev, "Failed to add clock provider\n"); 5099c7e4702STaniya Das return ret; 5109c7e4702STaniya Das } 5119c7e4702STaniya Das 5129c7e4702STaniya Das dev_dbg(&pdev->dev, "Registered RPMh clocks\n"); 5139c7e4702STaniya Das 5149c7e4702STaniya Das return 0; 5159c7e4702STaniya Das } 5169c7e4702STaniya Das 5179c7e4702STaniya Das static const struct of_device_id clk_rpmh_match_table[] = { 5189e0cda72SBjorn Andersson { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180}, 5199c7e4702STaniya Das { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, 5202243fd41SVinod Koul { .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150}, 52129093b1aSTaniya Das { .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250}, 5229c7e4702STaniya Das { } 5239c7e4702STaniya Das }; 5249c7e4702STaniya Das MODULE_DEVICE_TABLE(of, clk_rpmh_match_table); 5259c7e4702STaniya Das 5269c7e4702STaniya Das static struct platform_driver clk_rpmh_driver = { 5279c7e4702STaniya Das .probe = clk_rpmh_probe, 5289c7e4702STaniya Das .driver = { 5299c7e4702STaniya Das .name = "clk-rpmh", 5309c7e4702STaniya Das .of_match_table = clk_rpmh_match_table, 5319c7e4702STaniya Das }, 5329c7e4702STaniya Das }; 5339c7e4702STaniya Das 5349c7e4702STaniya Das static int __init clk_rpmh_init(void) 5359c7e4702STaniya Das { 5369c7e4702STaniya Das return platform_driver_register(&clk_rpmh_driver); 5379c7e4702STaniya Das } 538b418bab4SAmit Kucheria core_initcall(clk_rpmh_init); 5399c7e4702STaniya Das 5409c7e4702STaniya Das static void __exit clk_rpmh_exit(void) 5419c7e4702STaniya Das { 5429c7e4702STaniya Das platform_driver_unregister(&clk_rpmh_driver); 5439c7e4702STaniya Das } 5449c7e4702STaniya Das module_exit(clk_rpmh_exit); 5459c7e4702STaniya Das 5469c7e4702STaniya Das MODULE_DESCRIPTION("QCOM RPMh Clock Driver"); 5479c7e4702STaniya Das MODULE_LICENSE("GPL v2"); 548