19c7e4702STaniya Das // SPDX-License-Identifier: GPL-2.0 29c7e4702STaniya Das /* 3fff2b9a6STaniya Das * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. 49c7e4702STaniya Das */ 59c7e4702STaniya Das 69c7e4702STaniya Das #include <linux/clk-provider.h> 79c7e4702STaniya Das #include <linux/err.h> 89c7e4702STaniya Das #include <linux/kernel.h> 99c7e4702STaniya Das #include <linux/module.h> 109c7e4702STaniya Das #include <linux/of.h> 119c7e4702STaniya Das #include <linux/of_device.h> 129c7e4702STaniya Das #include <linux/platform_device.h> 139c7e4702STaniya Das #include <soc/qcom/cmd-db.h> 149c7e4702STaniya Das #include <soc/qcom/rpmh.h> 156311b652SJordan Crouse #include <soc/qcom/tcs.h> 169c7e4702STaniya Das 179c7e4702STaniya Das #include <dt-bindings/clock/qcom,rpmh.h> 189c7e4702STaniya Das 199c7e4702STaniya Das #define CLK_RPMH_ARC_EN_OFFSET 0 209c7e4702STaniya Das #define CLK_RPMH_VRM_EN_OFFSET 4 219c7e4702STaniya Das 2204053f4dSDavid Dai /** 2304053f4dSDavid Dai * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM) 2404053f4dSDavid Dai * @unit: divisor used to convert Hz value to an RPMh msg 2504053f4dSDavid Dai * @width: multiplier used to convert Hz value to an RPMh msg 2604053f4dSDavid Dai * @vcd: virtual clock domain that this bcm belongs to 2704053f4dSDavid Dai * @reserved: reserved to pad the struct 2804053f4dSDavid Dai */ 2904053f4dSDavid Dai struct bcm_db { 3004053f4dSDavid Dai __le32 unit; 3104053f4dSDavid Dai __le16 width; 3204053f4dSDavid Dai u8 vcd; 3304053f4dSDavid Dai u8 reserved; 3404053f4dSDavid Dai }; 3504053f4dSDavid Dai 369c7e4702STaniya Das /** 379c7e4702STaniya Das * struct clk_rpmh - individual rpmh clock data structure 389c7e4702STaniya Das * @hw: handle between common and hardware-specific interfaces 399c7e4702STaniya Das * @res_name: resource name for the rpmh clock 409c7e4702STaniya Das * @div: clock divider to compute the clock rate 419c7e4702STaniya Das * @res_addr: base address of the rpmh resource within the RPMh 429c7e4702STaniya Das * @res_on_val: rpmh clock enable value 439c7e4702STaniya Das * @state: rpmh clock requested state 449c7e4702STaniya Das * @aggr_state: rpmh clock aggregated state 459c7e4702STaniya Das * @last_sent_aggr_state: rpmh clock last aggr state sent to RPMh 469c7e4702STaniya Das * @valid_state_mask: mask to determine the state of the rpmh clock 4704053f4dSDavid Dai * @unit: divisor to convert rate to rpmh msg in magnitudes of Khz 489c7e4702STaniya Das * @dev: device to which it is attached 499c7e4702STaniya Das * @peer: pointer to the clock rpmh sibling 509c7e4702STaniya Das */ 519c7e4702STaniya Das struct clk_rpmh { 529c7e4702STaniya Das struct clk_hw hw; 539c7e4702STaniya Das const char *res_name; 549c7e4702STaniya Das u8 div; 559c7e4702STaniya Das u32 res_addr; 569c7e4702STaniya Das u32 res_on_val; 579c7e4702STaniya Das u32 state; 589c7e4702STaniya Das u32 aggr_state; 599c7e4702STaniya Das u32 last_sent_aggr_state; 609c7e4702STaniya Das u32 valid_state_mask; 6104053f4dSDavid Dai u32 unit; 629c7e4702STaniya Das struct device *dev; 639c7e4702STaniya Das struct clk_rpmh *peer; 649c7e4702STaniya Das }; 659c7e4702STaniya Das 669c7e4702STaniya Das struct clk_rpmh_desc { 679c7e4702STaniya Das struct clk_hw **clks; 689c7e4702STaniya Das size_t num_clks; 699c7e4702STaniya Das }; 709c7e4702STaniya Das 719c7e4702STaniya Das static DEFINE_MUTEX(rpmh_clk_lock); 729c7e4702STaniya Das 739c7e4702STaniya Das #define __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name, \ 749c7e4702STaniya Das _res_en_offset, _res_on, _div) \ 759c7e4702STaniya Das static struct clk_rpmh _platform##_##_name_active; \ 769c7e4702STaniya Das static struct clk_rpmh _platform##_##_name = { \ 779c7e4702STaniya Das .res_name = _res_name, \ 789c7e4702STaniya Das .res_addr = _res_en_offset, \ 799c7e4702STaniya Das .res_on_val = _res_on, \ 809c7e4702STaniya Das .div = _div, \ 819c7e4702STaniya Das .peer = &_platform##_##_name_active, \ 829c7e4702STaniya Das .valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) | \ 839c7e4702STaniya Das BIT(RPMH_ACTIVE_ONLY_STATE) | \ 849c7e4702STaniya Das BIT(RPMH_SLEEP_STATE)), \ 859c7e4702STaniya Das .hw.init = &(struct clk_init_data){ \ 869c7e4702STaniya Das .ops = &clk_rpmh_ops, \ 879c7e4702STaniya Das .name = #_name, \ 88a64a9e51SVinod Koul .parent_data = &(const struct clk_parent_data){ \ 89a64a9e51SVinod Koul .fw_name = "xo", \ 90a64a9e51SVinod Koul .name = "xo_board", \ 91a64a9e51SVinod Koul }, \ 929c7e4702STaniya Das .num_parents = 1, \ 939c7e4702STaniya Das }, \ 949c7e4702STaniya Das }; \ 959c7e4702STaniya Das static struct clk_rpmh _platform##_##_name_active = { \ 969c7e4702STaniya Das .res_name = _res_name, \ 979c7e4702STaniya Das .res_addr = _res_en_offset, \ 989c7e4702STaniya Das .res_on_val = _res_on, \ 999c7e4702STaniya Das .div = _div, \ 1009c7e4702STaniya Das .peer = &_platform##_##_name, \ 1019c7e4702STaniya Das .valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) | \ 1029c7e4702STaniya Das BIT(RPMH_ACTIVE_ONLY_STATE)), \ 1039c7e4702STaniya Das .hw.init = &(struct clk_init_data){ \ 1049c7e4702STaniya Das .ops = &clk_rpmh_ops, \ 1059c7e4702STaniya Das .name = #_name_active, \ 106a64a9e51SVinod Koul .parent_data = &(const struct clk_parent_data){ \ 107a64a9e51SVinod Koul .fw_name = "xo", \ 108a64a9e51SVinod Koul .name = "xo_board", \ 109a64a9e51SVinod Koul }, \ 1109c7e4702STaniya Das .num_parents = 1, \ 1119c7e4702STaniya Das }, \ 1129c7e4702STaniya Das } 1139c7e4702STaniya Das 1149c7e4702STaniya Das #define DEFINE_CLK_RPMH_ARC(_platform, _name, _name_active, _res_name, \ 1159c7e4702STaniya Das _res_on, _div) \ 1169c7e4702STaniya Das __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name, \ 1179c7e4702STaniya Das CLK_RPMH_ARC_EN_OFFSET, _res_on, _div) 1189c7e4702STaniya Das 1199c7e4702STaniya Das #define DEFINE_CLK_RPMH_VRM(_platform, _name, _name_active, _res_name, \ 1209c7e4702STaniya Das _div) \ 1219c7e4702STaniya Das __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name, \ 1229c7e4702STaniya Das CLK_RPMH_VRM_EN_OFFSET, 1, _div) 1239c7e4702STaniya Das 12404053f4dSDavid Dai #define DEFINE_CLK_RPMH_BCM(_platform, _name, _res_name) \ 12504053f4dSDavid Dai static struct clk_rpmh _platform##_##_name = { \ 12604053f4dSDavid Dai .res_name = _res_name, \ 12704053f4dSDavid Dai .valid_state_mask = BIT(RPMH_ACTIVE_ONLY_STATE), \ 12804053f4dSDavid Dai .div = 1, \ 12904053f4dSDavid Dai .hw.init = &(struct clk_init_data){ \ 13004053f4dSDavid Dai .ops = &clk_rpmh_bcm_ops, \ 13104053f4dSDavid Dai .name = #_name, \ 13204053f4dSDavid Dai }, \ 13304053f4dSDavid Dai } 13404053f4dSDavid Dai 1359c7e4702STaniya Das static inline struct clk_rpmh *to_clk_rpmh(struct clk_hw *_hw) 1369c7e4702STaniya Das { 1379c7e4702STaniya Das return container_of(_hw, struct clk_rpmh, hw); 1389c7e4702STaniya Das } 1399c7e4702STaniya Das 1409c7e4702STaniya Das static inline bool has_state_changed(struct clk_rpmh *c, u32 state) 1419c7e4702STaniya Das { 1429c7e4702STaniya Das return (c->last_sent_aggr_state & BIT(state)) 1439c7e4702STaniya Das != (c->aggr_state & BIT(state)); 1449c7e4702STaniya Das } 1459c7e4702STaniya Das 146dad4e7fdSMike Tipton static int clk_rpmh_send(struct clk_rpmh *c, enum rpmh_state state, 147dad4e7fdSMike Tipton struct tcs_cmd *cmd, bool wait) 148dad4e7fdSMike Tipton { 149dad4e7fdSMike Tipton if (wait) 150dad4e7fdSMike Tipton return rpmh_write(c->dev, state, cmd, 1); 151dad4e7fdSMike Tipton 152dad4e7fdSMike Tipton return rpmh_write_async(c->dev, state, cmd, 1); 153dad4e7fdSMike Tipton } 154dad4e7fdSMike Tipton 1559c7e4702STaniya Das static int clk_rpmh_send_aggregate_command(struct clk_rpmh *c) 1569c7e4702STaniya Das { 1579c7e4702STaniya Das struct tcs_cmd cmd = { 0 }; 1589c7e4702STaniya Das u32 cmd_state, on_val; 1599c7e4702STaniya Das enum rpmh_state state = RPMH_SLEEP_STATE; 1609c7e4702STaniya Das int ret; 161dad4e7fdSMike Tipton bool wait; 1629c7e4702STaniya Das 1639c7e4702STaniya Das cmd.addr = c->res_addr; 1649c7e4702STaniya Das cmd_state = c->aggr_state; 1659c7e4702STaniya Das on_val = c->res_on_val; 1669c7e4702STaniya Das 1679c7e4702STaniya Das for (; state <= RPMH_ACTIVE_ONLY_STATE; state++) { 1689c7e4702STaniya Das if (has_state_changed(c, state)) { 1699c7e4702STaniya Das if (cmd_state & BIT(state)) 1709c7e4702STaniya Das cmd.data = on_val; 1719c7e4702STaniya Das 172dad4e7fdSMike Tipton wait = cmd_state && state == RPMH_ACTIVE_ONLY_STATE; 173dad4e7fdSMike Tipton ret = clk_rpmh_send(c, state, &cmd, wait); 1749c7e4702STaniya Das if (ret) { 1759c7e4702STaniya Das dev_err(c->dev, "set %s state of %s failed: (%d)\n", 1769c7e4702STaniya Das !state ? "sleep" : 1779c7e4702STaniya Das state == RPMH_WAKE_ONLY_STATE ? 1789c7e4702STaniya Das "wake" : "active", c->res_name, ret); 1799c7e4702STaniya Das return ret; 1809c7e4702STaniya Das } 1819c7e4702STaniya Das } 1829c7e4702STaniya Das } 1839c7e4702STaniya Das 1849c7e4702STaniya Das c->last_sent_aggr_state = c->aggr_state; 1859c7e4702STaniya Das c->peer->last_sent_aggr_state = c->last_sent_aggr_state; 1869c7e4702STaniya Das 1879c7e4702STaniya Das return 0; 1889c7e4702STaniya Das } 1899c7e4702STaniya Das 1909c7e4702STaniya Das /* 1919c7e4702STaniya Das * Update state and aggregate state values based on enable value. 1929c7e4702STaniya Das */ 1939c7e4702STaniya Das static int clk_rpmh_aggregate_state_send_command(struct clk_rpmh *c, 1949c7e4702STaniya Das bool enable) 1959c7e4702STaniya Das { 1969c7e4702STaniya Das int ret; 1979c7e4702STaniya Das 1989c7e4702STaniya Das c->state = enable ? c->valid_state_mask : 0; 1999c7e4702STaniya Das c->aggr_state = c->state | c->peer->state; 2009c7e4702STaniya Das c->peer->aggr_state = c->aggr_state; 2019c7e4702STaniya Das 2029c7e4702STaniya Das ret = clk_rpmh_send_aggregate_command(c); 2039c7e4702STaniya Das if (!ret) 2049c7e4702STaniya Das return 0; 2059c7e4702STaniya Das 2069c7e4702STaniya Das if (ret && enable) 2079c7e4702STaniya Das c->state = 0; 2089c7e4702STaniya Das else if (ret) 2099c7e4702STaniya Das c->state = c->valid_state_mask; 2109c7e4702STaniya Das 2119c7e4702STaniya Das WARN(1, "clk: %s failed to %s\n", c->res_name, 2129c7e4702STaniya Das enable ? "enable" : "disable"); 2139c7e4702STaniya Das return ret; 2149c7e4702STaniya Das } 2159c7e4702STaniya Das 2169c7e4702STaniya Das static int clk_rpmh_prepare(struct clk_hw *hw) 2179c7e4702STaniya Das { 2189c7e4702STaniya Das struct clk_rpmh *c = to_clk_rpmh(hw); 2199c7e4702STaniya Das int ret = 0; 2209c7e4702STaniya Das 2219c7e4702STaniya Das mutex_lock(&rpmh_clk_lock); 2229c7e4702STaniya Das ret = clk_rpmh_aggregate_state_send_command(c, true); 2239c7e4702STaniya Das mutex_unlock(&rpmh_clk_lock); 2249c7e4702STaniya Das 2259c7e4702STaniya Das return ret; 226751d7923SStephen Boyd } 2279c7e4702STaniya Das 2289c7e4702STaniya Das static void clk_rpmh_unprepare(struct clk_hw *hw) 2299c7e4702STaniya Das { 2309c7e4702STaniya Das struct clk_rpmh *c = to_clk_rpmh(hw); 2319c7e4702STaniya Das 2329c7e4702STaniya Das mutex_lock(&rpmh_clk_lock); 2339c7e4702STaniya Das clk_rpmh_aggregate_state_send_command(c, false); 2349c7e4702STaniya Das mutex_unlock(&rpmh_clk_lock); 2359c7e4702STaniya Das }; 2369c7e4702STaniya Das 2379c7e4702STaniya Das static unsigned long clk_rpmh_recalc_rate(struct clk_hw *hw, 2389c7e4702STaniya Das unsigned long prate) 2399c7e4702STaniya Das { 2409c7e4702STaniya Das struct clk_rpmh *r = to_clk_rpmh(hw); 2419c7e4702STaniya Das 2429c7e4702STaniya Das /* 2439c7e4702STaniya Das * RPMh clocks have a fixed rate. Return static rate. 2449c7e4702STaniya Das */ 2459c7e4702STaniya Das return prate / r->div; 2469c7e4702STaniya Das } 2479c7e4702STaniya Das 2489c7e4702STaniya Das static const struct clk_ops clk_rpmh_ops = { 2499c7e4702STaniya Das .prepare = clk_rpmh_prepare, 2509c7e4702STaniya Das .unprepare = clk_rpmh_unprepare, 2519c7e4702STaniya Das .recalc_rate = clk_rpmh_recalc_rate, 2529c7e4702STaniya Das }; 2539c7e4702STaniya Das 25404053f4dSDavid Dai static int clk_rpmh_bcm_send_cmd(struct clk_rpmh *c, bool enable) 25504053f4dSDavid Dai { 25604053f4dSDavid Dai struct tcs_cmd cmd = { 0 }; 25704053f4dSDavid Dai u32 cmd_state; 2582cf7a4cbSStephen Boyd int ret = 0; 25904053f4dSDavid Dai 26004053f4dSDavid Dai mutex_lock(&rpmh_clk_lock); 26104053f4dSDavid Dai if (enable) { 26204053f4dSDavid Dai cmd_state = 1; 26304053f4dSDavid Dai if (c->aggr_state) 26404053f4dSDavid Dai cmd_state = c->aggr_state; 2652cf7a4cbSStephen Boyd } else { 2662cf7a4cbSStephen Boyd cmd_state = 0; 26704053f4dSDavid Dai } 26804053f4dSDavid Dai 2692cf7a4cbSStephen Boyd if (c->last_sent_aggr_state != cmd_state) { 27004053f4dSDavid Dai cmd.addr = c->res_addr; 2716311b652SJordan Crouse cmd.data = BCM_TCS_CMD(1, enable, 0, cmd_state); 27204053f4dSDavid Dai 27329f66b62SStephen Boyd /* 27429f66b62SStephen Boyd * Send only an active only state request. RPMh continues to 27529f66b62SStephen Boyd * use the active state when we're in sleep/wake state as long 27629f66b62SStephen Boyd * as the sleep/wake state has never been set. 27729f66b62SStephen Boyd */ 278dad4e7fdSMike Tipton ret = clk_rpmh_send(c, RPMH_ACTIVE_ONLY_STATE, &cmd, enable); 27904053f4dSDavid Dai if (ret) { 28004053f4dSDavid Dai dev_err(c->dev, "set active state of %s failed: (%d)\n", 28104053f4dSDavid Dai c->res_name, ret); 2822cf7a4cbSStephen Boyd } else { 2832cf7a4cbSStephen Boyd c->last_sent_aggr_state = cmd_state; 2842cf7a4cbSStephen Boyd } 28504053f4dSDavid Dai } 28604053f4dSDavid Dai 28704053f4dSDavid Dai mutex_unlock(&rpmh_clk_lock); 28804053f4dSDavid Dai 2892cf7a4cbSStephen Boyd return ret; 29004053f4dSDavid Dai } 29104053f4dSDavid Dai 29204053f4dSDavid Dai static int clk_rpmh_bcm_prepare(struct clk_hw *hw) 29304053f4dSDavid Dai { 29404053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 29504053f4dSDavid Dai 29604053f4dSDavid Dai return clk_rpmh_bcm_send_cmd(c, true); 297751d7923SStephen Boyd } 29804053f4dSDavid Dai 29904053f4dSDavid Dai static void clk_rpmh_bcm_unprepare(struct clk_hw *hw) 30004053f4dSDavid Dai { 30104053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 30204053f4dSDavid Dai 30304053f4dSDavid Dai clk_rpmh_bcm_send_cmd(c, false); 304751d7923SStephen Boyd } 30504053f4dSDavid Dai 30604053f4dSDavid Dai static int clk_rpmh_bcm_set_rate(struct clk_hw *hw, unsigned long rate, 30704053f4dSDavid Dai unsigned long parent_rate) 30804053f4dSDavid Dai { 30904053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 31004053f4dSDavid Dai 31104053f4dSDavid Dai c->aggr_state = rate / c->unit; 31204053f4dSDavid Dai /* 31304053f4dSDavid Dai * Since any non-zero value sent to hw would result in enabling the 31404053f4dSDavid Dai * clock, only send the value if the clock has already been prepared. 31504053f4dSDavid Dai */ 31604053f4dSDavid Dai if (clk_hw_is_prepared(hw)) 31704053f4dSDavid Dai clk_rpmh_bcm_send_cmd(c, true); 31804053f4dSDavid Dai 31904053f4dSDavid Dai return 0; 320751d7923SStephen Boyd } 32104053f4dSDavid Dai 32204053f4dSDavid Dai static long clk_rpmh_round_rate(struct clk_hw *hw, unsigned long rate, 32304053f4dSDavid Dai unsigned long *parent_rate) 32404053f4dSDavid Dai { 32504053f4dSDavid Dai return rate; 32604053f4dSDavid Dai } 32704053f4dSDavid Dai 32804053f4dSDavid Dai static unsigned long clk_rpmh_bcm_recalc_rate(struct clk_hw *hw, 32904053f4dSDavid Dai unsigned long prate) 33004053f4dSDavid Dai { 33104053f4dSDavid Dai struct clk_rpmh *c = to_clk_rpmh(hw); 33204053f4dSDavid Dai 33304053f4dSDavid Dai return c->aggr_state * c->unit; 33404053f4dSDavid Dai } 33504053f4dSDavid Dai 33604053f4dSDavid Dai static const struct clk_ops clk_rpmh_bcm_ops = { 33704053f4dSDavid Dai .prepare = clk_rpmh_bcm_prepare, 33804053f4dSDavid Dai .unprepare = clk_rpmh_bcm_unprepare, 33904053f4dSDavid Dai .set_rate = clk_rpmh_bcm_set_rate, 34004053f4dSDavid Dai .round_rate = clk_rpmh_round_rate, 34104053f4dSDavid Dai .recalc_rate = clk_rpmh_bcm_recalc_rate, 34204053f4dSDavid Dai }; 34304053f4dSDavid Dai 344f5790382SStephen Boyd /* Resource name must match resource id present in cmd-db */ 3459c7e4702STaniya Das DEFINE_CLK_RPMH_ARC(sdm845, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 2); 3469c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 2); 3479c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk3, ln_bb_clk3_ao, "lnbclka3", 2); 3489c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, rf_clk1, rf_clk1_ao, "rfclka1", 1); 3499c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1); 3509c7e4702STaniya Das DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1); 351f5790382SStephen Boyd DEFINE_CLK_RPMH_VRM(sm8150, rf_clk3, rf_clk3_ao, "rfclka3", 1); 3528a1f7fb1SBjorn Andersson DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk1, rf_clk1_ao, "rfclkd1", 1); 3538a1f7fb1SBjorn Andersson DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk2, rf_clk2_ao, "rfclkd2", 1); 3548a1f7fb1SBjorn Andersson DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk3, rf_clk3_ao, "rfclkd3", 1); 3558a1f7fb1SBjorn Andersson DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk4, rf_clk4_ao, "rfclkd4", 1); 35604053f4dSDavid Dai DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0"); 357dba6bc51SThara Gopinath DEFINE_CLK_RPMH_BCM(sdm845, ce, "CE0"); 3589c7e4702STaniya Das 3599c7e4702STaniya Das static struct clk_hw *sdm845_rpmh_clocks[] = { 3609c7e4702STaniya Das [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 3619c7e4702STaniya Das [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 3629c7e4702STaniya Das [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 3639c7e4702STaniya Das [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 3649c7e4702STaniya Das [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 3659c7e4702STaniya Das [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 3669c7e4702STaniya Das [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 3679c7e4702STaniya Das [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 3689c7e4702STaniya Das [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 3699c7e4702STaniya Das [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 3709c7e4702STaniya Das [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 3719c7e4702STaniya Das [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 37204053f4dSDavid Dai [RPMH_IPA_CLK] = &sdm845_ipa.hw, 373dba6bc51SThara Gopinath [RPMH_CE_CLK] = &sdm845_ce.hw, 3749c7e4702STaniya Das }; 3759c7e4702STaniya Das 3769c7e4702STaniya Das static const struct clk_rpmh_desc clk_rpmh_sdm845 = { 3779c7e4702STaniya Das .clks = sdm845_rpmh_clocks, 3789c7e4702STaniya Das .num_clks = ARRAY_SIZE(sdm845_rpmh_clocks), 3799c7e4702STaniya Das }; 3809c7e4702STaniya Das 381*2ded040cSRichard Acayan static struct clk_hw *sdm670_rpmh_clocks[] = { 382*2ded040cSRichard Acayan [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 383*2ded040cSRichard Acayan [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 384*2ded040cSRichard Acayan [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 385*2ded040cSRichard Acayan [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 386*2ded040cSRichard Acayan [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 387*2ded040cSRichard Acayan [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 388*2ded040cSRichard Acayan [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 389*2ded040cSRichard Acayan [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 390*2ded040cSRichard Acayan [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 391*2ded040cSRichard Acayan [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 392*2ded040cSRichard Acayan [RPMH_IPA_CLK] = &sdm845_ipa.hw, 393*2ded040cSRichard Acayan [RPMH_CE_CLK] = &sdm845_ce.hw, 394*2ded040cSRichard Acayan }; 395*2ded040cSRichard Acayan 396*2ded040cSRichard Acayan static const struct clk_rpmh_desc clk_rpmh_sdm670 = { 397*2ded040cSRichard Acayan .clks = sdm670_rpmh_clocks, 398*2ded040cSRichard Acayan .num_clks = ARRAY_SIZE(sdm670_rpmh_clocks), 399*2ded040cSRichard Acayan }; 400*2ded040cSRichard Acayan 401f7b36cc1SVinod Koul DEFINE_CLK_RPMH_VRM(sdx55, rf_clk1, rf_clk1_ao, "rfclkd1", 1); 402f7b36cc1SVinod Koul DEFINE_CLK_RPMH_VRM(sdx55, rf_clk2, rf_clk2_ao, "rfclkd2", 1); 403f7b36cc1SVinod Koul DEFINE_CLK_RPMH_BCM(sdx55, qpic_clk, "QP0"); 404b2150cabSAlex Elder DEFINE_CLK_RPMH_BCM(sdx55, ipa, "IP0"); 405f7b36cc1SVinod Koul 406f7b36cc1SVinod Koul static struct clk_hw *sdx55_rpmh_clocks[] = { 407f7b36cc1SVinod Koul [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 408f7b36cc1SVinod Koul [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 409f7b36cc1SVinod Koul [RPMH_RF_CLK1] = &sdx55_rf_clk1.hw, 410f7b36cc1SVinod Koul [RPMH_RF_CLK1_A] = &sdx55_rf_clk1_ao.hw, 411f7b36cc1SVinod Koul [RPMH_RF_CLK2] = &sdx55_rf_clk2.hw, 412f7b36cc1SVinod Koul [RPMH_RF_CLK2_A] = &sdx55_rf_clk2_ao.hw, 413f7b36cc1SVinod Koul [RPMH_QPIC_CLK] = &sdx55_qpic_clk.hw, 414b2150cabSAlex Elder [RPMH_IPA_CLK] = &sdx55_ipa.hw, 415f7b36cc1SVinod Koul }; 416f7b36cc1SVinod Koul 417f7b36cc1SVinod Koul static const struct clk_rpmh_desc clk_rpmh_sdx55 = { 418f7b36cc1SVinod Koul .clks = sdx55_rpmh_clocks, 419f7b36cc1SVinod Koul .num_clks = ARRAY_SIZE(sdx55_rpmh_clocks), 420f7b36cc1SVinod Koul }; 421f7b36cc1SVinod Koul 4222243fd41SVinod Koul static struct clk_hw *sm8150_rpmh_clocks[] = { 423f5790382SStephen Boyd [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 424f5790382SStephen Boyd [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 425f5790382SStephen Boyd [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 426f5790382SStephen Boyd [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 427f5790382SStephen Boyd [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 428f5790382SStephen Boyd [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 429f5790382SStephen Boyd [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 430f5790382SStephen Boyd [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 431f5790382SStephen Boyd [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 432f5790382SStephen Boyd [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 433f5790382SStephen Boyd [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 434f5790382SStephen Boyd [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 4352243fd41SVinod Koul }; 4362243fd41SVinod Koul 4372243fd41SVinod Koul static const struct clk_rpmh_desc clk_rpmh_sm8150 = { 4382243fd41SVinod Koul .clks = sm8150_rpmh_clocks, 4392243fd41SVinod Koul .num_clks = ARRAY_SIZE(sm8150_rpmh_clocks), 4402243fd41SVinod Koul }; 4412243fd41SVinod Koul 442eee28109STaniya Das static struct clk_hw *sc7180_rpmh_clocks[] = { 443eee28109STaniya Das [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 444eee28109STaniya Das [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 445eee28109STaniya Das [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 446eee28109STaniya Das [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 447eee28109STaniya Das [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 448eee28109STaniya Das [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 449eee28109STaniya Das [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 450eee28109STaniya Das [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 451eee28109STaniya Das [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 452eee28109STaniya Das [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 453bcd63d22STaniya Das [RPMH_IPA_CLK] = &sdm845_ipa.hw, 454eee28109STaniya Das }; 455eee28109STaniya Das 456eee28109STaniya Das static const struct clk_rpmh_desc clk_rpmh_sc7180 = { 457eee28109STaniya Das .clks = sc7180_rpmh_clocks, 458eee28109STaniya Das .num_clks = ARRAY_SIZE(sc7180_rpmh_clocks), 459eee28109STaniya Das }; 460eee28109STaniya Das 4618a1f7fb1SBjorn Andersson static struct clk_hw *sc8180x_rpmh_clocks[] = { 4628a1f7fb1SBjorn Andersson [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 4638a1f7fb1SBjorn Andersson [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 4648a1f7fb1SBjorn Andersson [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 4658a1f7fb1SBjorn Andersson [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 4668a1f7fb1SBjorn Andersson [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 4678a1f7fb1SBjorn Andersson [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 4688a1f7fb1SBjorn Andersson [RPMH_RF_CLK1] = &sc8180x_rf_clk1.hw, 4698a1f7fb1SBjorn Andersson [RPMH_RF_CLK1_A] = &sc8180x_rf_clk1_ao.hw, 4708a1f7fb1SBjorn Andersson [RPMH_RF_CLK2] = &sc8180x_rf_clk2.hw, 4718a1f7fb1SBjorn Andersson [RPMH_RF_CLK2_A] = &sc8180x_rf_clk2_ao.hw, 4728a1f7fb1SBjorn Andersson [RPMH_RF_CLK3] = &sc8180x_rf_clk3.hw, 4738a1f7fb1SBjorn Andersson [RPMH_RF_CLK3_A] = &sc8180x_rf_clk3_ao.hw, 4748a1f7fb1SBjorn Andersson }; 4758a1f7fb1SBjorn Andersson 4768a1f7fb1SBjorn Andersson static const struct clk_rpmh_desc clk_rpmh_sc8180x = { 4778a1f7fb1SBjorn Andersson .clks = sc8180x_rpmh_clocks, 4788a1f7fb1SBjorn Andersson .num_clks = ARRAY_SIZE(sc8180x_rpmh_clocks), 4798a1f7fb1SBjorn Andersson }; 4808a1f7fb1SBjorn Andersson 48129093b1aSTaniya Das DEFINE_CLK_RPMH_VRM(sm8250, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 2); 48229093b1aSTaniya Das 48329093b1aSTaniya Das static struct clk_hw *sm8250_rpmh_clocks[] = { 48429093b1aSTaniya Das [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 48529093b1aSTaniya Das [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 48629093b1aSTaniya Das [RPMH_LN_BB_CLK1] = &sm8250_ln_bb_clk1.hw, 48729093b1aSTaniya Das [RPMH_LN_BB_CLK1_A] = &sm8250_ln_bb_clk1_ao.hw, 48829093b1aSTaniya Das [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 48929093b1aSTaniya Das [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 49029093b1aSTaniya Das [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, 49129093b1aSTaniya Das [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, 49229093b1aSTaniya Das [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 49329093b1aSTaniya Das [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 49429093b1aSTaniya Das [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 49529093b1aSTaniya Das [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 49629093b1aSTaniya Das }; 49729093b1aSTaniya Das 49829093b1aSTaniya Das static const struct clk_rpmh_desc clk_rpmh_sm8250 = { 49929093b1aSTaniya Das .clks = sm8250_rpmh_clocks, 50029093b1aSTaniya Das .num_clks = ARRAY_SIZE(sm8250_rpmh_clocks), 50129093b1aSTaniya Das }; 50229093b1aSTaniya Das 503f7b36cc1SVinod Koul DEFINE_CLK_RPMH_VRM(sm8350, div_clk1, div_clk1_ao, "divclka1", 2); 504f7b36cc1SVinod Koul DEFINE_CLK_RPMH_VRM(sm8350, rf_clk4, rf_clk4_ao, "rfclka4", 1); 505f7b36cc1SVinod Koul DEFINE_CLK_RPMH_VRM(sm8350, rf_clk5, rf_clk5_ao, "rfclka5", 1); 506f7b36cc1SVinod Koul DEFINE_CLK_RPMH_BCM(sm8350, pka, "PKA0"); 507f7b36cc1SVinod Koul DEFINE_CLK_RPMH_BCM(sm8350, hwkm, "HK0"); 508afacfbbeSManivannan Sadhasivam 509f7b36cc1SVinod Koul static struct clk_hw *sm8350_rpmh_clocks[] = { 510afacfbbeSManivannan Sadhasivam [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 511afacfbbeSManivannan Sadhasivam [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 512f7b36cc1SVinod Koul [RPMH_DIV_CLK1] = &sm8350_div_clk1.hw, 513f7b36cc1SVinod Koul [RPMH_DIV_CLK1_A] = &sm8350_div_clk1_ao.hw, 514f7b36cc1SVinod Koul [RPMH_LN_BB_CLK1] = &sm8250_ln_bb_clk1.hw, 515f7b36cc1SVinod Koul [RPMH_LN_BB_CLK1_A] = &sm8250_ln_bb_clk1_ao.hw, 516f7b36cc1SVinod Koul [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 517f7b36cc1SVinod Koul [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 518f7b36cc1SVinod Koul [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 519f7b36cc1SVinod Koul [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 520f7b36cc1SVinod Koul [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 521f7b36cc1SVinod Koul [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 522f7b36cc1SVinod Koul [RPMH_RF_CLK4] = &sm8350_rf_clk4.hw, 523f7b36cc1SVinod Koul [RPMH_RF_CLK4_A] = &sm8350_rf_clk4_ao.hw, 524f7b36cc1SVinod Koul [RPMH_RF_CLK5] = &sm8350_rf_clk5.hw, 525f7b36cc1SVinod Koul [RPMH_RF_CLK5_A] = &sm8350_rf_clk5_ao.hw, 526f7b36cc1SVinod Koul [RPMH_IPA_CLK] = &sdm845_ipa.hw, 527f7b36cc1SVinod Koul [RPMH_PKA_CLK] = &sm8350_pka.hw, 528f7b36cc1SVinod Koul [RPMH_HWKM_CLK] = &sm8350_hwkm.hw, 529afacfbbeSManivannan Sadhasivam }; 530afacfbbeSManivannan Sadhasivam 531f7b36cc1SVinod Koul static const struct clk_rpmh_desc clk_rpmh_sm8350 = { 532f7b36cc1SVinod Koul .clks = sm8350_rpmh_clocks, 533f7b36cc1SVinod Koul .num_clks = ARRAY_SIZE(sm8350_rpmh_clocks), 534afacfbbeSManivannan Sadhasivam }; 535afacfbbeSManivannan Sadhasivam 536809b4828SBjorn Andersson DEFINE_CLK_RPMH_VRM(sc8280xp, ln_bb_clk3, ln_bb_clk3_ao, "lnbclka3", 2); 537809b4828SBjorn Andersson 538809b4828SBjorn Andersson static struct clk_hw *sc8280xp_rpmh_clocks[] = { 539809b4828SBjorn Andersson [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, 540809b4828SBjorn Andersson [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, 541809b4828SBjorn Andersson [RPMH_LN_BB_CLK3] = &sc8280xp_ln_bb_clk3.hw, 542809b4828SBjorn Andersson [RPMH_LN_BB_CLK3_A] = &sc8280xp_ln_bb_clk3_ao.hw, 543809b4828SBjorn Andersson [RPMH_IPA_CLK] = &sdm845_ipa.hw, 544809b4828SBjorn Andersson [RPMH_PKA_CLK] = &sm8350_pka.hw, 545809b4828SBjorn Andersson [RPMH_HWKM_CLK] = &sm8350_hwkm.hw, 546809b4828SBjorn Andersson }; 547809b4828SBjorn Andersson 548809b4828SBjorn Andersson static const struct clk_rpmh_desc clk_rpmh_sc8280xp = { 549809b4828SBjorn Andersson .clks = sc8280xp_rpmh_clocks, 550809b4828SBjorn Andersson .num_clks = ARRAY_SIZE(sc8280xp_rpmh_clocks), 551809b4828SBjorn Andersson }; 552809b4828SBjorn Andersson 553c9b86db2STaniya Das /* Resource name must match resource id present in cmd-db */ 554c9b86db2STaniya Das DEFINE_CLK_RPMH_ARC(sc7280, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 4); 555c9b86db2STaniya Das 556ab5d3179SVinod Koul DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 4); 557ab5d3179SVinod Koul DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 4); 558ab5d3179SVinod Koul 559ab5d3179SVinod Koul static struct clk_hw *sm8450_rpmh_clocks[] = { 560ab5d3179SVinod Koul [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw, 561ab5d3179SVinod Koul [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw, 562ab5d3179SVinod Koul [RPMH_LN_BB_CLK1] = &sm8450_ln_bb_clk1.hw, 563ab5d3179SVinod Koul [RPMH_LN_BB_CLK1_A] = &sm8450_ln_bb_clk1_ao.hw, 564ab5d3179SVinod Koul [RPMH_LN_BB_CLK2] = &sm8450_ln_bb_clk2.hw, 565ab5d3179SVinod Koul [RPMH_LN_BB_CLK2_A] = &sm8450_ln_bb_clk2_ao.hw, 566ab5d3179SVinod Koul [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 567ab5d3179SVinod Koul [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 568ab5d3179SVinod Koul [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 569ab5d3179SVinod Koul [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 570ab5d3179SVinod Koul [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 571ab5d3179SVinod Koul [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 572ab5d3179SVinod Koul [RPMH_RF_CLK4] = &sm8350_rf_clk4.hw, 573ab5d3179SVinod Koul [RPMH_RF_CLK4_A] = &sm8350_rf_clk4_ao.hw, 574ab5d3179SVinod Koul [RPMH_IPA_CLK] = &sdm845_ipa.hw, 575ab5d3179SVinod Koul }; 576ab5d3179SVinod Koul 577ab5d3179SVinod Koul static const struct clk_rpmh_desc clk_rpmh_sm8450 = { 578ab5d3179SVinod Koul .clks = sm8450_rpmh_clocks, 579ab5d3179SVinod Koul .num_clks = ARRAY_SIZE(sm8450_rpmh_clocks), 580ab5d3179SVinod Koul }; 581ab5d3179SVinod Koul 582fff2b9a6STaniya Das static struct clk_hw *sc7280_rpmh_clocks[] = { 583c9b86db2STaniya Das [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw, 584c9b86db2STaniya Das [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw, 585fff2b9a6STaniya Das [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, 586fff2b9a6STaniya Das [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, 587fff2b9a6STaniya Das [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 588fff2b9a6STaniya Das [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 589fff2b9a6STaniya Das [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 590fff2b9a6STaniya Das [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 591fff2b9a6STaniya Das [RPMH_RF_CLK4] = &sm8350_rf_clk4.hw, 592fff2b9a6STaniya Das [RPMH_RF_CLK4_A] = &sm8350_rf_clk4_ao.hw, 593fff2b9a6STaniya Das [RPMH_IPA_CLK] = &sdm845_ipa.hw, 594fff2b9a6STaniya Das [RPMH_PKA_CLK] = &sm8350_pka.hw, 595fff2b9a6STaniya Das [RPMH_HWKM_CLK] = &sm8350_hwkm.hw, 596fff2b9a6STaniya Das }; 597fff2b9a6STaniya Das 598fff2b9a6STaniya Das static const struct clk_rpmh_desc clk_rpmh_sc7280 = { 599fff2b9a6STaniya Das .clks = sc7280_rpmh_clocks, 600fff2b9a6STaniya Das .num_clks = ARRAY_SIZE(sc7280_rpmh_clocks), 601fff2b9a6STaniya Das }; 602fff2b9a6STaniya Das 603be5b605dSKonrad Dybcio DEFINE_CLK_RPMH_VRM(sm6350, ln_bb_clk2, ln_bb_clk2_ao, "lnbclkg2", 4); 604be5b605dSKonrad Dybcio DEFINE_CLK_RPMH_VRM(sm6350, ln_bb_clk3, ln_bb_clk3_ao, "lnbclkg3", 4); 605be5b605dSKonrad Dybcio DEFINE_CLK_RPMH_ARC(sm6350, qlink, qlink_ao, "qphy.lvl", 0x1, 4); 606be5b605dSKonrad Dybcio 607be5b605dSKonrad Dybcio static struct clk_hw *sm6350_rpmh_clocks[] = { 608be5b605dSKonrad Dybcio [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw, 609be5b605dSKonrad Dybcio [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw, 610be5b605dSKonrad Dybcio [RPMH_LN_BB_CLK2] = &sm6350_ln_bb_clk2.hw, 611be5b605dSKonrad Dybcio [RPMH_LN_BB_CLK2_A] = &sm6350_ln_bb_clk2_ao.hw, 612be5b605dSKonrad Dybcio [RPMH_LN_BB_CLK3] = &sm6350_ln_bb_clk3.hw, 613be5b605dSKonrad Dybcio [RPMH_LN_BB_CLK3_A] = &sm6350_ln_bb_clk3_ao.hw, 614be5b605dSKonrad Dybcio [RPMH_QLINK_CLK] = &sm6350_qlink.hw, 615be5b605dSKonrad Dybcio [RPMH_QLINK_CLK_A] = &sm6350_qlink_ao.hw, 616be5b605dSKonrad Dybcio }; 617be5b605dSKonrad Dybcio 618be5b605dSKonrad Dybcio static const struct clk_rpmh_desc clk_rpmh_sm6350 = { 619be5b605dSKonrad Dybcio .clks = sm6350_rpmh_clocks, 620be5b605dSKonrad Dybcio .num_clks = ARRAY_SIZE(sm6350_rpmh_clocks), 621be5b605dSKonrad Dybcio }; 622be5b605dSKonrad Dybcio 62340affbf8SVamsi krishna Lanka DEFINE_CLK_RPMH_VRM(sdx65, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 4); 62440affbf8SVamsi krishna Lanka 62540affbf8SVamsi krishna Lanka static struct clk_hw *sdx65_rpmh_clocks[] = { 62640affbf8SVamsi krishna Lanka [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw, 62740affbf8SVamsi krishna Lanka [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw, 62840affbf8SVamsi krishna Lanka [RPMH_LN_BB_CLK1] = &sdx65_ln_bb_clk1.hw, 62940affbf8SVamsi krishna Lanka [RPMH_LN_BB_CLK1_A] = &sdx65_ln_bb_clk1_ao.hw, 63040affbf8SVamsi krishna Lanka [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, 63140affbf8SVamsi krishna Lanka [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, 63240affbf8SVamsi krishna Lanka [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, 63340affbf8SVamsi krishna Lanka [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, 63440affbf8SVamsi krishna Lanka [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, 63540affbf8SVamsi krishna Lanka [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, 63640affbf8SVamsi krishna Lanka [RPMH_RF_CLK4] = &sm8350_rf_clk4.hw, 63740affbf8SVamsi krishna Lanka [RPMH_RF_CLK4_A] = &sm8350_rf_clk4_ao.hw, 63840affbf8SVamsi krishna Lanka [RPMH_IPA_CLK] = &sdm845_ipa.hw, 63940affbf8SVamsi krishna Lanka [RPMH_QPIC_CLK] = &sdx55_qpic_clk.hw, 64040affbf8SVamsi krishna Lanka }; 64140affbf8SVamsi krishna Lanka 64240affbf8SVamsi krishna Lanka static const struct clk_rpmh_desc clk_rpmh_sdx65 = { 64340affbf8SVamsi krishna Lanka .clks = sdx65_rpmh_clocks, 64440affbf8SVamsi krishna Lanka .num_clks = ARRAY_SIZE(sdx65_rpmh_clocks), 64540affbf8SVamsi krishna Lanka }; 64640affbf8SVamsi krishna Lanka 6479c7e4702STaniya Das static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, 6489c7e4702STaniya Das void *data) 6499c7e4702STaniya Das { 6509c7e4702STaniya Das struct clk_rpmh_desc *rpmh = data; 6519c7e4702STaniya Das unsigned int idx = clkspec->args[0]; 6529c7e4702STaniya Das 6539c7e4702STaniya Das if (idx >= rpmh->num_clks) { 6549c7e4702STaniya Das pr_err("%s: invalid index %u\n", __func__, idx); 6559c7e4702STaniya Das return ERR_PTR(-EINVAL); 6569c7e4702STaniya Das } 6579c7e4702STaniya Das 6589c7e4702STaniya Das return rpmh->clks[idx]; 6599c7e4702STaniya Das } 6609c7e4702STaniya Das 6619c7e4702STaniya Das static int clk_rpmh_probe(struct platform_device *pdev) 6629c7e4702STaniya Das { 6639c7e4702STaniya Das struct clk_hw **hw_clks; 6649c7e4702STaniya Das struct clk_rpmh *rpmh_clk; 6659c7e4702STaniya Das const struct clk_rpmh_desc *desc; 6669c7e4702STaniya Das int ret, i; 6679c7e4702STaniya Das 6689c7e4702STaniya Das desc = of_device_get_match_data(&pdev->dev); 6699c7e4702STaniya Das if (!desc) 6709c7e4702STaniya Das return -ENODEV; 6719c7e4702STaniya Das 6729c7e4702STaniya Das hw_clks = desc->clks; 6739c7e4702STaniya Das 6749c7e4702STaniya Das for (i = 0; i < desc->num_clks; i++) { 675924e2d01STaniya Das const char *name; 6769c7e4702STaniya Das u32 res_addr; 67704053f4dSDavid Dai size_t aux_data_len; 67804053f4dSDavid Dai const struct bcm_db *data; 6799c7e4702STaniya Das 680924e2d01STaniya Das if (!hw_clks[i]) 681924e2d01STaniya Das continue; 682924e2d01STaniya Das 683924e2d01STaniya Das name = hw_clks[i]->init->name; 684924e2d01STaniya Das 6859c7e4702STaniya Das rpmh_clk = to_clk_rpmh(hw_clks[i]); 6869c7e4702STaniya Das res_addr = cmd_db_read_addr(rpmh_clk->res_name); 6879c7e4702STaniya Das if (!res_addr) { 6889c7e4702STaniya Das dev_err(&pdev->dev, "missing RPMh resource address for %s\n", 6899c7e4702STaniya Das rpmh_clk->res_name); 6909c7e4702STaniya Das return -ENODEV; 6919c7e4702STaniya Das } 69204053f4dSDavid Dai 69304053f4dSDavid Dai data = cmd_db_read_aux_data(rpmh_clk->res_name, &aux_data_len); 69404053f4dSDavid Dai if (IS_ERR(data)) { 69504053f4dSDavid Dai ret = PTR_ERR(data); 69604053f4dSDavid Dai dev_err(&pdev->dev, 69704053f4dSDavid Dai "error reading RPMh aux data for %s (%d)\n", 69804053f4dSDavid Dai rpmh_clk->res_name, ret); 69904053f4dSDavid Dai return ret; 70004053f4dSDavid Dai } 70104053f4dSDavid Dai 70204053f4dSDavid Dai /* Convert unit from Khz to Hz */ 70304053f4dSDavid Dai if (aux_data_len == sizeof(*data)) 70404053f4dSDavid Dai rpmh_clk->unit = le32_to_cpu(data->unit) * 1000ULL; 70504053f4dSDavid Dai 7069c7e4702STaniya Das rpmh_clk->res_addr += res_addr; 7079c7e4702STaniya Das rpmh_clk->dev = &pdev->dev; 7089c7e4702STaniya Das 7099c7e4702STaniya Das ret = devm_clk_hw_register(&pdev->dev, hw_clks[i]); 7109c7e4702STaniya Das if (ret) { 711af884a5dSStephen Boyd dev_err(&pdev->dev, "failed to register %s\n", name); 7129c7e4702STaniya Das return ret; 7139c7e4702STaniya Das } 7149c7e4702STaniya Das } 7159c7e4702STaniya Das 7169c7e4702STaniya Das /* typecast to silence compiler warning */ 7179c7e4702STaniya Das ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_rpmh_hw_get, 7189c7e4702STaniya Das (void *)desc); 7199c7e4702STaniya Das if (ret) { 7209c7e4702STaniya Das dev_err(&pdev->dev, "Failed to add clock provider\n"); 7219c7e4702STaniya Das return ret; 7229c7e4702STaniya Das } 7239c7e4702STaniya Das 7249c7e4702STaniya Das dev_dbg(&pdev->dev, "Registered RPMh clocks\n"); 7259c7e4702STaniya Das 7269c7e4702STaniya Das return 0; 7279c7e4702STaniya Das } 7289c7e4702STaniya Das 7299c7e4702STaniya Das static const struct of_device_id clk_rpmh_match_table[] = { 7309e0cda72SBjorn Andersson { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180}, 7318a1f7fb1SBjorn Andersson { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, 732809b4828SBjorn Andersson { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, 7339c7e4702STaniya Das { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, 734*2ded040cSRichard Acayan { .compatible = "qcom,sdm670-rpmh-clk", .data = &clk_rpmh_sdm670}, 735afacfbbeSManivannan Sadhasivam { .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55}, 73640affbf8SVamsi krishna Lanka { .compatible = "qcom,sdx65-rpmh-clk", .data = &clk_rpmh_sdx65}, 737be5b605dSKonrad Dybcio { .compatible = "qcom,sm6350-rpmh-clk", .data = &clk_rpmh_sm6350}, 7382243fd41SVinod Koul { .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150}, 73929093b1aSTaniya Das { .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250}, 740f7b36cc1SVinod Koul { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350}, 741ab5d3179SVinod Koul { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, 742fff2b9a6STaniya Das { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, 7439c7e4702STaniya Das { } 7449c7e4702STaniya Das }; 7459c7e4702STaniya Das MODULE_DEVICE_TABLE(of, clk_rpmh_match_table); 7469c7e4702STaniya Das 7479c7e4702STaniya Das static struct platform_driver clk_rpmh_driver = { 7489c7e4702STaniya Das .probe = clk_rpmh_probe, 7499c7e4702STaniya Das .driver = { 7509c7e4702STaniya Das .name = "clk-rpmh", 7519c7e4702STaniya Das .of_match_table = clk_rpmh_match_table, 7529c7e4702STaniya Das }, 7539c7e4702STaniya Das }; 7549c7e4702STaniya Das 7559c7e4702STaniya Das static int __init clk_rpmh_init(void) 7569c7e4702STaniya Das { 7579c7e4702STaniya Das return platform_driver_register(&clk_rpmh_driver); 7589c7e4702STaniya Das } 759b418bab4SAmit Kucheria core_initcall(clk_rpmh_init); 7609c7e4702STaniya Das 7619c7e4702STaniya Das static void __exit clk_rpmh_exit(void) 7629c7e4702STaniya Das { 7639c7e4702STaniya Das platform_driver_unregister(&clk_rpmh_driver); 7649c7e4702STaniya Das } 7659c7e4702STaniya Das module_exit(clk_rpmh_exit); 7669c7e4702STaniya Das 7679c7e4702STaniya Das MODULE_DESCRIPTION("QCOM RPMh Clock Driver"); 7689c7e4702STaniya Das MODULE_LICENSE("GPL v2"); 769