1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2015, 2018, The Linux Foundation. All rights reserved. */ 3 4 #ifndef __QCOM_CLK_ALPHA_PLL_H__ 5 #define __QCOM_CLK_ALPHA_PLL_H__ 6 7 #include <linux/clk-provider.h> 8 #include "clk-regmap.h" 9 10 /* Alpha PLL types */ 11 enum { 12 CLK_ALPHA_PLL_TYPE_DEFAULT, 13 CLK_ALPHA_PLL_TYPE_HUAYRA, 14 CLK_ALPHA_PLL_TYPE_BRAMMO, 15 CLK_ALPHA_PLL_TYPE_FABIA, 16 CLK_ALPHA_PLL_TYPE_TRION, 17 CLK_ALPHA_PLL_TYPE_LUCID = CLK_ALPHA_PLL_TYPE_TRION, 18 CLK_ALPHA_PLL_TYPE_AGERA, 19 CLK_ALPHA_PLL_TYPE_ZONDA, 20 CLK_ALPHA_PLL_TYPE_LUCID_EVO, 21 CLK_ALPHA_PLL_TYPE_LUCID_OLE, 22 CLK_ALPHA_PLL_TYPE_RIVIAN_EVO, 23 CLK_ALPHA_PLL_TYPE_DEFAULT_EVO, 24 CLK_ALPHA_PLL_TYPE_BRAMMO_EVO, 25 CLK_ALPHA_PLL_TYPE_MAX, 26 }; 27 28 enum { 29 PLL_OFF_L_VAL, 30 PLL_OFF_CAL_L_VAL, 31 PLL_OFF_ALPHA_VAL, 32 PLL_OFF_ALPHA_VAL_U, 33 PLL_OFF_USER_CTL, 34 PLL_OFF_USER_CTL_U, 35 PLL_OFF_USER_CTL_U1, 36 PLL_OFF_CONFIG_CTL, 37 PLL_OFF_CONFIG_CTL_U, 38 PLL_OFF_CONFIG_CTL_U1, 39 PLL_OFF_TEST_CTL, 40 PLL_OFF_TEST_CTL_U, 41 PLL_OFF_TEST_CTL_U1, 42 PLL_OFF_TEST_CTL_U2, 43 PLL_OFF_STATE, 44 PLL_OFF_STATUS, 45 PLL_OFF_OPMODE, 46 PLL_OFF_FRAC, 47 PLL_OFF_CAL_VAL, 48 PLL_OFF_MAX_REGS 49 }; 50 51 extern const u8 clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_MAX][PLL_OFF_MAX_REGS]; 52 53 struct pll_vco { 54 unsigned long min_freq; 55 unsigned long max_freq; 56 u32 val; 57 }; 58 59 #define VCO(a, b, c) { \ 60 .val = a,\ 61 .min_freq = b,\ 62 .max_freq = c,\ 63 } 64 65 /** 66 * struct clk_alpha_pll - phase locked loop (PLL) 67 * @offset: base address of registers 68 * @vco_table: array of VCO settings 69 * @regs: alpha pll register map (see @clk_alpha_pll_regs) 70 * @clkr: regmap clock handle 71 */ 72 struct clk_alpha_pll { 73 u32 offset; 74 const u8 *regs; 75 76 const struct pll_vco *vco_table; 77 size_t num_vco; 78 #define SUPPORTS_OFFLINE_REQ BIT(0) 79 #define SUPPORTS_FSM_MODE BIT(2) 80 #define SUPPORTS_DYNAMIC_UPDATE BIT(3) 81 #define SUPPORTS_FSM_LEGACY_MODE BIT(4) 82 u8 flags; 83 84 struct clk_regmap clkr; 85 }; 86 87 /** 88 * struct clk_alpha_pll_postdiv - phase locked loop (PLL) post-divider 89 * @offset: base address of registers 90 * @regs: alpha pll register map (see @clk_alpha_pll_regs) 91 * @width: width of post-divider 92 * @post_div_shift: shift to differentiate between odd & even post-divider 93 * @post_div_table: table with PLL odd and even post-divider settings 94 * @num_post_div: Number of PLL post-divider settings 95 * 96 * @clkr: regmap clock handle 97 */ 98 struct clk_alpha_pll_postdiv { 99 u32 offset; 100 u8 width; 101 const u8 *regs; 102 103 struct clk_regmap clkr; 104 int post_div_shift; 105 const struct clk_div_table *post_div_table; 106 size_t num_post_div; 107 }; 108 109 struct alpha_pll_config { 110 u32 l; 111 u32 alpha; 112 u32 alpha_hi; 113 u32 config_ctl_val; 114 u32 config_ctl_hi_val; 115 u32 config_ctl_hi1_val; 116 u32 user_ctl_val; 117 u32 user_ctl_hi_val; 118 u32 user_ctl_hi1_val; 119 u32 test_ctl_val; 120 u32 test_ctl_hi_val; 121 u32 test_ctl_hi1_val; 122 u32 main_output_mask; 123 u32 aux_output_mask; 124 u32 aux2_output_mask; 125 u32 early_output_mask; 126 u32 alpha_en_mask; 127 u32 alpha_mode_mask; 128 u32 pre_div_val; 129 u32 pre_div_mask; 130 u32 post_div_val; 131 u32 post_div_mask; 132 u32 vco_val; 133 u32 vco_mask; 134 }; 135 136 extern const struct clk_ops clk_alpha_pll_ops; 137 extern const struct clk_ops clk_alpha_pll_fixed_ops; 138 extern const struct clk_ops clk_alpha_pll_hwfsm_ops; 139 extern const struct clk_ops clk_alpha_pll_postdiv_ops; 140 extern const struct clk_ops clk_alpha_pll_huayra_ops; 141 extern const struct clk_ops clk_alpha_pll_postdiv_ro_ops; 142 143 extern const struct clk_ops clk_alpha_pll_fabia_ops; 144 extern const struct clk_ops clk_alpha_pll_fixed_fabia_ops; 145 extern const struct clk_ops clk_alpha_pll_postdiv_fabia_ops; 146 147 extern const struct clk_ops clk_alpha_pll_trion_ops; 148 extern const struct clk_ops clk_alpha_pll_fixed_trion_ops; 149 extern const struct clk_ops clk_alpha_pll_postdiv_trion_ops; 150 151 extern const struct clk_ops clk_alpha_pll_lucid_ops; 152 #define clk_alpha_pll_fixed_lucid_ops clk_alpha_pll_fixed_trion_ops 153 extern const struct clk_ops clk_alpha_pll_postdiv_lucid_ops; 154 extern const struct clk_ops clk_alpha_pll_agera_ops; 155 156 extern const struct clk_ops clk_alpha_pll_lucid_5lpe_ops; 157 extern const struct clk_ops clk_alpha_pll_fixed_lucid_5lpe_ops; 158 extern const struct clk_ops clk_alpha_pll_postdiv_lucid_5lpe_ops; 159 160 extern const struct clk_ops clk_alpha_pll_zonda_ops; 161 #define clk_alpha_pll_postdiv_zonda_ops clk_alpha_pll_postdiv_fabia_ops 162 163 extern const struct clk_ops clk_alpha_pll_lucid_evo_ops; 164 extern const struct clk_ops clk_alpha_pll_reset_lucid_evo_ops; 165 extern const struct clk_ops clk_alpha_pll_fixed_lucid_evo_ops; 166 #define clk_alpha_pll_fixed_lucid_ole_ops clk_alpha_pll_fixed_lucid_evo_ops 167 extern const struct clk_ops clk_alpha_pll_postdiv_lucid_evo_ops; 168 #define clk_alpha_pll_postdiv_lucid_ole_ops clk_alpha_pll_postdiv_lucid_evo_ops 169 170 extern const struct clk_ops clk_alpha_pll_rivian_evo_ops; 171 #define clk_alpha_pll_postdiv_rivian_evo_ops clk_alpha_pll_postdiv_fabia_ops 172 173 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 174 const struct alpha_pll_config *config); 175 void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 176 const struct alpha_pll_config *config); 177 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 178 const struct alpha_pll_config *config); 179 void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 180 const struct alpha_pll_config *config); 181 #define clk_lucid_pll_configure(pll, regmap, config) \ 182 clk_trion_pll_configure(pll, regmap, config) 183 184 void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 185 const struct alpha_pll_config *config); 186 void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 187 const struct alpha_pll_config *config); 188 void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 189 const struct alpha_pll_config *config); 190 191 #endif 192