115d09e83STaniya Das // SPDX-License-Identifier: GPL-2.0-only 215d09e83STaniya Das /* 315d09e83STaniya Das * Copyright (c) 2020, The Linux Foundation. All rights reserved. 415d09e83STaniya Das */ 515d09e83STaniya Das 615d09e83STaniya Das #include <linux/clk-provider.h> 715d09e83STaniya Das #include <linux/err.h> 815d09e83STaniya Das #include <linux/module.h> 915d09e83STaniya Das #include <linux/of.h> 1015d09e83STaniya Das #include <linux/of_device.h> 1115d09e83STaniya Das #include <linux/pm_clock.h> 1215d09e83STaniya Das #include <linux/pm_runtime.h> 1315d09e83STaniya Das #include <linux/regmap.h> 1415d09e83STaniya Das 1515d09e83STaniya Das #include <dt-bindings/clock/qcom,camcc-sc7180.h> 1615d09e83STaniya Das 1715d09e83STaniya Das #include "clk-alpha-pll.h" 1815d09e83STaniya Das #include "clk-branch.h" 1915d09e83STaniya Das #include "clk-rcg.h" 2015d09e83STaniya Das #include "clk-regmap.h" 2115d09e83STaniya Das #include "common.h" 2215d09e83STaniya Das #include "gdsc.h" 2315d09e83STaniya Das #include "reset.h" 2415d09e83STaniya Das 2515d09e83STaniya Das enum { 2615d09e83STaniya Das P_BI_TCXO, 2715d09e83STaniya Das P_CAM_CC_PLL0_OUT_EVEN, 2815d09e83STaniya Das P_CAM_CC_PLL1_OUT_EVEN, 2915d09e83STaniya Das P_CAM_CC_PLL2_OUT_AUX, 3015d09e83STaniya Das P_CAM_CC_PLL2_OUT_EARLY, 3115d09e83STaniya Das P_CAM_CC_PLL3_OUT_MAIN, 3215d09e83STaniya Das }; 3315d09e83STaniya Das 3415d09e83STaniya Das static const struct pll_vco agera_vco[] = { 3515d09e83STaniya Das { 600000000, 3300000000UL, 0 }, 3615d09e83STaniya Das }; 3715d09e83STaniya Das 3815d09e83STaniya Das static const struct pll_vco fabia_vco[] = { 3915d09e83STaniya Das { 249600000, 2000000000UL, 0 }, 4015d09e83STaniya Das }; 4115d09e83STaniya Das 4215d09e83STaniya Das /* 600MHz configuration */ 4315d09e83STaniya Das static const struct alpha_pll_config cam_cc_pll0_config = { 4415d09e83STaniya Das .l = 0x1f, 4515d09e83STaniya Das .alpha = 0x4000, 4615d09e83STaniya Das .config_ctl_val = 0x20485699, 4715d09e83STaniya Das .config_ctl_hi_val = 0x00002067, 4815d09e83STaniya Das .test_ctl_val = 0x40000000, 4915d09e83STaniya Das .user_ctl_hi_val = 0x00004805, 5015d09e83STaniya Das .user_ctl_val = 0x00000001, 5115d09e83STaniya Das }; 5215d09e83STaniya Das 5315d09e83STaniya Das static struct clk_alpha_pll cam_cc_pll0 = { 5415d09e83STaniya Das .offset = 0x0, 5515d09e83STaniya Das .vco_table = fabia_vco, 5615d09e83STaniya Das .num_vco = ARRAY_SIZE(fabia_vco), 5715d09e83STaniya Das .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 5815d09e83STaniya Das .clkr = { 5915d09e83STaniya Das .hw.init = &(struct clk_init_data){ 6015d09e83STaniya Das .name = "cam_cc_pll0", 6115d09e83STaniya Das .parent_data = &(const struct clk_parent_data){ 6215d09e83STaniya Das .fw_name = "bi_tcxo", 6315d09e83STaniya Das }, 6415d09e83STaniya Das .num_parents = 1, 6515d09e83STaniya Das .ops = &clk_alpha_pll_fabia_ops, 6615d09e83STaniya Das }, 6715d09e83STaniya Das }, 6815d09e83STaniya Das }; 6915d09e83STaniya Das 7015d09e83STaniya Das /* 860MHz configuration */ 7115d09e83STaniya Das static const struct alpha_pll_config cam_cc_pll1_config = { 7215d09e83STaniya Das .l = 0x2a, 7315d09e83STaniya Das .alpha = 0x1555, 7415d09e83STaniya Das .config_ctl_val = 0x20485699, 7515d09e83STaniya Das .config_ctl_hi_val = 0x00002067, 7615d09e83STaniya Das .test_ctl_val = 0x40000000, 7715d09e83STaniya Das .user_ctl_hi_val = 0x00004805, 7815d09e83STaniya Das }; 7915d09e83STaniya Das 8015d09e83STaniya Das static struct clk_alpha_pll cam_cc_pll1 = { 8115d09e83STaniya Das .offset = 0x1000, 8215d09e83STaniya Das .vco_table = fabia_vco, 8315d09e83STaniya Das .num_vco = ARRAY_SIZE(fabia_vco), 8415d09e83STaniya Das .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 8515d09e83STaniya Das .clkr = { 8615d09e83STaniya Das .hw.init = &(struct clk_init_data){ 8715d09e83STaniya Das .name = "cam_cc_pll1", 8815d09e83STaniya Das .parent_data = &(const struct clk_parent_data){ 8915d09e83STaniya Das .fw_name = "bi_tcxo", 9015d09e83STaniya Das }, 9115d09e83STaniya Das .num_parents = 1, 9215d09e83STaniya Das .ops = &clk_alpha_pll_fabia_ops, 9315d09e83STaniya Das }, 9415d09e83STaniya Das }, 9515d09e83STaniya Das }; 9615d09e83STaniya Das 9715d09e83STaniya Das /* 1920MHz configuration */ 9815d09e83STaniya Das static const struct alpha_pll_config cam_cc_pll2_config = { 9915d09e83STaniya Das .l = 0x64, 10015d09e83STaniya Das .config_ctl_val = 0x20000800, 10115d09e83STaniya Das .config_ctl_hi_val = 0x400003D2, 10215d09e83STaniya Das .test_ctl_val = 0x04000400, 10315d09e83STaniya Das .test_ctl_hi_val = 0x00004000, 10415d09e83STaniya Das .user_ctl_val = 0x0000030F, 10515d09e83STaniya Das }; 10615d09e83STaniya Das 10715d09e83STaniya Das static struct clk_alpha_pll cam_cc_pll2 = { 10815d09e83STaniya Das .offset = 0x2000, 10915d09e83STaniya Das .vco_table = agera_vco, 11015d09e83STaniya Das .num_vco = ARRAY_SIZE(agera_vco), 11115d09e83STaniya Das .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_AGERA], 11215d09e83STaniya Das .clkr = { 11315d09e83STaniya Das .hw.init = &(struct clk_init_data){ 11415d09e83STaniya Das .name = "cam_cc_pll2", 11515d09e83STaniya Das .parent_data = &(const struct clk_parent_data){ 11615d09e83STaniya Das .fw_name = "bi_tcxo", 11715d09e83STaniya Das }, 11815d09e83STaniya Das .num_parents = 1, 11915d09e83STaniya Das .ops = &clk_alpha_pll_agera_ops, 12015d09e83STaniya Das }, 12115d09e83STaniya Das }, 12215d09e83STaniya Das }; 12315d09e83STaniya Das 12415d09e83STaniya Das static struct clk_fixed_factor cam_cc_pll2_out_early = { 12515d09e83STaniya Das .mult = 1, 12615d09e83STaniya Das .div = 2, 12715d09e83STaniya Das .hw.init = &(struct clk_init_data){ 12815d09e83STaniya Das .name = "cam_cc_pll2_out_early", 129*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 130*f1697f36SDmitry Baryshkov &cam_cc_pll2.clkr.hw, 131*f1697f36SDmitry Baryshkov }, 13215d09e83STaniya Das .num_parents = 1, 13315d09e83STaniya Das .ops = &clk_fixed_factor_ops, 13415d09e83STaniya Das }, 13515d09e83STaniya Das }; 13615d09e83STaniya Das 13715d09e83STaniya Das static const struct clk_div_table post_div_table_cam_cc_pll2_out_aux[] = { 13815d09e83STaniya Das { 0x3, 4 }, 13915d09e83STaniya Das { } 14015d09e83STaniya Das }; 14115d09e83STaniya Das 14215d09e83STaniya Das static struct clk_alpha_pll_postdiv cam_cc_pll2_out_aux = { 14315d09e83STaniya Das .offset = 0x2000, 14415d09e83STaniya Das .post_div_shift = 8, 14515d09e83STaniya Das .post_div_table = post_div_table_cam_cc_pll2_out_aux, 14615d09e83STaniya Das .num_post_div = ARRAY_SIZE(post_div_table_cam_cc_pll2_out_aux), 14715d09e83STaniya Das .width = 2, 14815d09e83STaniya Das .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_AGERA], 14915d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 15015d09e83STaniya Das .name = "cam_cc_pll2_out_aux", 151*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 152*f1697f36SDmitry Baryshkov &cam_cc_pll2.clkr.hw, 15315d09e83STaniya Das }, 15415d09e83STaniya Das .num_parents = 1, 15515d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 15615d09e83STaniya Das .ops = &clk_alpha_pll_postdiv_ops, 15715d09e83STaniya Das }, 15815d09e83STaniya Das }; 15915d09e83STaniya Das 16015d09e83STaniya Das /* 1080MHz configuration */ 16115d09e83STaniya Das static const struct alpha_pll_config cam_cc_pll3_config = { 16215d09e83STaniya Das .l = 0x38, 16315d09e83STaniya Das .alpha = 0x4000, 16415d09e83STaniya Das .config_ctl_val = 0x20485699, 16515d09e83STaniya Das .config_ctl_hi_val = 0x00002067, 16615d09e83STaniya Das .test_ctl_val = 0x40000000, 16715d09e83STaniya Das .user_ctl_hi_val = 0x00004805, 16815d09e83STaniya Das }; 16915d09e83STaniya Das 17015d09e83STaniya Das static struct clk_alpha_pll cam_cc_pll3 = { 17115d09e83STaniya Das .offset = 0x3000, 17215d09e83STaniya Das .vco_table = fabia_vco, 17315d09e83STaniya Das .num_vco = ARRAY_SIZE(fabia_vco), 17415d09e83STaniya Das .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], 17515d09e83STaniya Das .clkr = { 17615d09e83STaniya Das .hw.init = &(struct clk_init_data){ 17715d09e83STaniya Das .name = "cam_cc_pll3", 17815d09e83STaniya Das .parent_data = &(const struct clk_parent_data){ 17915d09e83STaniya Das .fw_name = "bi_tcxo", 18015d09e83STaniya Das }, 18115d09e83STaniya Das .num_parents = 1, 18215d09e83STaniya Das .ops = &clk_alpha_pll_fabia_ops, 18315d09e83STaniya Das }, 18415d09e83STaniya Das }, 18515d09e83STaniya Das }; 18615d09e83STaniya Das 18715d09e83STaniya Das static const struct parent_map cam_cc_parent_map_0[] = { 18815d09e83STaniya Das { P_BI_TCXO, 0 }, 18915d09e83STaniya Das { P_CAM_CC_PLL1_OUT_EVEN, 2 }, 19015d09e83STaniya Das { P_CAM_CC_PLL0_OUT_EVEN, 6 }, 19115d09e83STaniya Das }; 19215d09e83STaniya Das 19315d09e83STaniya Das static const struct clk_parent_data cam_cc_parent_data_0[] = { 19415d09e83STaniya Das { .fw_name = "bi_tcxo" }, 19515d09e83STaniya Das { .hw = &cam_cc_pll1.clkr.hw }, 19615d09e83STaniya Das { .hw = &cam_cc_pll0.clkr.hw }, 19715d09e83STaniya Das }; 19815d09e83STaniya Das 19915d09e83STaniya Das static const struct parent_map cam_cc_parent_map_1[] = { 20015d09e83STaniya Das { P_BI_TCXO, 0 }, 20115d09e83STaniya Das { P_CAM_CC_PLL2_OUT_AUX, 1 }, 20215d09e83STaniya Das }; 20315d09e83STaniya Das 20415d09e83STaniya Das static const struct clk_parent_data cam_cc_parent_data_1[] = { 20515d09e83STaniya Das { .fw_name = "bi_tcxo" }, 20615d09e83STaniya Das { .hw = &cam_cc_pll2_out_aux.clkr.hw }, 20715d09e83STaniya Das }; 20815d09e83STaniya Das 20915d09e83STaniya Das static const struct parent_map cam_cc_parent_map_2[] = { 21015d09e83STaniya Das { P_BI_TCXO, 0 }, 21115d09e83STaniya Das { P_CAM_CC_PLL2_OUT_EARLY, 4 }, 21215d09e83STaniya Das { P_CAM_CC_PLL3_OUT_MAIN, 5 }, 21315d09e83STaniya Das { P_CAM_CC_PLL0_OUT_EVEN, 6 }, 21415d09e83STaniya Das }; 21515d09e83STaniya Das 21615d09e83STaniya Das static const struct clk_parent_data cam_cc_parent_data_2[] = { 21715d09e83STaniya Das { .fw_name = "bi_tcxo" }, 21815d09e83STaniya Das { .hw = &cam_cc_pll2_out_early.hw }, 21915d09e83STaniya Das { .hw = &cam_cc_pll3.clkr.hw }, 22015d09e83STaniya Das { .hw = &cam_cc_pll0.clkr.hw }, 22115d09e83STaniya Das }; 22215d09e83STaniya Das 22315d09e83STaniya Das static const struct parent_map cam_cc_parent_map_3[] = { 22415d09e83STaniya Das { P_BI_TCXO, 0 }, 22515d09e83STaniya Das { P_CAM_CC_PLL1_OUT_EVEN, 2 }, 22615d09e83STaniya Das { P_CAM_CC_PLL2_OUT_EARLY, 4 }, 22715d09e83STaniya Das { P_CAM_CC_PLL3_OUT_MAIN, 5 }, 22815d09e83STaniya Das { P_CAM_CC_PLL0_OUT_EVEN, 6 }, 22915d09e83STaniya Das }; 23015d09e83STaniya Das 23115d09e83STaniya Das static const struct clk_parent_data cam_cc_parent_data_3[] = { 23215d09e83STaniya Das { .fw_name = "bi_tcxo" }, 23315d09e83STaniya Das { .hw = &cam_cc_pll1.clkr.hw }, 23415d09e83STaniya Das { .hw = &cam_cc_pll2_out_early.hw }, 23515d09e83STaniya Das { .hw = &cam_cc_pll3.clkr.hw }, 23615d09e83STaniya Das { .hw = &cam_cc_pll0.clkr.hw }, 23715d09e83STaniya Das }; 23815d09e83STaniya Das 23915d09e83STaniya Das static const struct parent_map cam_cc_parent_map_4[] = { 24015d09e83STaniya Das { P_BI_TCXO, 0 }, 24115d09e83STaniya Das { P_CAM_CC_PLL3_OUT_MAIN, 5 }, 24215d09e83STaniya Das { P_CAM_CC_PLL0_OUT_EVEN, 6 }, 24315d09e83STaniya Das }; 24415d09e83STaniya Das 24515d09e83STaniya Das static const struct clk_parent_data cam_cc_parent_data_4[] = { 24615d09e83STaniya Das { .fw_name = "bi_tcxo" }, 24715d09e83STaniya Das { .hw = &cam_cc_pll3.clkr.hw }, 24815d09e83STaniya Das { .hw = &cam_cc_pll0.clkr.hw }, 24915d09e83STaniya Das }; 25015d09e83STaniya Das 25115d09e83STaniya Das static const struct parent_map cam_cc_parent_map_5[] = { 25215d09e83STaniya Das { P_BI_TCXO, 0 }, 25315d09e83STaniya Das { P_CAM_CC_PLL0_OUT_EVEN, 6 }, 25415d09e83STaniya Das }; 25515d09e83STaniya Das 25615d09e83STaniya Das static const struct clk_parent_data cam_cc_parent_data_5[] = { 25715d09e83STaniya Das { .fw_name = "bi_tcxo" }, 25815d09e83STaniya Das { .hw = &cam_cc_pll0.clkr.hw }, 25915d09e83STaniya Das }; 26015d09e83STaniya Das 26115d09e83STaniya Das static const struct parent_map cam_cc_parent_map_6[] = { 26215d09e83STaniya Das { P_BI_TCXO, 0 }, 26315d09e83STaniya Das { P_CAM_CC_PLL1_OUT_EVEN, 2 }, 26415d09e83STaniya Das { P_CAM_CC_PLL3_OUT_MAIN, 5 }, 26515d09e83STaniya Das { P_CAM_CC_PLL0_OUT_EVEN, 6 }, 26615d09e83STaniya Das }; 26715d09e83STaniya Das 26815d09e83STaniya Das static const struct clk_parent_data cam_cc_parent_data_6[] = { 26915d09e83STaniya Das { .fw_name = "bi_tcxo" }, 27015d09e83STaniya Das { .hw = &cam_cc_pll1.clkr.hw }, 27115d09e83STaniya Das { .hw = &cam_cc_pll3.clkr.hw }, 27215d09e83STaniya Das { .hw = &cam_cc_pll0.clkr.hw }, 27315d09e83STaniya Das }; 27415d09e83STaniya Das 27515d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_bps_clk_src[] = { 27615d09e83STaniya Das F(200000000, P_CAM_CC_PLL0_OUT_EVEN, 3, 0, 0), 27715d09e83STaniya Das F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0), 27815d09e83STaniya Das F(432000000, P_CAM_CC_PLL3_OUT_MAIN, 2.5, 0, 0), 27915d09e83STaniya Das F(480000000, P_CAM_CC_PLL2_OUT_EARLY, 2, 0, 0), 28015d09e83STaniya Das F(600000000, P_CAM_CC_PLL0_OUT_EVEN, 1, 0, 0), 28115d09e83STaniya Das { } 28215d09e83STaniya Das }; 28315d09e83STaniya Das 28415d09e83STaniya Das static struct clk_rcg2 cam_cc_bps_clk_src = { 28515d09e83STaniya Das .cmd_rcgr = 0x6010, 28615d09e83STaniya Das .mnd_width = 0, 28715d09e83STaniya Das .hid_width = 5, 28815d09e83STaniya Das .parent_map = cam_cc_parent_map_2, 28915d09e83STaniya Das .freq_tbl = ftbl_cam_cc_bps_clk_src, 29015d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 29115d09e83STaniya Das .name = "cam_cc_bps_clk_src", 29215d09e83STaniya Das .parent_data = cam_cc_parent_data_2, 2933ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_2), 294e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 29515d09e83STaniya Das }, 29615d09e83STaniya Das }; 29715d09e83STaniya Das 29815d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_cci_0_clk_src[] = { 29915d09e83STaniya Das F(37500000, P_CAM_CC_PLL0_OUT_EVEN, 16, 0, 0), 30015d09e83STaniya Das F(50000000, P_CAM_CC_PLL0_OUT_EVEN, 12, 0, 0), 30115d09e83STaniya Das F(100000000, P_CAM_CC_PLL0_OUT_EVEN, 6, 0, 0), 30215d09e83STaniya Das { } 30315d09e83STaniya Das }; 30415d09e83STaniya Das 30515d09e83STaniya Das static struct clk_rcg2 cam_cc_cci_0_clk_src = { 30615d09e83STaniya Das .cmd_rcgr = 0xb0d8, 30715d09e83STaniya Das .mnd_width = 8, 30815d09e83STaniya Das .hid_width = 5, 30915d09e83STaniya Das .parent_map = cam_cc_parent_map_5, 31015d09e83STaniya Das .freq_tbl = ftbl_cam_cc_cci_0_clk_src, 31115d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 31215d09e83STaniya Das .name = "cam_cc_cci_0_clk_src", 31315d09e83STaniya Das .parent_data = cam_cc_parent_data_5, 3143ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_5), 315e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 31615d09e83STaniya Das }, 31715d09e83STaniya Das }; 31815d09e83STaniya Das 31915d09e83STaniya Das static struct clk_rcg2 cam_cc_cci_1_clk_src = { 32015d09e83STaniya Das .cmd_rcgr = 0xb14c, 32115d09e83STaniya Das .mnd_width = 8, 32215d09e83STaniya Das .hid_width = 5, 32315d09e83STaniya Das .parent_map = cam_cc_parent_map_5, 32415d09e83STaniya Das .freq_tbl = ftbl_cam_cc_cci_0_clk_src, 32515d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 32615d09e83STaniya Das .name = "cam_cc_cci_1_clk_src", 32715d09e83STaniya Das .parent_data = cam_cc_parent_data_5, 3283ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_5), 329e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 33015d09e83STaniya Das }, 33115d09e83STaniya Das }; 33215d09e83STaniya Das 33315d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_cphy_rx_clk_src[] = { 33415d09e83STaniya Das F(150000000, P_CAM_CC_PLL0_OUT_EVEN, 4, 0, 0), 33515d09e83STaniya Das F(270000000, P_CAM_CC_PLL3_OUT_MAIN, 4, 0, 0), 33615d09e83STaniya Das F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0), 33715d09e83STaniya Das { } 33815d09e83STaniya Das }; 33915d09e83STaniya Das 34015d09e83STaniya Das static struct clk_rcg2 cam_cc_cphy_rx_clk_src = { 34115d09e83STaniya Das .cmd_rcgr = 0x9064, 34215d09e83STaniya Das .mnd_width = 0, 34315d09e83STaniya Das .hid_width = 5, 34415d09e83STaniya Das .parent_map = cam_cc_parent_map_3, 34515d09e83STaniya Das .freq_tbl = ftbl_cam_cc_cphy_rx_clk_src, 34615d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 34715d09e83STaniya Das .name = "cam_cc_cphy_rx_clk_src", 34815d09e83STaniya Das .parent_data = cam_cc_parent_data_3, 3493ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_3), 350e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 35115d09e83STaniya Das }, 35215d09e83STaniya Das }; 35315d09e83STaniya Das 35415d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_csi0phytimer_clk_src[] = { 35515d09e83STaniya Das F(300000000, P_CAM_CC_PLL0_OUT_EVEN, 2, 0, 0), 35615d09e83STaniya Das { } 35715d09e83STaniya Das }; 35815d09e83STaniya Das 35915d09e83STaniya Das static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = { 36015d09e83STaniya Das .cmd_rcgr = 0x5004, 36115d09e83STaniya Das .mnd_width = 0, 36215d09e83STaniya Das .hid_width = 5, 36315d09e83STaniya Das .parent_map = cam_cc_parent_map_0, 36415d09e83STaniya Das .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, 36515d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 36615d09e83STaniya Das .name = "cam_cc_csi0phytimer_clk_src", 36715d09e83STaniya Das .parent_data = cam_cc_parent_data_0, 3683ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_0), 369e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 37015d09e83STaniya Das }, 37115d09e83STaniya Das }; 37215d09e83STaniya Das 37315d09e83STaniya Das static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = { 37415d09e83STaniya Das .cmd_rcgr = 0x5028, 37515d09e83STaniya Das .mnd_width = 0, 37615d09e83STaniya Das .hid_width = 5, 37715d09e83STaniya Das .parent_map = cam_cc_parent_map_0, 37815d09e83STaniya Das .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, 37915d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 38015d09e83STaniya Das .name = "cam_cc_csi1phytimer_clk_src", 38115d09e83STaniya Das .parent_data = cam_cc_parent_data_0, 3823ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_0), 383e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 38415d09e83STaniya Das }, 38515d09e83STaniya Das }; 38615d09e83STaniya Das 38715d09e83STaniya Das static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = { 38815d09e83STaniya Das .cmd_rcgr = 0x504c, 38915d09e83STaniya Das .mnd_width = 0, 39015d09e83STaniya Das .hid_width = 5, 39115d09e83STaniya Das .parent_map = cam_cc_parent_map_0, 39215d09e83STaniya Das .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, 39315d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 39415d09e83STaniya Das .name = "cam_cc_csi2phytimer_clk_src", 39515d09e83STaniya Das .parent_data = cam_cc_parent_data_0, 3963ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_0), 397e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 39815d09e83STaniya Das }, 39915d09e83STaniya Das }; 40015d09e83STaniya Das 40115d09e83STaniya Das static struct clk_rcg2 cam_cc_csi3phytimer_clk_src = { 40215d09e83STaniya Das .cmd_rcgr = 0x5070, 40315d09e83STaniya Das .mnd_width = 0, 40415d09e83STaniya Das .hid_width = 5, 40515d09e83STaniya Das .parent_map = cam_cc_parent_map_0, 40615d09e83STaniya Das .freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src, 40715d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 40815d09e83STaniya Das .name = "cam_cc_csi3phytimer_clk_src", 40915d09e83STaniya Das .parent_data = cam_cc_parent_data_0, 4103ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_0), 411e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 41215d09e83STaniya Das }, 41315d09e83STaniya Das }; 41415d09e83STaniya Das 41515d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_fast_ahb_clk_src[] = { 41615d09e83STaniya Das F(100000000, P_CAM_CC_PLL0_OUT_EVEN, 6, 0, 0), 41715d09e83STaniya Das F(200000000, P_CAM_CC_PLL0_OUT_EVEN, 3, 0, 0), 41815d09e83STaniya Das F(300000000, P_CAM_CC_PLL0_OUT_EVEN, 2, 0, 0), 41915d09e83STaniya Das F(404000000, P_CAM_CC_PLL1_OUT_EVEN, 2, 0, 0), 42015d09e83STaniya Das { } 42115d09e83STaniya Das }; 42215d09e83STaniya Das 42315d09e83STaniya Das static struct clk_rcg2 cam_cc_fast_ahb_clk_src = { 42415d09e83STaniya Das .cmd_rcgr = 0x603c, 42515d09e83STaniya Das .mnd_width = 0, 42615d09e83STaniya Das .hid_width = 5, 42715d09e83STaniya Das .parent_map = cam_cc_parent_map_0, 42815d09e83STaniya Das .freq_tbl = ftbl_cam_cc_fast_ahb_clk_src, 42915d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 43015d09e83STaniya Das .name = "cam_cc_fast_ahb_clk_src", 43115d09e83STaniya Das .parent_data = cam_cc_parent_data_0, 4323ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_0), 433e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 43415d09e83STaniya Das }, 43515d09e83STaniya Das }; 43615d09e83STaniya Das 43715d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_icp_clk_src[] = { 43815d09e83STaniya Das F(240000000, P_CAM_CC_PLL0_OUT_EVEN, 2.5, 0, 0), 43915d09e83STaniya Das F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0), 44015d09e83STaniya Das F(432000000, P_CAM_CC_PLL3_OUT_MAIN, 2.5, 0, 0), 44115d09e83STaniya Das F(480000000, P_CAM_CC_PLL2_OUT_EARLY, 2, 0, 0), 44215d09e83STaniya Das F(600000000, P_CAM_CC_PLL0_OUT_EVEN, 1, 0, 0), 44315d09e83STaniya Das { } 44415d09e83STaniya Das }; 44515d09e83STaniya Das 44615d09e83STaniya Das static struct clk_rcg2 cam_cc_icp_clk_src = { 44715d09e83STaniya Das .cmd_rcgr = 0xb088, 44815d09e83STaniya Das .mnd_width = 0, 44915d09e83STaniya Das .hid_width = 5, 45015d09e83STaniya Das .parent_map = cam_cc_parent_map_2, 45115d09e83STaniya Das .freq_tbl = ftbl_cam_cc_icp_clk_src, 45215d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 45315d09e83STaniya Das .name = "cam_cc_icp_clk_src", 45415d09e83STaniya Das .parent_data = cam_cc_parent_data_2, 4553ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_2), 456e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 45715d09e83STaniya Das }, 45815d09e83STaniya Das }; 45915d09e83STaniya Das 46015d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_ife_0_clk_src[] = { 46115d09e83STaniya Das F(240000000, P_CAM_CC_PLL0_OUT_EVEN, 2.5, 0, 0), 46215d09e83STaniya Das F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0), 46315d09e83STaniya Das F(432000000, P_CAM_CC_PLL3_OUT_MAIN, 2.5, 0, 0), 46415d09e83STaniya Das F(600000000, P_CAM_CC_PLL0_OUT_EVEN, 1, 0, 0), 46515d09e83STaniya Das { } 46615d09e83STaniya Das }; 46715d09e83STaniya Das 46815d09e83STaniya Das static struct clk_rcg2 cam_cc_ife_0_clk_src = { 46915d09e83STaniya Das .cmd_rcgr = 0x9010, 47015d09e83STaniya Das .mnd_width = 0, 47115d09e83STaniya Das .hid_width = 5, 47215d09e83STaniya Das .parent_map = cam_cc_parent_map_4, 47315d09e83STaniya Das .freq_tbl = ftbl_cam_cc_ife_0_clk_src, 47415d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 47515d09e83STaniya Das .name = "cam_cc_ife_0_clk_src", 47615d09e83STaniya Das .parent_data = cam_cc_parent_data_4, 4773ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_4), 478e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 47915d09e83STaniya Das }, 48015d09e83STaniya Das }; 48115d09e83STaniya Das 48215d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_ife_0_csid_clk_src[] = { 48315d09e83STaniya Das F(150000000, P_CAM_CC_PLL0_OUT_EVEN, 4, 0, 0), 48415d09e83STaniya Das F(270000000, P_CAM_CC_PLL3_OUT_MAIN, 4, 0, 0), 48515d09e83STaniya Das F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0), 48615d09e83STaniya Das F(480000000, P_CAM_CC_PLL2_OUT_EARLY, 2, 0, 0), 48715d09e83STaniya Das { } 48815d09e83STaniya Das }; 48915d09e83STaniya Das 49015d09e83STaniya Das static struct clk_rcg2 cam_cc_ife_0_csid_clk_src = { 49115d09e83STaniya Das .cmd_rcgr = 0x903c, 49215d09e83STaniya Das .mnd_width = 0, 49315d09e83STaniya Das .hid_width = 5, 49415d09e83STaniya Das .parent_map = cam_cc_parent_map_3, 49515d09e83STaniya Das .freq_tbl = ftbl_cam_cc_ife_0_csid_clk_src, 49615d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 49715d09e83STaniya Das .name = "cam_cc_ife_0_csid_clk_src", 49815d09e83STaniya Das .parent_data = cam_cc_parent_data_3, 4993ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_3), 500e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 50115d09e83STaniya Das }, 50215d09e83STaniya Das }; 50315d09e83STaniya Das 50415d09e83STaniya Das static struct clk_rcg2 cam_cc_ife_1_clk_src = { 50515d09e83STaniya Das .cmd_rcgr = 0xa010, 50615d09e83STaniya Das .mnd_width = 0, 50715d09e83STaniya Das .hid_width = 5, 50815d09e83STaniya Das .parent_map = cam_cc_parent_map_4, 50915d09e83STaniya Das .freq_tbl = ftbl_cam_cc_ife_0_clk_src, 51015d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 51115d09e83STaniya Das .name = "cam_cc_ife_1_clk_src", 51215d09e83STaniya Das .parent_data = cam_cc_parent_data_4, 5133ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_4), 514e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 51515d09e83STaniya Das }, 51615d09e83STaniya Das }; 51715d09e83STaniya Das 51815d09e83STaniya Das static struct clk_rcg2 cam_cc_ife_1_csid_clk_src = { 51915d09e83STaniya Das .cmd_rcgr = 0xa034, 52015d09e83STaniya Das .mnd_width = 0, 52115d09e83STaniya Das .hid_width = 5, 52215d09e83STaniya Das .parent_map = cam_cc_parent_map_3, 52315d09e83STaniya Das .freq_tbl = ftbl_cam_cc_ife_0_csid_clk_src, 52415d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 52515d09e83STaniya Das .name = "cam_cc_ife_1_csid_clk_src", 52615d09e83STaniya Das .parent_data = cam_cc_parent_data_3, 5273ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_3), 528e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 52915d09e83STaniya Das }, 53015d09e83STaniya Das }; 53115d09e83STaniya Das 53215d09e83STaniya Das static struct clk_rcg2 cam_cc_ife_lite_clk_src = { 53315d09e83STaniya Das .cmd_rcgr = 0xb004, 53415d09e83STaniya Das .mnd_width = 0, 53515d09e83STaniya Das .hid_width = 5, 53615d09e83STaniya Das .parent_map = cam_cc_parent_map_4, 53715d09e83STaniya Das .freq_tbl = ftbl_cam_cc_ife_0_clk_src, 53815d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 53915d09e83STaniya Das .name = "cam_cc_ife_lite_clk_src", 54015d09e83STaniya Das .parent_data = cam_cc_parent_data_4, 5413ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_4), 54215d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 543e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 54415d09e83STaniya Das }, 54515d09e83STaniya Das }; 54615d09e83STaniya Das 54715d09e83STaniya Das static struct clk_rcg2 cam_cc_ife_lite_csid_clk_src = { 54815d09e83STaniya Das .cmd_rcgr = 0xb024, 54915d09e83STaniya Das .mnd_width = 0, 55015d09e83STaniya Das .hid_width = 5, 55115d09e83STaniya Das .parent_map = cam_cc_parent_map_3, 55215d09e83STaniya Das .freq_tbl = ftbl_cam_cc_ife_0_csid_clk_src, 55315d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 55415d09e83STaniya Das .name = "cam_cc_ife_lite_csid_clk_src", 55515d09e83STaniya Das .parent_data = cam_cc_parent_data_3, 5563ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_3), 557e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 55815d09e83STaniya Das }, 55915d09e83STaniya Das }; 56015d09e83STaniya Das 56115d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_ipe_0_clk_src[] = { 56215d09e83STaniya Das F(240000000, P_CAM_CC_PLL0_OUT_EVEN, 2.5, 0, 0), 56315d09e83STaniya Das F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0), 56415d09e83STaniya Das F(432000000, P_CAM_CC_PLL3_OUT_MAIN, 2.5, 0, 0), 56515d09e83STaniya Das F(540000000, P_CAM_CC_PLL3_OUT_MAIN, 2, 0, 0), 56615d09e83STaniya Das F(600000000, P_CAM_CC_PLL0_OUT_EVEN, 1, 0, 0), 56715d09e83STaniya Das { } 56815d09e83STaniya Das }; 56915d09e83STaniya Das 57015d09e83STaniya Das static struct clk_rcg2 cam_cc_ipe_0_clk_src = { 57115d09e83STaniya Das .cmd_rcgr = 0x7010, 57215d09e83STaniya Das .mnd_width = 0, 57315d09e83STaniya Das .hid_width = 5, 57415d09e83STaniya Das .parent_map = cam_cc_parent_map_2, 57515d09e83STaniya Das .freq_tbl = ftbl_cam_cc_ipe_0_clk_src, 57615d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 57715d09e83STaniya Das .name = "cam_cc_ipe_0_clk_src", 57815d09e83STaniya Das .parent_data = cam_cc_parent_data_2, 5793ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_2), 580e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 58115d09e83STaniya Das }, 58215d09e83STaniya Das }; 58315d09e83STaniya Das 58415d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_jpeg_clk_src[] = { 58515d09e83STaniya Das F(66666667, P_CAM_CC_PLL0_OUT_EVEN, 9, 0, 0), 58615d09e83STaniya Das F(133333333, P_CAM_CC_PLL0_OUT_EVEN, 4.5, 0, 0), 58715d09e83STaniya Das F(216000000, P_CAM_CC_PLL3_OUT_MAIN, 5, 0, 0), 58815d09e83STaniya Das F(320000000, P_CAM_CC_PLL2_OUT_EARLY, 3, 0, 0), 58915d09e83STaniya Das F(600000000, P_CAM_CC_PLL0_OUT_EVEN, 1, 0, 0), 59015d09e83STaniya Das { } 59115d09e83STaniya Das }; 59215d09e83STaniya Das 59315d09e83STaniya Das static struct clk_rcg2 cam_cc_jpeg_clk_src = { 59415d09e83STaniya Das .cmd_rcgr = 0xb04c, 59515d09e83STaniya Das .mnd_width = 0, 59615d09e83STaniya Das .hid_width = 5, 59715d09e83STaniya Das .parent_map = cam_cc_parent_map_2, 59815d09e83STaniya Das .freq_tbl = ftbl_cam_cc_jpeg_clk_src, 59915d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 60015d09e83STaniya Das .name = "cam_cc_jpeg_clk_src", 60115d09e83STaniya Das .parent_data = cam_cc_parent_data_2, 6023ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_2), 603e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 60415d09e83STaniya Das }, 60515d09e83STaniya Das }; 60615d09e83STaniya Das 60715d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_lrme_clk_src[] = { 60815d09e83STaniya Das F(200000000, P_CAM_CC_PLL0_OUT_EVEN, 3, 0, 0), 60915d09e83STaniya Das F(216000000, P_CAM_CC_PLL3_OUT_MAIN, 5, 0, 0), 61015d09e83STaniya Das F(300000000, P_CAM_CC_PLL0_OUT_EVEN, 2, 0, 0), 61115d09e83STaniya Das F(404000000, P_CAM_CC_PLL1_OUT_EVEN, 2, 0, 0), 61215d09e83STaniya Das { } 61315d09e83STaniya Das }; 61415d09e83STaniya Das 61515d09e83STaniya Das static struct clk_rcg2 cam_cc_lrme_clk_src = { 61615d09e83STaniya Das .cmd_rcgr = 0xb0f8, 61715d09e83STaniya Das .mnd_width = 0, 61815d09e83STaniya Das .hid_width = 5, 61915d09e83STaniya Das .parent_map = cam_cc_parent_map_6, 62015d09e83STaniya Das .freq_tbl = ftbl_cam_cc_lrme_clk_src, 62115d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 62215d09e83STaniya Das .name = "cam_cc_lrme_clk_src", 62315d09e83STaniya Das .parent_data = cam_cc_parent_data_6, 6243ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_6), 625e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 62615d09e83STaniya Das }, 62715d09e83STaniya Das }; 62815d09e83STaniya Das 62915d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_mclk0_clk_src[] = { 63015d09e83STaniya Das F(19200000, P_BI_TCXO, 1, 0, 0), 63115d09e83STaniya Das F(24000000, P_CAM_CC_PLL2_OUT_AUX, 10, 1, 2), 63215d09e83STaniya Das F(64000000, P_CAM_CC_PLL2_OUT_AUX, 7.5, 0, 0), 63315d09e83STaniya Das { } 63415d09e83STaniya Das }; 63515d09e83STaniya Das 63615d09e83STaniya Das static struct clk_rcg2 cam_cc_mclk0_clk_src = { 63715d09e83STaniya Das .cmd_rcgr = 0x4004, 63815d09e83STaniya Das .mnd_width = 8, 63915d09e83STaniya Das .hid_width = 5, 64015d09e83STaniya Das .parent_map = cam_cc_parent_map_1, 64115d09e83STaniya Das .freq_tbl = ftbl_cam_cc_mclk0_clk_src, 64215d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 64315d09e83STaniya Das .name = "cam_cc_mclk0_clk_src", 64415d09e83STaniya Das .parent_data = cam_cc_parent_data_1, 6453ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_1), 646e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 64715d09e83STaniya Das }, 64815d09e83STaniya Das }; 64915d09e83STaniya Das 65015d09e83STaniya Das static struct clk_rcg2 cam_cc_mclk1_clk_src = { 65115d09e83STaniya Das .cmd_rcgr = 0x4024, 65215d09e83STaniya Das .mnd_width = 8, 65315d09e83STaniya Das .hid_width = 5, 65415d09e83STaniya Das .parent_map = cam_cc_parent_map_1, 65515d09e83STaniya Das .freq_tbl = ftbl_cam_cc_mclk0_clk_src, 65615d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 65715d09e83STaniya Das .name = "cam_cc_mclk1_clk_src", 65815d09e83STaniya Das .parent_data = cam_cc_parent_data_1, 6593ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_1), 660e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 66115d09e83STaniya Das }, 66215d09e83STaniya Das }; 66315d09e83STaniya Das 66415d09e83STaniya Das static struct clk_rcg2 cam_cc_mclk2_clk_src = { 66515d09e83STaniya Das .cmd_rcgr = 0x4044, 66615d09e83STaniya Das .mnd_width = 8, 66715d09e83STaniya Das .hid_width = 5, 66815d09e83STaniya Das .parent_map = cam_cc_parent_map_1, 66915d09e83STaniya Das .freq_tbl = ftbl_cam_cc_mclk0_clk_src, 67015d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 67115d09e83STaniya Das .name = "cam_cc_mclk2_clk_src", 67215d09e83STaniya Das .parent_data = cam_cc_parent_data_1, 6733ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_1), 674e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 67515d09e83STaniya Das }, 67615d09e83STaniya Das }; 67715d09e83STaniya Das 67815d09e83STaniya Das static struct clk_rcg2 cam_cc_mclk3_clk_src = { 67915d09e83STaniya Das .cmd_rcgr = 0x4064, 68015d09e83STaniya Das .mnd_width = 8, 68115d09e83STaniya Das .hid_width = 5, 68215d09e83STaniya Das .parent_map = cam_cc_parent_map_1, 68315d09e83STaniya Das .freq_tbl = ftbl_cam_cc_mclk0_clk_src, 68415d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 68515d09e83STaniya Das .name = "cam_cc_mclk3_clk_src", 68615d09e83STaniya Das .parent_data = cam_cc_parent_data_1, 6873ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_1), 688e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 68915d09e83STaniya Das }, 69015d09e83STaniya Das }; 69115d09e83STaniya Das 69215d09e83STaniya Das static struct clk_rcg2 cam_cc_mclk4_clk_src = { 69315d09e83STaniya Das .cmd_rcgr = 0x4084, 69415d09e83STaniya Das .mnd_width = 8, 69515d09e83STaniya Das .hid_width = 5, 69615d09e83STaniya Das .parent_map = cam_cc_parent_map_1, 69715d09e83STaniya Das .freq_tbl = ftbl_cam_cc_mclk0_clk_src, 69815d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 69915d09e83STaniya Das .name = "cam_cc_mclk4_clk_src", 70015d09e83STaniya Das .parent_data = cam_cc_parent_data_1, 7013ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_1), 702e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 70315d09e83STaniya Das }, 70415d09e83STaniya Das }; 70515d09e83STaniya Das 70615d09e83STaniya Das static const struct freq_tbl ftbl_cam_cc_slow_ahb_clk_src[] = { 70715d09e83STaniya Das F(80000000, P_CAM_CC_PLL0_OUT_EVEN, 7.5, 0, 0), 70815d09e83STaniya Das { } 70915d09e83STaniya Das }; 71015d09e83STaniya Das 71115d09e83STaniya Das static struct clk_rcg2 cam_cc_slow_ahb_clk_src = { 71215d09e83STaniya Das .cmd_rcgr = 0x6058, 71315d09e83STaniya Das .mnd_width = 0, 71415d09e83STaniya Das .hid_width = 5, 71515d09e83STaniya Das .parent_map = cam_cc_parent_map_0, 71615d09e83STaniya Das .freq_tbl = ftbl_cam_cc_slow_ahb_clk_src, 71715d09e83STaniya Das .clkr.hw.init = &(struct clk_init_data){ 71815d09e83STaniya Das .name = "cam_cc_slow_ahb_clk_src", 71915d09e83STaniya Das .parent_data = cam_cc_parent_data_0, 7203ca90171SDmitry Baryshkov .num_parents = ARRAY_SIZE(cam_cc_parent_data_0), 72115d09e83STaniya Das .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, 722e5c359f7STaniya Das .ops = &clk_rcg2_shared_ops, 72315d09e83STaniya Das }, 72415d09e83STaniya Das }; 72515d09e83STaniya Das 72615d09e83STaniya Das static struct clk_branch cam_cc_bps_ahb_clk = { 72715d09e83STaniya Das .halt_reg = 0x6070, 72815d09e83STaniya Das .halt_check = BRANCH_HALT, 72915d09e83STaniya Das .clkr = { 73015d09e83STaniya Das .enable_reg = 0x6070, 73115d09e83STaniya Das .enable_mask = BIT(0), 73215d09e83STaniya Das .hw.init = &(struct clk_init_data){ 73315d09e83STaniya Das .name = "cam_cc_bps_ahb_clk", 734*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 735*f1697f36SDmitry Baryshkov &cam_cc_slow_ahb_clk_src.clkr.hw, 73615d09e83STaniya Das }, 73715d09e83STaniya Das .num_parents = 1, 73815d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 73915d09e83STaniya Das .ops = &clk_branch2_ops, 74015d09e83STaniya Das }, 74115d09e83STaniya Das }, 74215d09e83STaniya Das }; 74315d09e83STaniya Das 74415d09e83STaniya Das static struct clk_branch cam_cc_bps_areg_clk = { 74515d09e83STaniya Das .halt_reg = 0x6054, 74615d09e83STaniya Das .halt_check = BRANCH_HALT, 74715d09e83STaniya Das .clkr = { 74815d09e83STaniya Das .enable_reg = 0x6054, 74915d09e83STaniya Das .enable_mask = BIT(0), 75015d09e83STaniya Das .hw.init = &(struct clk_init_data){ 75115d09e83STaniya Das .name = "cam_cc_bps_areg_clk", 752*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 753*f1697f36SDmitry Baryshkov &cam_cc_fast_ahb_clk_src.clkr.hw, 75415d09e83STaniya Das }, 75515d09e83STaniya Das .num_parents = 1, 75615d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 75715d09e83STaniya Das .ops = &clk_branch2_ops, 75815d09e83STaniya Das }, 75915d09e83STaniya Das }, 76015d09e83STaniya Das }; 76115d09e83STaniya Das 76215d09e83STaniya Das static struct clk_branch cam_cc_bps_axi_clk = { 76315d09e83STaniya Das .halt_reg = 0x6038, 76415d09e83STaniya Das .halt_check = BRANCH_HALT, 76515d09e83STaniya Das .clkr = { 76615d09e83STaniya Das .enable_reg = 0x6038, 76715d09e83STaniya Das .enable_mask = BIT(0), 76815d09e83STaniya Das .hw.init = &(struct clk_init_data){ 76915d09e83STaniya Das .name = "cam_cc_bps_axi_clk", 77015d09e83STaniya Das .ops = &clk_branch2_ops, 77115d09e83STaniya Das }, 77215d09e83STaniya Das }, 77315d09e83STaniya Das }; 77415d09e83STaniya Das 77515d09e83STaniya Das static struct clk_branch cam_cc_bps_clk = { 77615d09e83STaniya Das .halt_reg = 0x6028, 77715d09e83STaniya Das .halt_check = BRANCH_HALT, 77815d09e83STaniya Das .clkr = { 77915d09e83STaniya Das .enable_reg = 0x6028, 78015d09e83STaniya Das .enable_mask = BIT(0), 78115d09e83STaniya Das .hw.init = &(struct clk_init_data){ 78215d09e83STaniya Das .name = "cam_cc_bps_clk", 783*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 784*f1697f36SDmitry Baryshkov &cam_cc_bps_clk_src.clkr.hw, 78515d09e83STaniya Das }, 78615d09e83STaniya Das .num_parents = 1, 78715d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 78815d09e83STaniya Das .ops = &clk_branch2_ops, 78915d09e83STaniya Das }, 79015d09e83STaniya Das }, 79115d09e83STaniya Das }; 79215d09e83STaniya Das 79315d09e83STaniya Das static struct clk_branch cam_cc_camnoc_axi_clk = { 79415d09e83STaniya Das .halt_reg = 0xb124, 79515d09e83STaniya Das .halt_check = BRANCH_HALT, 79615d09e83STaniya Das .clkr = { 79715d09e83STaniya Das .enable_reg = 0xb124, 79815d09e83STaniya Das .enable_mask = BIT(0), 79915d09e83STaniya Das .hw.init = &(struct clk_init_data){ 80015d09e83STaniya Das .name = "cam_cc_camnoc_axi_clk", 80115d09e83STaniya Das .ops = &clk_branch2_ops, 80215d09e83STaniya Das }, 80315d09e83STaniya Das }, 80415d09e83STaniya Das }; 80515d09e83STaniya Das 80615d09e83STaniya Das static struct clk_branch cam_cc_cci_0_clk = { 80715d09e83STaniya Das .halt_reg = 0xb0f0, 80815d09e83STaniya Das .halt_check = BRANCH_HALT, 80915d09e83STaniya Das .clkr = { 81015d09e83STaniya Das .enable_reg = 0xb0f0, 81115d09e83STaniya Das .enable_mask = BIT(0), 81215d09e83STaniya Das .hw.init = &(struct clk_init_data){ 81315d09e83STaniya Das .name = "cam_cc_cci_0_clk", 814*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 815*f1697f36SDmitry Baryshkov &cam_cc_cci_0_clk_src.clkr.hw, 81615d09e83STaniya Das }, 81715d09e83STaniya Das .num_parents = 1, 81815d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 81915d09e83STaniya Das .ops = &clk_branch2_ops, 82015d09e83STaniya Das }, 82115d09e83STaniya Das }, 82215d09e83STaniya Das }; 82315d09e83STaniya Das 82415d09e83STaniya Das static struct clk_branch cam_cc_cci_1_clk = { 82515d09e83STaniya Das .halt_reg = 0xb164, 82615d09e83STaniya Das .halt_check = BRANCH_HALT, 82715d09e83STaniya Das .clkr = { 82815d09e83STaniya Das .enable_reg = 0xb164, 82915d09e83STaniya Das .enable_mask = BIT(0), 83015d09e83STaniya Das .hw.init = &(struct clk_init_data){ 83115d09e83STaniya Das .name = "cam_cc_cci_1_clk", 832*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 833*f1697f36SDmitry Baryshkov &cam_cc_cci_1_clk_src.clkr.hw, 83415d09e83STaniya Das }, 83515d09e83STaniya Das .num_parents = 1, 83615d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 83715d09e83STaniya Das .ops = &clk_branch2_ops, 83815d09e83STaniya Das }, 83915d09e83STaniya Das }, 84015d09e83STaniya Das }; 84115d09e83STaniya Das 84215d09e83STaniya Das static struct clk_branch cam_cc_core_ahb_clk = { 84315d09e83STaniya Das .halt_reg = 0xb144, 84415d09e83STaniya Das .halt_check = BRANCH_HALT_DELAY, 84515d09e83STaniya Das .clkr = { 84615d09e83STaniya Das .enable_reg = 0xb144, 84715d09e83STaniya Das .enable_mask = BIT(0), 84815d09e83STaniya Das .hw.init = &(struct clk_init_data){ 84915d09e83STaniya Das .name = "cam_cc_core_ahb_clk", 850*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 851*f1697f36SDmitry Baryshkov &cam_cc_slow_ahb_clk_src.clkr.hw, 85215d09e83STaniya Das }, 85315d09e83STaniya Das .num_parents = 1, 85415d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 85515d09e83STaniya Das .ops = &clk_branch2_ops, 85615d09e83STaniya Das }, 85715d09e83STaniya Das }, 85815d09e83STaniya Das }; 85915d09e83STaniya Das 86015d09e83STaniya Das static struct clk_branch cam_cc_cpas_ahb_clk = { 86115d09e83STaniya Das .halt_reg = 0xb11c, 86215d09e83STaniya Das .halt_check = BRANCH_HALT, 86315d09e83STaniya Das .clkr = { 86415d09e83STaniya Das .enable_reg = 0xb11c, 86515d09e83STaniya Das .enable_mask = BIT(0), 86615d09e83STaniya Das .hw.init = &(struct clk_init_data){ 86715d09e83STaniya Das .name = "cam_cc_cpas_ahb_clk", 868*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 869*f1697f36SDmitry Baryshkov &cam_cc_slow_ahb_clk_src.clkr.hw, 87015d09e83STaniya Das }, 87115d09e83STaniya Das .num_parents = 1, 87215d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 87315d09e83STaniya Das .ops = &clk_branch2_ops, 87415d09e83STaniya Das }, 87515d09e83STaniya Das }, 87615d09e83STaniya Das }; 87715d09e83STaniya Das 87815d09e83STaniya Das static struct clk_branch cam_cc_csi0phytimer_clk = { 87915d09e83STaniya Das .halt_reg = 0x501c, 88015d09e83STaniya Das .halt_check = BRANCH_HALT, 88115d09e83STaniya Das .clkr = { 88215d09e83STaniya Das .enable_reg = 0x501c, 88315d09e83STaniya Das .enable_mask = BIT(0), 88415d09e83STaniya Das .hw.init = &(struct clk_init_data){ 88515d09e83STaniya Das .name = "cam_cc_csi0phytimer_clk", 886*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 887*f1697f36SDmitry Baryshkov &cam_cc_csi0phytimer_clk_src.clkr.hw, 88815d09e83STaniya Das }, 88915d09e83STaniya Das .num_parents = 1, 89015d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 89115d09e83STaniya Das .ops = &clk_branch2_ops, 89215d09e83STaniya Das }, 89315d09e83STaniya Das }, 89415d09e83STaniya Das }; 89515d09e83STaniya Das 89615d09e83STaniya Das static struct clk_branch cam_cc_csi1phytimer_clk = { 89715d09e83STaniya Das .halt_reg = 0x5040, 89815d09e83STaniya Das .halt_check = BRANCH_HALT, 89915d09e83STaniya Das .clkr = { 90015d09e83STaniya Das .enable_reg = 0x5040, 90115d09e83STaniya Das .enable_mask = BIT(0), 90215d09e83STaniya Das .hw.init = &(struct clk_init_data){ 90315d09e83STaniya Das .name = "cam_cc_csi1phytimer_clk", 904*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 905*f1697f36SDmitry Baryshkov &cam_cc_csi1phytimer_clk_src.clkr.hw, 90615d09e83STaniya Das }, 90715d09e83STaniya Das .num_parents = 1, 90815d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 90915d09e83STaniya Das .ops = &clk_branch2_ops, 91015d09e83STaniya Das }, 91115d09e83STaniya Das }, 91215d09e83STaniya Das }; 91315d09e83STaniya Das 91415d09e83STaniya Das static struct clk_branch cam_cc_csi2phytimer_clk = { 91515d09e83STaniya Das .halt_reg = 0x5064, 91615d09e83STaniya Das .halt_check = BRANCH_HALT, 91715d09e83STaniya Das .clkr = { 91815d09e83STaniya Das .enable_reg = 0x5064, 91915d09e83STaniya Das .enable_mask = BIT(0), 92015d09e83STaniya Das .hw.init = &(struct clk_init_data){ 92115d09e83STaniya Das .name = "cam_cc_csi2phytimer_clk", 922*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 923*f1697f36SDmitry Baryshkov &cam_cc_csi2phytimer_clk_src.clkr.hw, 92415d09e83STaniya Das }, 92515d09e83STaniya Das .num_parents = 1, 92615d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 92715d09e83STaniya Das .ops = &clk_branch2_ops, 92815d09e83STaniya Das }, 92915d09e83STaniya Das }, 93015d09e83STaniya Das }; 93115d09e83STaniya Das 93215d09e83STaniya Das static struct clk_branch cam_cc_csi3phytimer_clk = { 93315d09e83STaniya Das .halt_reg = 0x5088, 93415d09e83STaniya Das .halt_check = BRANCH_HALT, 93515d09e83STaniya Das .clkr = { 93615d09e83STaniya Das .enable_reg = 0x5088, 93715d09e83STaniya Das .enable_mask = BIT(0), 93815d09e83STaniya Das .hw.init = &(struct clk_init_data){ 93915d09e83STaniya Das .name = "cam_cc_csi3phytimer_clk", 940*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 941*f1697f36SDmitry Baryshkov &cam_cc_csi3phytimer_clk_src.clkr.hw, 94215d09e83STaniya Das }, 94315d09e83STaniya Das .num_parents = 1, 94415d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 94515d09e83STaniya Das .ops = &clk_branch2_ops, 94615d09e83STaniya Das }, 94715d09e83STaniya Das }, 94815d09e83STaniya Das }; 94915d09e83STaniya Das 95015d09e83STaniya Das static struct clk_branch cam_cc_csiphy0_clk = { 95115d09e83STaniya Das .halt_reg = 0x5020, 95215d09e83STaniya Das .halt_check = BRANCH_HALT, 95315d09e83STaniya Das .clkr = { 95415d09e83STaniya Das .enable_reg = 0x5020, 95515d09e83STaniya Das .enable_mask = BIT(0), 95615d09e83STaniya Das .hw.init = &(struct clk_init_data){ 95715d09e83STaniya Das .name = "cam_cc_csiphy0_clk", 958*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 959*f1697f36SDmitry Baryshkov &cam_cc_cphy_rx_clk_src.clkr.hw, 96015d09e83STaniya Das }, 96115d09e83STaniya Das .num_parents = 1, 96215d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 96315d09e83STaniya Das .ops = &clk_branch2_ops, 96415d09e83STaniya Das }, 96515d09e83STaniya Das }, 96615d09e83STaniya Das }; 96715d09e83STaniya Das 96815d09e83STaniya Das static struct clk_branch cam_cc_csiphy1_clk = { 96915d09e83STaniya Das .halt_reg = 0x5044, 97015d09e83STaniya Das .halt_check = BRANCH_HALT, 97115d09e83STaniya Das .clkr = { 97215d09e83STaniya Das .enable_reg = 0x5044, 97315d09e83STaniya Das .enable_mask = BIT(0), 97415d09e83STaniya Das .hw.init = &(struct clk_init_data){ 97515d09e83STaniya Das .name = "cam_cc_csiphy1_clk", 976*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 977*f1697f36SDmitry Baryshkov &cam_cc_cphy_rx_clk_src.clkr.hw, 97815d09e83STaniya Das }, 97915d09e83STaniya Das .num_parents = 1, 98015d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 98115d09e83STaniya Das .ops = &clk_branch2_ops, 98215d09e83STaniya Das }, 98315d09e83STaniya Das }, 98415d09e83STaniya Das }; 98515d09e83STaniya Das 98615d09e83STaniya Das static struct clk_branch cam_cc_csiphy2_clk = { 98715d09e83STaniya Das .halt_reg = 0x5068, 98815d09e83STaniya Das .halt_check = BRANCH_HALT, 98915d09e83STaniya Das .clkr = { 99015d09e83STaniya Das .enable_reg = 0x5068, 99115d09e83STaniya Das .enable_mask = BIT(0), 99215d09e83STaniya Das .hw.init = &(struct clk_init_data){ 99315d09e83STaniya Das .name = "cam_cc_csiphy2_clk", 994*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 995*f1697f36SDmitry Baryshkov &cam_cc_cphy_rx_clk_src.clkr.hw, 99615d09e83STaniya Das }, 99715d09e83STaniya Das .num_parents = 1, 99815d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 99915d09e83STaniya Das .ops = &clk_branch2_ops, 100015d09e83STaniya Das }, 100115d09e83STaniya Das }, 100215d09e83STaniya Das }; 100315d09e83STaniya Das 100415d09e83STaniya Das static struct clk_branch cam_cc_csiphy3_clk = { 100515d09e83STaniya Das .halt_reg = 0x508c, 100615d09e83STaniya Das .halt_check = BRANCH_HALT, 100715d09e83STaniya Das .clkr = { 100815d09e83STaniya Das .enable_reg = 0x508c, 100915d09e83STaniya Das .enable_mask = BIT(0), 101015d09e83STaniya Das .hw.init = &(struct clk_init_data){ 101115d09e83STaniya Das .name = "cam_cc_csiphy3_clk", 1012*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1013*f1697f36SDmitry Baryshkov &cam_cc_cphy_rx_clk_src.clkr.hw, 101415d09e83STaniya Das }, 101515d09e83STaniya Das .num_parents = 1, 101615d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 101715d09e83STaniya Das .ops = &clk_branch2_ops, 101815d09e83STaniya Das }, 101915d09e83STaniya Das }, 102015d09e83STaniya Das }; 102115d09e83STaniya Das 102215d09e83STaniya Das static struct clk_branch cam_cc_icp_clk = { 102315d09e83STaniya Das .halt_reg = 0xb0a0, 102415d09e83STaniya Das .halt_check = BRANCH_HALT, 102515d09e83STaniya Das .clkr = { 102615d09e83STaniya Das .enable_reg = 0xb0a0, 102715d09e83STaniya Das .enable_mask = BIT(0), 102815d09e83STaniya Das .hw.init = &(struct clk_init_data){ 102915d09e83STaniya Das .name = "cam_cc_icp_clk", 1030*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1031*f1697f36SDmitry Baryshkov &cam_cc_icp_clk_src.clkr.hw, 103215d09e83STaniya Das }, 103315d09e83STaniya Das .num_parents = 1, 103415d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 103515d09e83STaniya Das .ops = &clk_branch2_ops, 103615d09e83STaniya Das }, 103715d09e83STaniya Das }, 103815d09e83STaniya Das }; 103915d09e83STaniya Das 104015d09e83STaniya Das static struct clk_branch cam_cc_ife_0_axi_clk = { 104115d09e83STaniya Das .halt_reg = 0x9080, 104215d09e83STaniya Das .halt_check = BRANCH_HALT, 104315d09e83STaniya Das .clkr = { 104415d09e83STaniya Das .enable_reg = 0x9080, 104515d09e83STaniya Das .enable_mask = BIT(0), 104615d09e83STaniya Das .hw.init = &(struct clk_init_data){ 104715d09e83STaniya Das .name = "cam_cc_ife_0_axi_clk", 104815d09e83STaniya Das .ops = &clk_branch2_ops, 104915d09e83STaniya Das }, 105015d09e83STaniya Das }, 105115d09e83STaniya Das }; 105215d09e83STaniya Das 105315d09e83STaniya Das static struct clk_branch cam_cc_ife_0_clk = { 105415d09e83STaniya Das .halt_reg = 0x9028, 105515d09e83STaniya Das .halt_check = BRANCH_HALT, 105615d09e83STaniya Das .clkr = { 105715d09e83STaniya Das .enable_reg = 0x9028, 105815d09e83STaniya Das .enable_mask = BIT(0), 105915d09e83STaniya Das .hw.init = &(struct clk_init_data){ 106015d09e83STaniya Das .name = "cam_cc_ife_0_clk", 1061*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1062*f1697f36SDmitry Baryshkov &cam_cc_ife_0_clk_src.clkr.hw, 106315d09e83STaniya Das }, 106415d09e83STaniya Das .num_parents = 1, 106515d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 106615d09e83STaniya Das .ops = &clk_branch2_ops, 106715d09e83STaniya Das }, 106815d09e83STaniya Das }, 106915d09e83STaniya Das }; 107015d09e83STaniya Das 107115d09e83STaniya Das static struct clk_branch cam_cc_ife_0_cphy_rx_clk = { 107215d09e83STaniya Das .halt_reg = 0x907c, 107315d09e83STaniya Das .halt_check = BRANCH_HALT, 107415d09e83STaniya Das .clkr = { 107515d09e83STaniya Das .enable_reg = 0x907c, 107615d09e83STaniya Das .enable_mask = BIT(0), 107715d09e83STaniya Das .hw.init = &(struct clk_init_data){ 107815d09e83STaniya Das .name = "cam_cc_ife_0_cphy_rx_clk", 1079*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1080*f1697f36SDmitry Baryshkov &cam_cc_cphy_rx_clk_src.clkr.hw, 108115d09e83STaniya Das }, 108215d09e83STaniya Das .num_parents = 1, 108315d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 108415d09e83STaniya Das .ops = &clk_branch2_ops, 108515d09e83STaniya Das }, 108615d09e83STaniya Das }, 108715d09e83STaniya Das }; 108815d09e83STaniya Das 108915d09e83STaniya Das static struct clk_branch cam_cc_ife_0_csid_clk = { 109015d09e83STaniya Das .halt_reg = 0x9054, 109115d09e83STaniya Das .halt_check = BRANCH_HALT, 109215d09e83STaniya Das .clkr = { 109315d09e83STaniya Das .enable_reg = 0x9054, 109415d09e83STaniya Das .enable_mask = BIT(0), 109515d09e83STaniya Das .hw.init = &(struct clk_init_data){ 109615d09e83STaniya Das .name = "cam_cc_ife_0_csid_clk", 1097*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1098*f1697f36SDmitry Baryshkov &cam_cc_ife_0_csid_clk_src.clkr.hw, 109915d09e83STaniya Das }, 110015d09e83STaniya Das .num_parents = 1, 110115d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 110215d09e83STaniya Das .ops = &clk_branch2_ops, 110315d09e83STaniya Das }, 110415d09e83STaniya Das }, 110515d09e83STaniya Das }; 110615d09e83STaniya Das 110715d09e83STaniya Das static struct clk_branch cam_cc_ife_0_dsp_clk = { 110815d09e83STaniya Das .halt_reg = 0x9038, 110915d09e83STaniya Das .halt_check = BRANCH_HALT, 111015d09e83STaniya Das .clkr = { 111115d09e83STaniya Das .enable_reg = 0x9038, 111215d09e83STaniya Das .enable_mask = BIT(0), 111315d09e83STaniya Das .hw.init = &(struct clk_init_data){ 111415d09e83STaniya Das .name = "cam_cc_ife_0_dsp_clk", 1115*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1116*f1697f36SDmitry Baryshkov &cam_cc_ife_0_clk_src.clkr.hw, 111715d09e83STaniya Das }, 111815d09e83STaniya Das .num_parents = 1, 111915d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 112015d09e83STaniya Das .ops = &clk_branch2_ops, 112115d09e83STaniya Das }, 112215d09e83STaniya Das }, 112315d09e83STaniya Das }; 112415d09e83STaniya Das 112515d09e83STaniya Das static struct clk_branch cam_cc_ife_1_axi_clk = { 112615d09e83STaniya Das .halt_reg = 0xa058, 112715d09e83STaniya Das .halt_check = BRANCH_HALT, 112815d09e83STaniya Das .clkr = { 112915d09e83STaniya Das .enable_reg = 0xa058, 113015d09e83STaniya Das .enable_mask = BIT(0), 113115d09e83STaniya Das .hw.init = &(struct clk_init_data){ 113215d09e83STaniya Das .name = "cam_cc_ife_1_axi_clk", 113315d09e83STaniya Das .ops = &clk_branch2_ops, 113415d09e83STaniya Das }, 113515d09e83STaniya Das }, 113615d09e83STaniya Das }; 113715d09e83STaniya Das 113815d09e83STaniya Das static struct clk_branch cam_cc_ife_1_clk = { 113915d09e83STaniya Das .halt_reg = 0xa028, 114015d09e83STaniya Das .halt_check = BRANCH_HALT, 114115d09e83STaniya Das .clkr = { 114215d09e83STaniya Das .enable_reg = 0xa028, 114315d09e83STaniya Das .enable_mask = BIT(0), 114415d09e83STaniya Das .hw.init = &(struct clk_init_data){ 114515d09e83STaniya Das .name = "cam_cc_ife_1_clk", 1146*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1147*f1697f36SDmitry Baryshkov &cam_cc_ife_1_clk_src.clkr.hw, 114815d09e83STaniya Das }, 114915d09e83STaniya Das .num_parents = 1, 115015d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 115115d09e83STaniya Das .ops = &clk_branch2_ops, 115215d09e83STaniya Das }, 115315d09e83STaniya Das }, 115415d09e83STaniya Das }; 115515d09e83STaniya Das 115615d09e83STaniya Das static struct clk_branch cam_cc_ife_1_cphy_rx_clk = { 115715d09e83STaniya Das .halt_reg = 0xa054, 115815d09e83STaniya Das .halt_check = BRANCH_HALT, 115915d09e83STaniya Das .clkr = { 116015d09e83STaniya Das .enable_reg = 0xa054, 116115d09e83STaniya Das .enable_mask = BIT(0), 116215d09e83STaniya Das .hw.init = &(struct clk_init_data){ 116315d09e83STaniya Das .name = "cam_cc_ife_1_cphy_rx_clk", 1164*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1165*f1697f36SDmitry Baryshkov &cam_cc_cphy_rx_clk_src.clkr.hw, 116615d09e83STaniya Das }, 116715d09e83STaniya Das .num_parents = 1, 116815d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 116915d09e83STaniya Das .ops = &clk_branch2_ops, 117015d09e83STaniya Das }, 117115d09e83STaniya Das }, 117215d09e83STaniya Das }; 117315d09e83STaniya Das 117415d09e83STaniya Das static struct clk_branch cam_cc_ife_1_csid_clk = { 117515d09e83STaniya Das .halt_reg = 0xa04c, 117615d09e83STaniya Das .halt_check = BRANCH_HALT, 117715d09e83STaniya Das .clkr = { 117815d09e83STaniya Das .enable_reg = 0xa04c, 117915d09e83STaniya Das .enable_mask = BIT(0), 118015d09e83STaniya Das .hw.init = &(struct clk_init_data){ 118115d09e83STaniya Das .name = "cam_cc_ife_1_csid_clk", 1182*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1183*f1697f36SDmitry Baryshkov &cam_cc_ife_1_csid_clk_src.clkr.hw, 118415d09e83STaniya Das }, 118515d09e83STaniya Das .num_parents = 1, 118615d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 118715d09e83STaniya Das .ops = &clk_branch2_ops, 118815d09e83STaniya Das }, 118915d09e83STaniya Das }, 119015d09e83STaniya Das }; 119115d09e83STaniya Das 119215d09e83STaniya Das static struct clk_branch cam_cc_ife_1_dsp_clk = { 119315d09e83STaniya Das .halt_reg = 0xa030, 119415d09e83STaniya Das .halt_check = BRANCH_HALT, 119515d09e83STaniya Das .clkr = { 119615d09e83STaniya Das .enable_reg = 0xa030, 119715d09e83STaniya Das .enable_mask = BIT(0), 119815d09e83STaniya Das .hw.init = &(struct clk_init_data){ 119915d09e83STaniya Das .name = "cam_cc_ife_1_dsp_clk", 1200*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1201*f1697f36SDmitry Baryshkov &cam_cc_ife_1_clk_src.clkr.hw, 120215d09e83STaniya Das }, 120315d09e83STaniya Das .num_parents = 1, 120415d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 120515d09e83STaniya Das .ops = &clk_branch2_ops, 120615d09e83STaniya Das }, 120715d09e83STaniya Das }, 120815d09e83STaniya Das }; 120915d09e83STaniya Das 121015d09e83STaniya Das static struct clk_branch cam_cc_ife_lite_clk = { 121115d09e83STaniya Das .halt_reg = 0xb01c, 121215d09e83STaniya Das .halt_check = BRANCH_HALT, 121315d09e83STaniya Das .clkr = { 121415d09e83STaniya Das .enable_reg = 0xb01c, 121515d09e83STaniya Das .enable_mask = BIT(0), 121615d09e83STaniya Das .hw.init = &(struct clk_init_data){ 121715d09e83STaniya Das .name = "cam_cc_ife_lite_clk", 1218*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1219*f1697f36SDmitry Baryshkov &cam_cc_ife_lite_clk_src.clkr.hw, 122015d09e83STaniya Das }, 122115d09e83STaniya Das .num_parents = 1, 122215d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 122315d09e83STaniya Das .ops = &clk_branch2_ops, 122415d09e83STaniya Das }, 122515d09e83STaniya Das }, 122615d09e83STaniya Das }; 122715d09e83STaniya Das 122815d09e83STaniya Das static struct clk_branch cam_cc_ife_lite_cphy_rx_clk = { 122915d09e83STaniya Das .halt_reg = 0xb044, 123015d09e83STaniya Das .halt_check = BRANCH_HALT, 123115d09e83STaniya Das .clkr = { 123215d09e83STaniya Das .enable_reg = 0xb044, 123315d09e83STaniya Das .enable_mask = BIT(0), 123415d09e83STaniya Das .hw.init = &(struct clk_init_data){ 123515d09e83STaniya Das .name = "cam_cc_ife_lite_cphy_rx_clk", 1236*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1237*f1697f36SDmitry Baryshkov &cam_cc_cphy_rx_clk_src.clkr.hw, 123815d09e83STaniya Das }, 123915d09e83STaniya Das .num_parents = 1, 124015d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 124115d09e83STaniya Das .ops = &clk_branch2_ops, 124215d09e83STaniya Das }, 124315d09e83STaniya Das }, 124415d09e83STaniya Das }; 124515d09e83STaniya Das 124615d09e83STaniya Das static struct clk_branch cam_cc_ife_lite_csid_clk = { 124715d09e83STaniya Das .halt_reg = 0xb03c, 124815d09e83STaniya Das .halt_check = BRANCH_HALT, 124915d09e83STaniya Das .clkr = { 125015d09e83STaniya Das .enable_reg = 0xb03c, 125115d09e83STaniya Das .enable_mask = BIT(0), 125215d09e83STaniya Das .hw.init = &(struct clk_init_data){ 125315d09e83STaniya Das .name = "cam_cc_ife_lite_csid_clk", 1254*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1255*f1697f36SDmitry Baryshkov &cam_cc_ife_lite_csid_clk_src.clkr.hw, 125615d09e83STaniya Das }, 125715d09e83STaniya Das .num_parents = 1, 125815d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 125915d09e83STaniya Das .ops = &clk_branch2_ops, 126015d09e83STaniya Das }, 126115d09e83STaniya Das }, 126215d09e83STaniya Das }; 126315d09e83STaniya Das 126415d09e83STaniya Das static struct clk_branch cam_cc_ipe_0_ahb_clk = { 126515d09e83STaniya Das .halt_reg = 0x7040, 126615d09e83STaniya Das .halt_check = BRANCH_HALT, 126715d09e83STaniya Das .clkr = { 126815d09e83STaniya Das .enable_reg = 0x7040, 126915d09e83STaniya Das .enable_mask = BIT(0), 127015d09e83STaniya Das .hw.init = &(struct clk_init_data){ 127115d09e83STaniya Das .name = "cam_cc_ipe_0_ahb_clk", 1272*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1273*f1697f36SDmitry Baryshkov &cam_cc_slow_ahb_clk_src.clkr.hw, 127415d09e83STaniya Das }, 127515d09e83STaniya Das .num_parents = 1, 127615d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 127715d09e83STaniya Das .ops = &clk_branch2_ops, 127815d09e83STaniya Das }, 127915d09e83STaniya Das }, 128015d09e83STaniya Das }; 128115d09e83STaniya Das 128215d09e83STaniya Das static struct clk_branch cam_cc_ipe_0_areg_clk = { 128315d09e83STaniya Das .halt_reg = 0x703c, 128415d09e83STaniya Das .halt_check = BRANCH_HALT, 128515d09e83STaniya Das .clkr = { 128615d09e83STaniya Das .enable_reg = 0x703c, 128715d09e83STaniya Das .enable_mask = BIT(0), 128815d09e83STaniya Das .hw.init = &(struct clk_init_data){ 128915d09e83STaniya Das .name = "cam_cc_ipe_0_areg_clk", 1290*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1291*f1697f36SDmitry Baryshkov &cam_cc_fast_ahb_clk_src.clkr.hw, 129215d09e83STaniya Das }, 129315d09e83STaniya Das .num_parents = 1, 129415d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 129515d09e83STaniya Das .ops = &clk_branch2_ops, 129615d09e83STaniya Das }, 129715d09e83STaniya Das }, 129815d09e83STaniya Das }; 129915d09e83STaniya Das 130015d09e83STaniya Das static struct clk_branch cam_cc_ipe_0_axi_clk = { 130115d09e83STaniya Das .halt_reg = 0x7038, 130215d09e83STaniya Das .halt_check = BRANCH_HALT, 130315d09e83STaniya Das .clkr = { 130415d09e83STaniya Das .enable_reg = 0x7038, 130515d09e83STaniya Das .enable_mask = BIT(0), 130615d09e83STaniya Das .hw.init = &(struct clk_init_data){ 130715d09e83STaniya Das .name = "cam_cc_ipe_0_axi_clk", 130815d09e83STaniya Das .ops = &clk_branch2_ops, 130915d09e83STaniya Das }, 131015d09e83STaniya Das }, 131115d09e83STaniya Das }; 131215d09e83STaniya Das 131315d09e83STaniya Das static struct clk_branch cam_cc_ipe_0_clk = { 131415d09e83STaniya Das .halt_reg = 0x7028, 131515d09e83STaniya Das .halt_check = BRANCH_HALT, 131615d09e83STaniya Das .clkr = { 131715d09e83STaniya Das .enable_reg = 0x7028, 131815d09e83STaniya Das .enable_mask = BIT(0), 131915d09e83STaniya Das .hw.init = &(struct clk_init_data){ 132015d09e83STaniya Das .name = "cam_cc_ipe_0_clk", 1321*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1322*f1697f36SDmitry Baryshkov &cam_cc_ipe_0_clk_src.clkr.hw, 132315d09e83STaniya Das }, 132415d09e83STaniya Das .num_parents = 1, 132515d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 132615d09e83STaniya Das .ops = &clk_branch2_ops, 132715d09e83STaniya Das }, 132815d09e83STaniya Das }, 132915d09e83STaniya Das }; 133015d09e83STaniya Das 133115d09e83STaniya Das static struct clk_branch cam_cc_jpeg_clk = { 133215d09e83STaniya Das .halt_reg = 0xb064, 133315d09e83STaniya Das .halt_check = BRANCH_HALT, 133415d09e83STaniya Das .clkr = { 133515d09e83STaniya Das .enable_reg = 0xb064, 133615d09e83STaniya Das .enable_mask = BIT(0), 133715d09e83STaniya Das .hw.init = &(struct clk_init_data){ 133815d09e83STaniya Das .name = "cam_cc_jpeg_clk", 1339*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1340*f1697f36SDmitry Baryshkov &cam_cc_jpeg_clk_src.clkr.hw, 134115d09e83STaniya Das }, 134215d09e83STaniya Das .num_parents = 1, 134315d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 134415d09e83STaniya Das .ops = &clk_branch2_ops, 134515d09e83STaniya Das }, 134615d09e83STaniya Das }, 134715d09e83STaniya Das }; 134815d09e83STaniya Das 134915d09e83STaniya Das static struct clk_branch cam_cc_lrme_clk = { 135015d09e83STaniya Das .halt_reg = 0xb110, 135115d09e83STaniya Das .halt_check = BRANCH_HALT, 135215d09e83STaniya Das .clkr = { 135315d09e83STaniya Das .enable_reg = 0xb110, 135415d09e83STaniya Das .enable_mask = BIT(0), 135515d09e83STaniya Das .hw.init = &(struct clk_init_data){ 135615d09e83STaniya Das .name = "cam_cc_lrme_clk", 1357*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1358*f1697f36SDmitry Baryshkov &cam_cc_lrme_clk_src.clkr.hw, 135915d09e83STaniya Das }, 136015d09e83STaniya Das .num_parents = 1, 136115d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 136215d09e83STaniya Das .ops = &clk_branch2_ops, 136315d09e83STaniya Das }, 136415d09e83STaniya Das }, 136515d09e83STaniya Das }; 136615d09e83STaniya Das 136715d09e83STaniya Das static struct clk_branch cam_cc_mclk0_clk = { 136815d09e83STaniya Das .halt_reg = 0x401c, 136915d09e83STaniya Das .halt_check = BRANCH_HALT, 137015d09e83STaniya Das .clkr = { 137115d09e83STaniya Das .enable_reg = 0x401c, 137215d09e83STaniya Das .enable_mask = BIT(0), 137315d09e83STaniya Das .hw.init = &(struct clk_init_data){ 137415d09e83STaniya Das .name = "cam_cc_mclk0_clk", 1375*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1376*f1697f36SDmitry Baryshkov &cam_cc_mclk0_clk_src.clkr.hw, 137715d09e83STaniya Das }, 137815d09e83STaniya Das .num_parents = 1, 137915d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 138015d09e83STaniya Das .ops = &clk_branch2_ops, 138115d09e83STaniya Das }, 138215d09e83STaniya Das }, 138315d09e83STaniya Das }; 138415d09e83STaniya Das 138515d09e83STaniya Das static struct clk_branch cam_cc_mclk1_clk = { 138615d09e83STaniya Das .halt_reg = 0x403c, 138715d09e83STaniya Das .halt_check = BRANCH_HALT, 138815d09e83STaniya Das .clkr = { 138915d09e83STaniya Das .enable_reg = 0x403c, 139015d09e83STaniya Das .enable_mask = BIT(0), 139115d09e83STaniya Das .hw.init = &(struct clk_init_data){ 139215d09e83STaniya Das .name = "cam_cc_mclk1_clk", 1393*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1394*f1697f36SDmitry Baryshkov &cam_cc_mclk1_clk_src.clkr.hw, 139515d09e83STaniya Das }, 139615d09e83STaniya Das .num_parents = 1, 139715d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 139815d09e83STaniya Das .ops = &clk_branch2_ops, 139915d09e83STaniya Das }, 140015d09e83STaniya Das }, 140115d09e83STaniya Das }; 140215d09e83STaniya Das 140315d09e83STaniya Das static struct clk_branch cam_cc_mclk2_clk = { 140415d09e83STaniya Das .halt_reg = 0x405c, 140515d09e83STaniya Das .halt_check = BRANCH_HALT, 140615d09e83STaniya Das .clkr = { 140715d09e83STaniya Das .enable_reg = 0x405c, 140815d09e83STaniya Das .enable_mask = BIT(0), 140915d09e83STaniya Das .hw.init = &(struct clk_init_data){ 141015d09e83STaniya Das .name = "cam_cc_mclk2_clk", 1411*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1412*f1697f36SDmitry Baryshkov &cam_cc_mclk2_clk_src.clkr.hw, 141315d09e83STaniya Das }, 141415d09e83STaniya Das .num_parents = 1, 141515d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 141615d09e83STaniya Das .ops = &clk_branch2_ops, 141715d09e83STaniya Das }, 141815d09e83STaniya Das }, 141915d09e83STaniya Das }; 142015d09e83STaniya Das 142115d09e83STaniya Das static struct clk_branch cam_cc_mclk3_clk = { 142215d09e83STaniya Das .halt_reg = 0x407c, 142315d09e83STaniya Das .halt_check = BRANCH_HALT, 142415d09e83STaniya Das .clkr = { 142515d09e83STaniya Das .enable_reg = 0x407c, 142615d09e83STaniya Das .enable_mask = BIT(0), 142715d09e83STaniya Das .hw.init = &(struct clk_init_data){ 142815d09e83STaniya Das .name = "cam_cc_mclk3_clk", 1429*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1430*f1697f36SDmitry Baryshkov &cam_cc_mclk3_clk_src.clkr.hw, 143115d09e83STaniya Das }, 143215d09e83STaniya Das .num_parents = 1, 143315d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 143415d09e83STaniya Das .ops = &clk_branch2_ops, 143515d09e83STaniya Das }, 143615d09e83STaniya Das }, 143715d09e83STaniya Das }; 143815d09e83STaniya Das 143915d09e83STaniya Das static struct clk_branch cam_cc_mclk4_clk = { 144015d09e83STaniya Das .halt_reg = 0x409c, 144115d09e83STaniya Das .halt_check = BRANCH_HALT, 144215d09e83STaniya Das .clkr = { 144315d09e83STaniya Das .enable_reg = 0x409c, 144415d09e83STaniya Das .enable_mask = BIT(0), 144515d09e83STaniya Das .hw.init = &(struct clk_init_data){ 144615d09e83STaniya Das .name = "cam_cc_mclk4_clk", 1447*f1697f36SDmitry Baryshkov .parent_hws = (const struct clk_hw*[]){ 1448*f1697f36SDmitry Baryshkov &cam_cc_mclk4_clk_src.clkr.hw, 144915d09e83STaniya Das }, 145015d09e83STaniya Das .num_parents = 1, 145115d09e83STaniya Das .flags = CLK_SET_RATE_PARENT, 145215d09e83STaniya Das .ops = &clk_branch2_ops, 145315d09e83STaniya Das }, 145415d09e83STaniya Das }, 145515d09e83STaniya Das }; 145615d09e83STaniya Das 145715d09e83STaniya Das static struct clk_branch cam_cc_soc_ahb_clk = { 145815d09e83STaniya Das .halt_reg = 0xb140, 145915d09e83STaniya Das .halt_check = BRANCH_HALT, 146015d09e83STaniya Das .clkr = { 146115d09e83STaniya Das .enable_reg = 0xb140, 146215d09e83STaniya Das .enable_mask = BIT(0), 146315d09e83STaniya Das .hw.init = &(struct clk_init_data){ 146415d09e83STaniya Das .name = "cam_cc_soc_ahb_clk", 146515d09e83STaniya Das .ops = &clk_branch2_ops, 146615d09e83STaniya Das }, 146715d09e83STaniya Das }, 146815d09e83STaniya Das }; 146915d09e83STaniya Das 147015d09e83STaniya Das static struct clk_branch cam_cc_sys_tmr_clk = { 147115d09e83STaniya Das .halt_reg = 0xb0a8, 147215d09e83STaniya Das .halt_check = BRANCH_HALT, 147315d09e83STaniya Das .clkr = { 147415d09e83STaniya Das .enable_reg = 0xb0a8, 147515d09e83STaniya Das .enable_mask = BIT(0), 147615d09e83STaniya Das .hw.init = &(struct clk_init_data){ 147715d09e83STaniya Das .name = "cam_cc_sys_tmr_clk", 147815d09e83STaniya Das .ops = &clk_branch2_ops, 147915d09e83STaniya Das }, 148015d09e83STaniya Das }, 148115d09e83STaniya Das }; 148215d09e83STaniya Das 148315d09e83STaniya Das static struct gdsc bps_gdsc = { 148415d09e83STaniya Das .gdscr = 0x6004, 148515d09e83STaniya Das .pd = { 148615d09e83STaniya Das .name = "bps_gdsc", 148715d09e83STaniya Das }, 148815d09e83STaniya Das .pwrsts = PWRSTS_OFF_ON, 148915d09e83STaniya Das .flags = HW_CTRL, 149015d09e83STaniya Das }; 149115d09e83STaniya Das 149215d09e83STaniya Das static struct gdsc ife_0_gdsc = { 149315d09e83STaniya Das .gdscr = 0x9004, 149415d09e83STaniya Das .pd = { 149515d09e83STaniya Das .name = "ife_0_gdsc", 149615d09e83STaniya Das }, 149715d09e83STaniya Das .pwrsts = PWRSTS_OFF_ON, 149815d09e83STaniya Das }; 149915d09e83STaniya Das 150015d09e83STaniya Das static struct gdsc ife_1_gdsc = { 150115d09e83STaniya Das .gdscr = 0xa004, 150215d09e83STaniya Das .pd = { 150315d09e83STaniya Das .name = "ife_1_gdsc", 150415d09e83STaniya Das }, 150515d09e83STaniya Das .pwrsts = PWRSTS_OFF_ON, 150615d09e83STaniya Das }; 150715d09e83STaniya Das 150815d09e83STaniya Das static struct gdsc ipe_0_gdsc = { 150915d09e83STaniya Das .gdscr = 0x7004, 151015d09e83STaniya Das .pd = { 151115d09e83STaniya Das .name = "ipe_0_gdsc", 151215d09e83STaniya Das }, 151315d09e83STaniya Das .pwrsts = PWRSTS_OFF_ON, 151415d09e83STaniya Das .flags = HW_CTRL, 151515d09e83STaniya Das }; 151615d09e83STaniya Das 151715d09e83STaniya Das static struct gdsc titan_top_gdsc = { 151815d09e83STaniya Das .gdscr = 0xb134, 151915d09e83STaniya Das .pd = { 152015d09e83STaniya Das .name = "titan_top_gdsc", 152115d09e83STaniya Das }, 152215d09e83STaniya Das .pwrsts = PWRSTS_OFF_ON, 152315d09e83STaniya Das }; 152415d09e83STaniya Das 152515d09e83STaniya Das static struct clk_hw *cam_cc_sc7180_hws[] = { 152615d09e83STaniya Das [CAM_CC_PLL2_OUT_EARLY] = &cam_cc_pll2_out_early.hw, 152715d09e83STaniya Das }; 152815d09e83STaniya Das 152915d09e83STaniya Das static struct clk_regmap *cam_cc_sc7180_clocks[] = { 153015d09e83STaniya Das [CAM_CC_BPS_AHB_CLK] = &cam_cc_bps_ahb_clk.clkr, 153115d09e83STaniya Das [CAM_CC_BPS_AREG_CLK] = &cam_cc_bps_areg_clk.clkr, 153215d09e83STaniya Das [CAM_CC_BPS_AXI_CLK] = &cam_cc_bps_axi_clk.clkr, 153315d09e83STaniya Das [CAM_CC_BPS_CLK] = &cam_cc_bps_clk.clkr, 153415d09e83STaniya Das [CAM_CC_BPS_CLK_SRC] = &cam_cc_bps_clk_src.clkr, 153515d09e83STaniya Das [CAM_CC_CAMNOC_AXI_CLK] = &cam_cc_camnoc_axi_clk.clkr, 153615d09e83STaniya Das [CAM_CC_CCI_0_CLK] = &cam_cc_cci_0_clk.clkr, 153715d09e83STaniya Das [CAM_CC_CCI_0_CLK_SRC] = &cam_cc_cci_0_clk_src.clkr, 153815d09e83STaniya Das [CAM_CC_CCI_1_CLK] = &cam_cc_cci_1_clk.clkr, 153915d09e83STaniya Das [CAM_CC_CCI_1_CLK_SRC] = &cam_cc_cci_1_clk_src.clkr, 154015d09e83STaniya Das [CAM_CC_CORE_AHB_CLK] = &cam_cc_core_ahb_clk.clkr, 154115d09e83STaniya Das [CAM_CC_CPAS_AHB_CLK] = &cam_cc_cpas_ahb_clk.clkr, 154215d09e83STaniya Das [CAM_CC_CPHY_RX_CLK_SRC] = &cam_cc_cphy_rx_clk_src.clkr, 154315d09e83STaniya Das [CAM_CC_CSI0PHYTIMER_CLK] = &cam_cc_csi0phytimer_clk.clkr, 154415d09e83STaniya Das [CAM_CC_CSI0PHYTIMER_CLK_SRC] = &cam_cc_csi0phytimer_clk_src.clkr, 154515d09e83STaniya Das [CAM_CC_CSI1PHYTIMER_CLK] = &cam_cc_csi1phytimer_clk.clkr, 154615d09e83STaniya Das [CAM_CC_CSI1PHYTIMER_CLK_SRC] = &cam_cc_csi1phytimer_clk_src.clkr, 154715d09e83STaniya Das [CAM_CC_CSI2PHYTIMER_CLK] = &cam_cc_csi2phytimer_clk.clkr, 154815d09e83STaniya Das [CAM_CC_CSI2PHYTIMER_CLK_SRC] = &cam_cc_csi2phytimer_clk_src.clkr, 154915d09e83STaniya Das [CAM_CC_CSI3PHYTIMER_CLK] = &cam_cc_csi3phytimer_clk.clkr, 155015d09e83STaniya Das [CAM_CC_CSI3PHYTIMER_CLK_SRC] = &cam_cc_csi3phytimer_clk_src.clkr, 155115d09e83STaniya Das [CAM_CC_CSIPHY0_CLK] = &cam_cc_csiphy0_clk.clkr, 155215d09e83STaniya Das [CAM_CC_CSIPHY1_CLK] = &cam_cc_csiphy1_clk.clkr, 155315d09e83STaniya Das [CAM_CC_CSIPHY2_CLK] = &cam_cc_csiphy2_clk.clkr, 155415d09e83STaniya Das [CAM_CC_CSIPHY3_CLK] = &cam_cc_csiphy3_clk.clkr, 155515d09e83STaniya Das [CAM_CC_FAST_AHB_CLK_SRC] = &cam_cc_fast_ahb_clk_src.clkr, 155615d09e83STaniya Das [CAM_CC_ICP_CLK] = &cam_cc_icp_clk.clkr, 155715d09e83STaniya Das [CAM_CC_ICP_CLK_SRC] = &cam_cc_icp_clk_src.clkr, 155815d09e83STaniya Das [CAM_CC_IFE_0_AXI_CLK] = &cam_cc_ife_0_axi_clk.clkr, 155915d09e83STaniya Das [CAM_CC_IFE_0_CLK] = &cam_cc_ife_0_clk.clkr, 156015d09e83STaniya Das [CAM_CC_IFE_0_CLK_SRC] = &cam_cc_ife_0_clk_src.clkr, 156115d09e83STaniya Das [CAM_CC_IFE_0_CPHY_RX_CLK] = &cam_cc_ife_0_cphy_rx_clk.clkr, 156215d09e83STaniya Das [CAM_CC_IFE_0_CSID_CLK] = &cam_cc_ife_0_csid_clk.clkr, 156315d09e83STaniya Das [CAM_CC_IFE_0_CSID_CLK_SRC] = &cam_cc_ife_0_csid_clk_src.clkr, 156415d09e83STaniya Das [CAM_CC_IFE_0_DSP_CLK] = &cam_cc_ife_0_dsp_clk.clkr, 156515d09e83STaniya Das [CAM_CC_IFE_1_AXI_CLK] = &cam_cc_ife_1_axi_clk.clkr, 156615d09e83STaniya Das [CAM_CC_IFE_1_CLK] = &cam_cc_ife_1_clk.clkr, 156715d09e83STaniya Das [CAM_CC_IFE_1_CLK_SRC] = &cam_cc_ife_1_clk_src.clkr, 156815d09e83STaniya Das [CAM_CC_IFE_1_CPHY_RX_CLK] = &cam_cc_ife_1_cphy_rx_clk.clkr, 156915d09e83STaniya Das [CAM_CC_IFE_1_CSID_CLK] = &cam_cc_ife_1_csid_clk.clkr, 157015d09e83STaniya Das [CAM_CC_IFE_1_CSID_CLK_SRC] = &cam_cc_ife_1_csid_clk_src.clkr, 157115d09e83STaniya Das [CAM_CC_IFE_1_DSP_CLK] = &cam_cc_ife_1_dsp_clk.clkr, 157215d09e83STaniya Das [CAM_CC_IFE_LITE_CLK] = &cam_cc_ife_lite_clk.clkr, 157315d09e83STaniya Das [CAM_CC_IFE_LITE_CLK_SRC] = &cam_cc_ife_lite_clk_src.clkr, 157415d09e83STaniya Das [CAM_CC_IFE_LITE_CPHY_RX_CLK] = &cam_cc_ife_lite_cphy_rx_clk.clkr, 157515d09e83STaniya Das [CAM_CC_IFE_LITE_CSID_CLK] = &cam_cc_ife_lite_csid_clk.clkr, 157615d09e83STaniya Das [CAM_CC_IFE_LITE_CSID_CLK_SRC] = &cam_cc_ife_lite_csid_clk_src.clkr, 157715d09e83STaniya Das [CAM_CC_IPE_0_AHB_CLK] = &cam_cc_ipe_0_ahb_clk.clkr, 157815d09e83STaniya Das [CAM_CC_IPE_0_AREG_CLK] = &cam_cc_ipe_0_areg_clk.clkr, 157915d09e83STaniya Das [CAM_CC_IPE_0_AXI_CLK] = &cam_cc_ipe_0_axi_clk.clkr, 158015d09e83STaniya Das [CAM_CC_IPE_0_CLK] = &cam_cc_ipe_0_clk.clkr, 158115d09e83STaniya Das [CAM_CC_IPE_0_CLK_SRC] = &cam_cc_ipe_0_clk_src.clkr, 158215d09e83STaniya Das [CAM_CC_JPEG_CLK] = &cam_cc_jpeg_clk.clkr, 158315d09e83STaniya Das [CAM_CC_JPEG_CLK_SRC] = &cam_cc_jpeg_clk_src.clkr, 158415d09e83STaniya Das [CAM_CC_LRME_CLK] = &cam_cc_lrme_clk.clkr, 158515d09e83STaniya Das [CAM_CC_LRME_CLK_SRC] = &cam_cc_lrme_clk_src.clkr, 158615d09e83STaniya Das [CAM_CC_MCLK0_CLK] = &cam_cc_mclk0_clk.clkr, 158715d09e83STaniya Das [CAM_CC_MCLK0_CLK_SRC] = &cam_cc_mclk0_clk_src.clkr, 158815d09e83STaniya Das [CAM_CC_MCLK1_CLK] = &cam_cc_mclk1_clk.clkr, 158915d09e83STaniya Das [CAM_CC_MCLK1_CLK_SRC] = &cam_cc_mclk1_clk_src.clkr, 159015d09e83STaniya Das [CAM_CC_MCLK2_CLK] = &cam_cc_mclk2_clk.clkr, 159115d09e83STaniya Das [CAM_CC_MCLK2_CLK_SRC] = &cam_cc_mclk2_clk_src.clkr, 159215d09e83STaniya Das [CAM_CC_MCLK3_CLK] = &cam_cc_mclk3_clk.clkr, 159315d09e83STaniya Das [CAM_CC_MCLK3_CLK_SRC] = &cam_cc_mclk3_clk_src.clkr, 159415d09e83STaniya Das [CAM_CC_MCLK4_CLK] = &cam_cc_mclk4_clk.clkr, 159515d09e83STaniya Das [CAM_CC_MCLK4_CLK_SRC] = &cam_cc_mclk4_clk_src.clkr, 159615d09e83STaniya Das [CAM_CC_PLL0] = &cam_cc_pll0.clkr, 159715d09e83STaniya Das [CAM_CC_PLL1] = &cam_cc_pll1.clkr, 159815d09e83STaniya Das [CAM_CC_PLL2] = &cam_cc_pll2.clkr, 159915d09e83STaniya Das [CAM_CC_PLL2_OUT_AUX] = &cam_cc_pll2_out_aux.clkr, 160015d09e83STaniya Das [CAM_CC_PLL3] = &cam_cc_pll3.clkr, 160115d09e83STaniya Das [CAM_CC_SLOW_AHB_CLK_SRC] = &cam_cc_slow_ahb_clk_src.clkr, 160215d09e83STaniya Das [CAM_CC_SOC_AHB_CLK] = &cam_cc_soc_ahb_clk.clkr, 160315d09e83STaniya Das [CAM_CC_SYS_TMR_CLK] = &cam_cc_sys_tmr_clk.clkr, 160415d09e83STaniya Das }; 160515d09e83STaniya Das static struct gdsc *cam_cc_sc7180_gdscs[] = { 160615d09e83STaniya Das [BPS_GDSC] = &bps_gdsc, 160715d09e83STaniya Das [IFE_0_GDSC] = &ife_0_gdsc, 160815d09e83STaniya Das [IFE_1_GDSC] = &ife_1_gdsc, 160915d09e83STaniya Das [IPE_0_GDSC] = &ipe_0_gdsc, 161015d09e83STaniya Das [TITAN_TOP_GDSC] = &titan_top_gdsc, 161115d09e83STaniya Das }; 161215d09e83STaniya Das 161315d09e83STaniya Das static const struct regmap_config cam_cc_sc7180_regmap_config = { 161415d09e83STaniya Das .reg_bits = 32, 161515d09e83STaniya Das .reg_stride = 4, 161615d09e83STaniya Das .val_bits = 32, 161715d09e83STaniya Das .max_register = 0xd028, 161815d09e83STaniya Das .fast_io = true, 161915d09e83STaniya Das }; 162015d09e83STaniya Das 162115d09e83STaniya Das static const struct qcom_cc_desc cam_cc_sc7180_desc = { 162215d09e83STaniya Das .config = &cam_cc_sc7180_regmap_config, 162315d09e83STaniya Das .clk_hws = cam_cc_sc7180_hws, 162415d09e83STaniya Das .num_clk_hws = ARRAY_SIZE(cam_cc_sc7180_hws), 162515d09e83STaniya Das .clks = cam_cc_sc7180_clocks, 162615d09e83STaniya Das .num_clks = ARRAY_SIZE(cam_cc_sc7180_clocks), 162715d09e83STaniya Das .gdscs = cam_cc_sc7180_gdscs, 162815d09e83STaniya Das .num_gdscs = ARRAY_SIZE(cam_cc_sc7180_gdscs), 162915d09e83STaniya Das }; 163015d09e83STaniya Das 163115d09e83STaniya Das static const struct of_device_id cam_cc_sc7180_match_table[] = { 163215d09e83STaniya Das { .compatible = "qcom,sc7180-camcc" }, 163315d09e83STaniya Das { } 163415d09e83STaniya Das }; 163515d09e83STaniya Das MODULE_DEVICE_TABLE(of, cam_cc_sc7180_match_table); 163615d09e83STaniya Das 163715d09e83STaniya Das static int cam_cc_sc7180_probe(struct platform_device *pdev) 163815d09e83STaniya Das { 163915d09e83STaniya Das struct regmap *regmap; 164015d09e83STaniya Das int ret; 164115d09e83STaniya Das 164272cfc73fSDmitry Baryshkov ret = devm_pm_runtime_enable(&pdev->dev); 164372cfc73fSDmitry Baryshkov if (ret < 0) 164472cfc73fSDmitry Baryshkov return ret; 164572cfc73fSDmitry Baryshkov 164672cfc73fSDmitry Baryshkov ret = devm_pm_clk_create(&pdev->dev); 164715d09e83STaniya Das if (ret < 0) 164815d09e83STaniya Das return ret; 164915d09e83STaniya Das 165015d09e83STaniya Das ret = pm_clk_add(&pdev->dev, "xo"); 165115d09e83STaniya Das if (ret < 0) { 165215d09e83STaniya Das dev_err(&pdev->dev, "Failed to acquire XO clock\n"); 165372cfc73fSDmitry Baryshkov return ret; 165415d09e83STaniya Das } 165515d09e83STaniya Das 165615d09e83STaniya Das ret = pm_clk_add(&pdev->dev, "iface"); 165715d09e83STaniya Das if (ret < 0) { 165815d09e83STaniya Das dev_err(&pdev->dev, "Failed to acquire iface clock\n"); 165972cfc73fSDmitry Baryshkov return ret; 166015d09e83STaniya Das } 166115d09e83STaniya Das 16628d402594SStephen Boyd ret = pm_runtime_get(&pdev->dev); 16638d402594SStephen Boyd if (ret) 166472cfc73fSDmitry Baryshkov return ret; 166515d09e83STaniya Das 166615d09e83STaniya Das regmap = qcom_cc_map(pdev, &cam_cc_sc7180_desc); 166715d09e83STaniya Das if (IS_ERR(regmap)) { 166815d09e83STaniya Das ret = PTR_ERR(regmap); 16698d402594SStephen Boyd pm_runtime_put(&pdev->dev); 167072cfc73fSDmitry Baryshkov return ret; 167115d09e83STaniya Das } 167215d09e83STaniya Das 167315d09e83STaniya Das clk_fabia_pll_configure(&cam_cc_pll0, regmap, &cam_cc_pll0_config); 167415d09e83STaniya Das clk_fabia_pll_configure(&cam_cc_pll1, regmap, &cam_cc_pll1_config); 167515d09e83STaniya Das clk_agera_pll_configure(&cam_cc_pll2, regmap, &cam_cc_pll2_config); 167615d09e83STaniya Das clk_fabia_pll_configure(&cam_cc_pll3, regmap, &cam_cc_pll3_config); 167715d09e83STaniya Das 167815d09e83STaniya Das ret = qcom_cc_really_probe(pdev, &cam_cc_sc7180_desc, regmap); 16798d402594SStephen Boyd pm_runtime_put(&pdev->dev); 168015d09e83STaniya Das if (ret < 0) { 168115d09e83STaniya Das dev_err(&pdev->dev, "Failed to register CAM CC clocks\n"); 168272cfc73fSDmitry Baryshkov return ret; 168315d09e83STaniya Das } 168415d09e83STaniya Das 168515d09e83STaniya Das return 0; 168615d09e83STaniya Das } 168715d09e83STaniya Das 168815d09e83STaniya Das static const struct dev_pm_ops cam_cc_pm_ops = { 168915d09e83STaniya Das SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL) 169015d09e83STaniya Das }; 169115d09e83STaniya Das 169215d09e83STaniya Das static struct platform_driver cam_cc_sc7180_driver = { 169315d09e83STaniya Das .probe = cam_cc_sc7180_probe, 169415d09e83STaniya Das .driver = { 169515d09e83STaniya Das .name = "cam_cc-sc7180", 169615d09e83STaniya Das .of_match_table = cam_cc_sc7180_match_table, 169715d09e83STaniya Das .pm = &cam_cc_pm_ops, 169815d09e83STaniya Das }, 169915d09e83STaniya Das }; 170015d09e83STaniya Das 170115d09e83STaniya Das static int __init cam_cc_sc7180_init(void) 170215d09e83STaniya Das { 170315d09e83STaniya Das return platform_driver_register(&cam_cc_sc7180_driver); 170415d09e83STaniya Das } 170515d09e83STaniya Das subsys_initcall(cam_cc_sc7180_init); 170615d09e83STaniya Das 170715d09e83STaniya Das static void __exit cam_cc_sc7180_exit(void) 170815d09e83STaniya Das { 170915d09e83STaniya Das platform_driver_unregister(&cam_cc_sc7180_driver); 171015d09e83STaniya Das } 171115d09e83STaniya Das module_exit(cam_cc_sc7180_exit); 171215d09e83STaniya Das 171315d09e83STaniya Das MODULE_DESCRIPTION("QTI CAM_CC SC7180 Driver"); 171415d09e83STaniya Das MODULE_LICENSE("GPL v2"); 1715