1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Qualcomm APCS clock controller driver 4 * 5 * Copyright (c) 2017, Linaro Limited 6 * Author: Georgi Djakov <georgi.djakov@linaro.org> 7 */ 8 9 #include <linux/clk.h> 10 #include <linux/clk-provider.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/platform_device.h> 15 #include <linux/regmap.h> 16 17 #include "clk-regmap.h" 18 #include "clk-regmap-mux-div.h" 19 20 static const u32 gpll0_a53cc_map[] = { 4, 5 }; 21 22 static const struct clk_parent_data pdata[] = { 23 { .fw_name = "aux", .name = "gpll0_vote", }, 24 { .fw_name = "pll", .name = "a53pll", }, 25 }; 26 27 /* 28 * We use the notifier function for switching to a temporary safe configuration 29 * (mux and divider), while the A53 PLL is reconfigured. 30 */ 31 static int a53cc_notifier_cb(struct notifier_block *nb, unsigned long event, 32 void *data) 33 { 34 int ret = 0; 35 struct clk_regmap_mux_div *md = container_of(nb, 36 struct clk_regmap_mux_div, 37 clk_nb); 38 if (event == PRE_RATE_CHANGE) 39 /* set the mux and divider to safe frequency (400mhz) */ 40 ret = mux_div_set_src_div(md, 4, 3); 41 42 return notifier_from_errno(ret); 43 } 44 45 static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev) 46 { 47 struct device *dev = &pdev->dev; 48 struct device *parent = dev->parent; 49 struct device_node *np = parent->of_node; 50 struct clk_regmap_mux_div *a53cc; 51 struct regmap *regmap; 52 struct clk_init_data init = { }; 53 int ret = -ENODEV; 54 55 regmap = dev_get_regmap(parent, NULL); 56 if (!regmap) { 57 dev_err(dev, "failed to get regmap: %d\n", ret); 58 return ret; 59 } 60 61 a53cc = devm_kzalloc(dev, sizeof(*a53cc), GFP_KERNEL); 62 if (!a53cc) 63 return -ENOMEM; 64 65 /* Use an unique name by appending parent's @unit-address */ 66 init.name = devm_kasprintf(dev, GFP_KERNEL, "a53mux%s", 67 strchrnul(np->full_name, '@')); 68 if (!init.name) 69 return -ENOMEM; 70 71 init.parent_data = pdata; 72 init.num_parents = ARRAY_SIZE(pdata); 73 init.ops = &clk_regmap_mux_div_ops; 74 init.flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT; 75 76 a53cc->clkr.hw.init = &init; 77 a53cc->clkr.regmap = regmap; 78 a53cc->reg_offset = 0x50; 79 a53cc->hid_width = 5; 80 a53cc->hid_shift = 0; 81 a53cc->src_width = 3; 82 a53cc->src_shift = 8; 83 a53cc->parent_map = gpll0_a53cc_map; 84 85 a53cc->pclk = devm_clk_get(parent, NULL); 86 if (IS_ERR(a53cc->pclk)) { 87 ret = PTR_ERR(a53cc->pclk); 88 if (ret != -EPROBE_DEFER) 89 dev_err(dev, "failed to get clk: %d\n", ret); 90 return ret; 91 } 92 93 a53cc->clk_nb.notifier_call = a53cc_notifier_cb; 94 ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb); 95 if (ret) { 96 dev_err(dev, "failed to register clock notifier: %d\n", ret); 97 return ret; 98 } 99 100 ret = devm_clk_register_regmap(dev, &a53cc->clkr); 101 if (ret) { 102 dev_err(dev, "failed to register regmap clock: %d\n", ret); 103 goto err; 104 } 105 106 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, 107 &a53cc->clkr.hw); 108 if (ret) { 109 dev_err(dev, "failed to add clock provider: %d\n", ret); 110 goto err; 111 } 112 113 platform_set_drvdata(pdev, a53cc); 114 115 return 0; 116 117 err: 118 clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb); 119 return ret; 120 } 121 122 static void qcom_apcs_msm8916_clk_remove(struct platform_device *pdev) 123 { 124 struct clk_regmap_mux_div *a53cc = platform_get_drvdata(pdev); 125 126 clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb); 127 } 128 129 static struct platform_driver qcom_apcs_msm8916_clk_driver = { 130 .probe = qcom_apcs_msm8916_clk_probe, 131 .remove_new = qcom_apcs_msm8916_clk_remove, 132 .driver = { 133 .name = "qcom-apcs-msm8916-clk", 134 }, 135 }; 136 module_platform_driver(qcom_apcs_msm8916_clk_driver); 137 138 MODULE_AUTHOR("Georgi Djakov <georgi.djakov@linaro.org>"); 139 MODULE_LICENSE("GPL v2"); 140 MODULE_DESCRIPTION("Qualcomm MSM8916 APCS clock driver"); 141